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ssa-dom-thread-4.c: Update expected results for MIPS.
gcc/testsuite/ * gcc.dg/tree-ssa/ssa-dom-thread-4.c: Update expected results for MIPS. From-SVN: r195131
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@ -1,3 +1,7 @@
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2013-01-13 Richard Sandiford <rdsandiford@googlemail.com>
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* gcc.dg/tree-ssa/ssa-dom-thread-4.c: Update expected results for MIPS.
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2013-01-12 Janus Weil <janus@gcc.gnu.org>
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PR fortran/55072
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@ -62,8 +62,25 @@ bitmap_ior_and_compl (bitmap dst, const_bitmap a, const_bitmap b,
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/* ARM Cortex-M0 defined LOGICAL_OP_NON_SHORT_CIRCUIT to false,
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so skip below test. */
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/* { dg-final { scan-tree-dump-times "Threaded" 3 "dom1" { target { ! { mips*-*-* || { arm_cortex_m && arm_thumb1 } } } } } } */
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/* MIPS defines LOGICAL_OP_NON_SHORT_CIRCUIT to 0, so we split var1 || var2
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into two conditions, rather than use (var1 != 0) | (var2 != 0). */
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/* { dg-final { scan-tree-dump-times "Threaded" 4 "dom1" { target mips*-*-* } } } */
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/* MIPS defines LOGICAL_OP_NON_SHORT_CIRCUIT to 0, so we split both
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"a_elt || b_elt" and "b_elt && kill_elt" into two conditions each,
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rather than using "(var1 != 0) op (var2 != 0)". Also, as on other targets,
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we duplicate the header of the inner "while" loop. There are then
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6 threading opportunities:
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1x "!a_elt && b_elt" in the outer "while" loop
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-> the start of the inner "while" loop,
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skipping the known-true "b_elt" in the first condition.
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1x "!b_elt" in the first condition
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-> the outer "while" loop's continuation point,
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skipping the known-false "b_elt" in the second condition.
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2x "!kill_elt" in the inner "while" loop
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-> the outer "while" loop's continuation point,
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skipping the known-false "b_elt && kill_elt" in the second condition
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2x "kill_elt->indx < b_elt->indx" in the first "while" loop
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-> "kill_elt->indx == b_elt->indx" in the second condition,
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skipping the known-true "b_elt && kill_elt" in the second
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condition. */
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/* { dg-final { scan-tree-dump-times "Threaded" 6 "dom1" { target mips*-*-* } } } */
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/* { dg-final { cleanup-tree-dump "dom1" } } */
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