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mips.h (SPECIAL_MODE_PREDICATES): New.
* mips.h (SPECIAL_MODE_PREDICATES): New. * mips.md (*) Use nonimmediate_operand not general_operand for outputs. (movdi+1, movsi+1): Add output reload constraint. (casesi_internal): Likewise. Fix commentary. (return_internal): Use pmode_register_operand. From-SVN: r30009
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@ -1,3 +1,11 @@
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Thu Oct 14 23:50:25 1999 Richard Henderson <rth@cygnus.com>
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* mips.h (SPECIAL_MODE_PREDICATES): New.
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* mips.md (*) Use nonimmediate_operand not general_operand for outputs.
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(movdi+1, movsi+1): Add output reload constraint.
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(casesi_internal): Likewise. Fix commentary.
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(return_internal): Use pmode_register_operand.
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Thu Oct 14 23:19:34 1999 Richard Henderson <rth@cygnus.com>
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* 1750a.md (movstrqi): Add missing output reload constraint.
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@ -411,7 +419,7 @@ Wed Oct 13 10:07:54 1999 Richard Henderson <rth@cygnus.com>
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Wed Oct 13 01:44:29 1999 Carol LePage <carolo@hal.com>
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* configure.in (sparc-hal-solaris2*): Fix xm_file, xm_defines,
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* configure.in (sparc-hal-solaris2*): Fix xm_file, xm_defines,
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float_format and thread_file definitions.
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* configure: Rebuilt.
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@ -438,10 +446,10 @@ Tue Oct 12 17:09:38 1999 David Edelsohn <edelsohn@gnu.org>
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Tue Oct 12 09:45:19 1999 Jonathan Larmour <jlarmour@cygnus.co.uk>
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* config/rs6000/eabi-ctors.c (__do_global_ctors): Run through
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__CTOR_LIST__ in opposite order, which is the correct order for sorted
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constructors.
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(__do_global_dtors): similarly for __DTOR_LIST__.
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* config/rs6000/eabi-ctors.c (__do_global_ctors): Run through
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__CTOR_LIST__ in opposite order, which is the correct order for sorted
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constructors.
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(__do_global_dtors): similarly for __DTOR_LIST__.
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Fri Oct 8 19:46:03 1999 J"orn Rennecke <amylaar@cygnus.co.uk>
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Diego Novillo <dnovillo@cygnus.com>
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@ -595,10 +603,10 @@ Sun Oct 10 00:43:08 1999 Richard Henderson <rth@cygnus.com>
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Sat Oct 9 23:26:55 1999 Jeffrey A Law (law@cygnus.com)
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* gcse.c (gcse_main): Avoid global optimizations if we have a
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large number of basic blocks and the ratio of edges to blocks
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is high.
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(delete_null_pointer_checks): Likewise.
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* gcse.c (gcse_main): Avoid global optimizations if we have a
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large number of basic blocks and the ratio of edges to blocks
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is high.
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(delete_null_pointer_checks): Likewise.
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Sat Oct 9 23:16:01 1999 Ken Raeburn <raeburn@mit.edu>
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@ -746,11 +754,11 @@ Thu Oct 7 23:06:50 1999 Richard Henderson <rth@cygnus.com>
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Thu Oct 7 22:53:00 1999 Franz Sirl <Franz.Sirl-kernel@lauterbach.com>
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Mark Mitchell <mark@codesourcery.com>
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* tree.c (make_lang_type_fn): New funtion pointer.
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(make_lang_type): Call it.
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* tree.h (make_lang_type): Declare.
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(make_lang_type_fn): Likewise.
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* rs6000.c (rs6000_build_va_list): Use make_lang_type.
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* tree.c (make_lang_type_fn): New funtion pointer.
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(make_lang_type): Call it.
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* tree.h (make_lang_type): Declare.
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(make_lang_type_fn): Likewise.
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* rs6000.c (rs6000_build_va_list): Use make_lang_type.
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Thu Oct 7 00:36:17 1999 Diego Novillo <dnovillo@cygnus.com>
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@ -893,7 +901,7 @@ Tue Oct 5 11:34:52 1999 Michael Meissner <meissner@cygnus.com>
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* ggc-simple.c (toplevel): Ditto.
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Mon Oct 4 16:48:16 1999 Diego Novillo <dnovillo@cygnus.com>
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Jonathan Larmour <jlarmour@cygnus.co.uk>
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Jonathan Larmour <jlarmour@cygnus.co.uk>
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* config/mips/mips.c (mips_move_2words): Split doubles if
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ISA >= 3, !TARGET_64BIT, and destination is not an FP register.
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@ -1721,12 +1729,12 @@ Wed Sep 22 06:06:57 1999 Jeffrey A Law (law@cygnus.com)
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* pa.c, pa.h, pa.md: Support multiple assembler dialects in
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most assembler templates.
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* pa.c (hppa_legitimize_address): Handle full offsets for PA2.0
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FP loads and stores.
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* pa.c (hppa_legitimize_address): Handle full offsets for PA2.0
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FP loads and stores.
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(following_call): Always return zero for the PA8000.
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* pa.h (GO_IF_LEGITIMATE_ADDRESS): Handle full offsets for PA2.0
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FP loads and stores.
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(LEGITIMIZE_RELOAD_ADDRESS): Similarly.
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(LEGITIMIZE_RELOAD_ADDRESS): Similarly.
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* pa.h (BRANCH_COST): Define.
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@ -3750,6 +3750,11 @@ while (0)
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{"extend_operator", { SIGN_EXTEND, ZERO_EXTEND }}, \
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{"highpart_shift_operator", { ASHIFTRT, LSHIFTRT, ROTATERT, ROTATE }},
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/* A list of predicates that do special things with modes, and so
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should not elicit warnings for VOIDmode match_operand. */
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#define SPECIAL_MODE_PREDICATES \
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"pc_or_label_operand",
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/* If defined, a C statement to be executed just prior to the
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@ -4066,7 +4066,7 @@ move\\t%0,%z4\\n\\
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;; registers are not supported).
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(define_insn "fix_truncdfsi2"
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[(set (match_operand:SI 0 "general_operand" "=d,*f,R,To")
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[(set (match_operand:SI 0 "nonimmediate_operand" "=d,*f,R,To")
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(fix:SI (match_operand:DF 1 "register_operand" "f,*f,f,f")))
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(clobber (match_scratch:SI 2 "=d,*d,&d,&d"))
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(clobber (match_scratch:DF 3 "=f,?*X,f,f"))]
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@ -4091,7 +4091,7 @@ move\\t%0,%z4\\n\\
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(define_insn "fix_truncsfsi2"
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[(set (match_operand:SI 0 "general_operand" "=d,*f,R,To")
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[(set (match_operand:SI 0 "nonimmediate_operand" "=d,*f,R,To")
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(fix:SI (match_operand:SF 1 "register_operand" "f,*f,f,f")))
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(clobber (match_scratch:SI 2 "=d,*d,&d,&d"))
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(clobber (match_scratch:SF 3 "=f,?*X,f,f"))]
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@ -4125,7 +4125,7 @@ move\\t%0,%z4\\n\\
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;;; If this is disabled, then fixuns_truncdfdi2 must be disabled also.
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(define_insn "fix_truncdfdi2"
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[(set (match_operand:DI 0 "general_operand" "=d,*f,R,To")
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[(set (match_operand:DI 0 "nonimmediate_operand" "=d,*f,R,To")
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(fix:DI (match_operand:DF 1 "register_operand" "f,*f,f,f")))
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(clobber (match_scratch:DF 2 "=f,?*X,f,f"))]
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"TARGET_HARD_FLOAT && TARGET_64BIT && TARGET_DOUBLE_FLOAT"
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@ -4152,7 +4152,7 @@ move\\t%0,%z4\\n\\
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;;; but not in the chapter that describes the FPU. It is not mentioned at all
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;;; in the 1991 manuals. The r4000 at Cygnus does not have this instruction.
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(define_insn "fix_truncsfdi2"
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[(set (match_operand:DI 0 "general_operand" "=d,*f,R,To")
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[(set (match_operand:DI 0 "nonimmediate_operand" "=d,*f,R,To")
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(fix:DI (match_operand:SF 1 "register_operand" "f,*f,f,f")))
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(clobber (match_scratch:DF 2 "=f,?*X,f,f"))]
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"TARGET_HARD_FLOAT && TARGET_64BIT && TARGET_DOUBLE_FLOAT"
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@ -4825,7 +4825,7 @@ move\\t%0,%z4\\n\\
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;; instruction can be generated by save_restore_insns.
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(define_insn ""
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[(set (match_operand:DI 0 "memory_operand" "R,m")
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[(set (match_operand:DI 0 "memory_operand" "=R,m")
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(reg:DI 31))]
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"TARGET_MIPS16 && TARGET_64BIT"
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"*
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@ -5247,7 +5247,7 @@ move\\t%0,%z4\\n\\
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;; instruction can be generated by save_restore_insns.
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(define_insn ""
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[(set (match_operand:SI 0 "memory_operand" "R,m")
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[(set (match_operand:SI 0 "memory_operand" "=R,m")
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(reg:SI 31))]
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"TARGET_MIPS16"
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"*
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@ -9239,7 +9239,7 @@ move\\t%0,%z4\\n\\
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;; An embedded PIC switch statement looks like this:
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;; bal $LS1
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;; sll $reg,$index,2
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;; sll $reg,$reg,2
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;; $LS1:
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;; addu $reg,$reg,$31
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;; lw $reg,$L1-$LS1($reg)
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@ -9249,13 +9249,15 @@ move\\t%0,%z4\\n\\
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;; .word case1-$LS1
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;; .word case2-$LS1
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;; ...
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;;
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;; ??? So how does operand 2 get used?
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(define_insn "casesi_internal"
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[(set (pc)
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(mem:SI (plus:SI (mult:SI (match_operand:SI 0 "register_operand" "d")
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(const_int 4))
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(label_ref (match_operand 1 "" "")))))
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(clobber (match_operand:SI 2 "register_operand" "d"))
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(clobber (match_operand:SI 2 "register_operand" "=d"))
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(clobber (reg:SI 31))]
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"TARGET_EMBEDDED_PIC"
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"*
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@ -9383,10 +9385,9 @@ move\\t%0,%z4\\n\\
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(set_attr "mode" "none")])
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;; Normal return.
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;; We match any mode for the return address, so that this will work with
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;; both 32 bit and 64 bit targets.
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(define_insn "return_internal"
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[(use (match_operand 0 "register_operand" ""))
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[(use (match_operand 0 "pmode_register_operand" ""))
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(return)]
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""
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"*
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