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struct ira_reg_equiv_s's "init_insns" is an rtx_insn_list
gcc/ChangeLog: 2014-09-09 David Malcolm <dmalcolm@redhat.com> * ira.c (ira_update_equiv_info_by_shuffle_insn): Use NULL rather than NULL_RTX. (no_equiv): Likewise. (update_equiv_regs): Likewise. (setup_reg_equiv): Likewise. Strengthen locals "elem", "prev_elem", "next_elem" from rtx to rtx_insn_list *, and "insn" from rtx to rtx_insn *. Use methods of "elem" for typesafety and clarity. * ira.h (struct ira_reg_equiv_s): Strengthen field "init_insns" from rtx to rtx_insn_list *. * lra-assigns.c (spill_for): Strengthen local "x" from rtx to rtx_insn_list * and use methods for clarity and typesafety. * lra-constraints.c (contains_deleted_insn_p): Likewise for param "list". (init_insn_rhs_dead_pseudo_p): Likewise for local "insns". Remove redundant check on INSN_P (insns): this cannot hold, as "insns" is an INSN_LIST, not an insn. (reverse_equiv_p): Strengthen local "insns" from rtx to rtx_insn_list * and use methods for clarity and typesafety. (contains_reloaded_insn_p): Likewise for local "list". From-SVN: r215082
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@ -1,3 +1,26 @@
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2014-09-09 David Malcolm <dmalcolm@redhat.com>
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* ira.c (ira_update_equiv_info_by_shuffle_insn): Use NULL rather
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than NULL_RTX.
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(no_equiv): Likewise.
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(update_equiv_regs): Likewise.
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(setup_reg_equiv): Likewise. Strengthen locals "elem",
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"prev_elem", "next_elem" from rtx to rtx_insn_list *, and "insn"
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from rtx to rtx_insn *. Use methods of "elem" for typesafety and
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clarity.
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* ira.h (struct ira_reg_equiv_s): Strengthen field "init_insns"
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from rtx to rtx_insn_list *.
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* lra-assigns.c (spill_for): Strengthen local "x" from rtx to
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rtx_insn_list * and use methods for clarity and typesafety.
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* lra-constraints.c (contains_deleted_insn_p): Likewise for param
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"list".
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(init_insn_rhs_dead_pseudo_p): Likewise for local "insns". Remove
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redundant check on INSN_P (insns): this cannot hold, as "insns" is
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an INSN_LIST, not an insn.
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(reverse_equiv_p): Strengthen local "insns" from rtx to
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rtx_insn_list * and use methods for clarity and typesafety.
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(contains_reloaded_insn_p): Likewise for local "list".
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2014-09-09 Jiong Wang <jiong.wang@arm.com>
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* config/arm/arm.c (NEON_COPYSIGNF): New enum.
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18
gcc/ira.c
18
gcc/ira.c
@ -2605,7 +2605,7 @@ ira_update_equiv_info_by_shuffle_insn (int to_regno, int from_regno, rtx_insn *i
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ira_reg_equiv[to_regno].memory
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= ira_reg_equiv[to_regno].constant
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= ira_reg_equiv[to_regno].invariant
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= ira_reg_equiv[to_regno].init_insns = NULL_RTX;
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= ira_reg_equiv[to_regno].init_insns = NULL;
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if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
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fprintf (ira_dump_file,
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" Invalidating equiv info for reg %d\n", to_regno);
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@ -3259,7 +3259,7 @@ no_equiv (rtx reg, const_rtx store ATTRIBUTE_UNUSED,
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if (reg_equiv[regno].is_arg_equivalence)
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return;
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ira_reg_equiv[regno].defined_p = false;
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ira_reg_equiv[regno].init_insns = NULL_RTX;
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ira_reg_equiv[regno].init_insns = NULL;
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for (; list; list = XEXP (list, 1))
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{
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rtx insn = XEXP (list, 0);
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@ -3732,7 +3732,7 @@ update_equiv_regs (void)
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reg_equiv[regno].init_insns
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= XEXP (reg_equiv[regno].init_insns, 1);
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ira_reg_equiv[regno].init_insns = NULL_RTX;
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ira_reg_equiv[regno].init_insns = NULL;
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bitmap_set_bit (cleared_regs, regno);
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}
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/* Move the initialization of the register to just before
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@ -3820,15 +3820,17 @@ static void
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setup_reg_equiv (void)
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{
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int i;
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rtx elem, prev_elem, next_elem, insn, set, x;
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rtx_insn_list *elem, *prev_elem, *next_elem;
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rtx_insn *insn;
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rtx set, x;
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for (i = FIRST_PSEUDO_REGISTER; i < ira_reg_equiv_len; i++)
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for (prev_elem = NULL, elem = ira_reg_equiv[i].init_insns;
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elem;
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prev_elem = elem, elem = next_elem)
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{
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next_elem = XEXP (elem, 1);
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insn = XEXP (elem, 0);
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next_elem = elem->next ();
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insn = elem->insn ();
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set = single_set (insn);
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/* Init insns can set up equivalence when the reg is a destination or
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@ -3897,7 +3899,7 @@ setup_reg_equiv (void)
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if (ira_reg_equiv[i].memory == NULL_RTX)
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{
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ira_reg_equiv[i].defined_p = false;
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ira_reg_equiv[i].init_insns = NULL_RTX;
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ira_reg_equiv[i].init_insns = NULL;
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break;
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}
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}
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@ -3907,7 +3909,7 @@ setup_reg_equiv (void)
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}
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}
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ira_reg_equiv[i].defined_p = false;
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ira_reg_equiv[i].init_insns = NULL_RTX;
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ira_reg_equiv[i].init_insns = NULL;
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break;
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}
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}
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@ -166,7 +166,7 @@ struct ira_reg_equiv_s
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rtx constant;
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rtx invariant;
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/* Always NULL_RTX if defined_p is false. */
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rtx init_insns;
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rtx_insn_list *init_insns;
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};
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/* The length of the following array. */
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@ -951,15 +951,15 @@ spill_for (int regno, bitmap spilled_pseudo_bitmap, bool first_p)
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}
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EXECUTE_IF_SET_IN_BITMAP (&spill_pseudos_bitmap, 0, spill_regno, bi)
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{
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rtx x;
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rtx_insn_list *x;
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cost += lra_reg_info[spill_regno].freq;
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if (ira_reg_equiv[spill_regno].memory != NULL
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|| ira_reg_equiv[spill_regno].constant != NULL)
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for (x = ira_reg_equiv[spill_regno].init_insns;
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x != NULL;
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x = XEXP (x, 1))
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cost -= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (XEXP (x, 0)));
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x = x->next ())
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cost -= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (x->insn ()));
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}
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if (best_insn_pseudos_num > insn_pseudos_num
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|| (best_insn_pseudos_num == insn_pseudos_num
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@ -3897,11 +3897,11 @@ multi_block_pseudo_p (int regno)
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/* Return true if LIST contains a deleted insn. */
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static bool
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contains_deleted_insn_p (rtx list)
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contains_deleted_insn_p (rtx_insn_list *list)
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{
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for (; list != NULL_RTX; list = XEXP (list, 1))
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if (NOTE_P (XEXP (list, 0))
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&& NOTE_KIND (XEXP (list, 0)) == NOTE_INSN_DELETED)
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for (; list != NULL_RTX; list = list->next ())
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if (NOTE_P (list->insn ())
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&& NOTE_KIND (list->insn ()) == NOTE_INSN_DELETED)
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return true;
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return false;
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}
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@ -3952,14 +3952,12 @@ insn_rhs_dead_pseudo_p (rtx insn)
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static bool
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init_insn_rhs_dead_pseudo_p (int regno)
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{
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rtx insns = ira_reg_equiv[regno].init_insns;
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rtx_insn_list *insns = ira_reg_equiv[regno].init_insns;
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if (insns == NULL)
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return false;
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if (INSN_P (insns))
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return insn_rhs_dead_pseudo_p (insns);
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for (; insns != NULL_RTX; insns = XEXP (insns, 1))
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if (insn_rhs_dead_pseudo_p (XEXP (insns, 0)))
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for (; insns != NULL_RTX; insns = insns->next ())
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if (insn_rhs_dead_pseudo_p (insns->insn ()))
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return true;
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return false;
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}
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@ -3970,14 +3968,15 @@ init_insn_rhs_dead_pseudo_p (int regno)
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static bool
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reverse_equiv_p (int regno)
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{
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rtx insns, set;
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rtx_insn_list *insns = ira_reg_equiv[regno].init_insns;
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rtx set;
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if ((insns = ira_reg_equiv[regno].init_insns) == NULL_RTX)
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if (insns == NULL)
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return false;
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if (! INSN_P (XEXP (insns, 0))
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|| XEXP (insns, 1) != NULL_RTX)
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if (! INSN_P (insns->insn ())
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|| insns->next () != NULL)
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return false;
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if ((set = single_set (XEXP (insns, 0))) == NULL_RTX)
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if ((set = single_set (insns->insn ())) == NULL_RTX)
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return false;
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return REG_P (SET_SRC (set)) && (int) REGNO (SET_SRC (set)) == regno;
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}
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@ -3988,10 +3987,10 @@ static bool
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contains_reloaded_insn_p (int regno)
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{
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rtx set;
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rtx list = ira_reg_equiv[regno].init_insns;
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rtx_insn_list *list = ira_reg_equiv[regno].init_insns;
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for (; list != NULL_RTX; list = XEXP (list, 1))
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if ((set = single_set (XEXP (list, 0))) == NULL_RTX
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for (; list != NULL; list = list->next ())
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if ((set = single_set (list->insn ())) == NULL_RTX
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|| ! REG_P (SET_DEST (set))
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|| (int) REGNO (SET_DEST (set)) != regno)
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return true;
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