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mmx.md (*vec_extract* splitters): Simplify post-reload splitter preparation statements.

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* config/i386/mmx.md (*vec_extract* splitters): Simplify post-reload
	splitter preparation statements.
	* config/i386/sse.md (*vec_extract* splitters): Ditto.
	(*avx_vperm_broadcast_<mode>): Use adjust_address instead of
	adjust_address_nv.

From-SVN: r198718
This commit is contained in:
Uros Bizjak 2013-05-08 20:05:41 +02:00 committed by Uros Bizjak
parent 1dc3d6e9e1
commit 0b013847f8
3 changed files with 26 additions and 39 deletions
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8
gcc/ChangeLog
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@ -1,3 +1,11 @@
2013-05-08 Uros Bizjak <ubizjak@gmail.com>
* config/i386/mmx.md (*vec_extract* splitters): Simplify post-reload
splitter preparation statements.
* config/i386/sse.md (*vec_extract* splitters): Ditto.
(*avx_vperm_broadcast_<mode>): Use adjust_address instead of
adjust_address_nv.
2013-05-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gimple-ssa-strength-reduction.c (count_candidates): Change

38
gcc/config/i386/mmx.md
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@ -594,15 +594,12 @@
"TARGET_MMX && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
"#"
"&& reload_completed"
[(const_int 0)]
[(set (match_dup 0) (match_dup 1))]
{
rtx op1 = operands[1];
if (REG_P (op1))
op1 = gen_rtx_REG (SFmode, REGNO (op1));
if (REG_P (operands[1]))
operands[1] = gen_rtx_REG (SFmode, REGNO (operands[1]));
else
op1 = gen_lowpart (SFmode, op1);
emit_move_insn (operands[0], op1);
DONE;
operands[1] = adjust_address (operands[1], SFmode, 0);
})
;; Avoid combining registers from different units in a single alternative,
@ -629,12 +626,8 @@
(match_operand:V2SF 1 "memory_operand")
(parallel [(const_int 1)])))]
"TARGET_MMX && reload_completed"
[(const_int 0)]
{
operands[1] = adjust_address (operands[1], SFmode, 4);
emit_move_insn (operands[0], operands[1]);
DONE;
})
[(set (match_dup 0) (match_dup 1))]
"operands[1] = adjust_address (operands[1], SFmode, 4);")
(define_expand "vec_extractv2sf"
[(match_operand:SF 0 "register_operand")
@ -1289,15 +1282,12 @@
"TARGET_MMX && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
"#"
"&& reload_completed"
[(const_int 0)]
[(set (match_dup 0) (match_dup 1))]
{
rtx op1 = operands[1];
if (REG_P (op1))
op1 = gen_rtx_REG (SImode, REGNO (op1));
if (REG_P (operands[1]))
operands[1] = gen_rtx_REG (SImode, REGNO (operands[1]));
else
op1 = gen_lowpart (SImode, op1);
emit_move_insn (operands[0], op1);
DONE;
operands[1] = adjust_address (operands[1], SImode, 0);
})
;; Avoid combining registers from different units in a single alternative,
@ -1330,12 +1320,8 @@
(match_operand:V2SI 1 "memory_operand")
(parallel [(const_int 1)])))]
"TARGET_MMX && reload_completed"
[(const_int 0)]
{
operands[1] = adjust_address (operands[1], SImode, 4);
emit_move_insn (operands[0], operands[1]);
DONE;
})
[(set (match_dup 0) (match_dup 1))]
"operands[1] = adjust_address (operands[1], SImode, 4);")
(define_expand "vec_extractv2si"
[(match_operand:SI 0 "register_operand")

19
gcc/config/i386/sse.md
View File

@ -4277,12 +4277,8 @@
(match_dup 0)
(const_int 1)))]
"TARGET_SSE && reload_completed"
[(const_int 0)]
{
emit_move_insn (adjust_address (operands[0], <ssescalarmode>mode, 0),
operands[1]);
DONE;
})
[(set (match_dup 0) (match_dup 1))]
"operands[0] = adjust_address (operands[0], <ssescalarmode>mode, 0);")
(define_expand "vec_set<mode>"
[(match_operand:V 0 "register_operand")
@ -4362,12 +4358,9 @@
"TARGET_SSE"
"#"
"&& reload_completed"
[(const_int 0)]
[(set (match_dup 0) (match_dup 1))]
{
int i = INTVAL (operands[2]);
emit_move_insn (operands[0], adjust_address (operands[1], SFmode, i*4));
DONE;
operands[1] = adjust_address (operands[1], SFmode, INTVAL (operands[2]) * 4);
})
(define_expand "avx_vextractf128<mode>"
@ -10654,8 +10647,8 @@
DONE;
}
operands[1] = adjust_address_nv (op1, <ssescalarmode>mode,
elt * GET_MODE_SIZE (<ssescalarmode>mode));
operands[1] = adjust_address (op1, <ssescalarmode>mode,
elt * GET_MODE_SIZE (<ssescalarmode>mode));
})
(define_expand "avx_vpermil<mode>"