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mcore.c: Convert to ISO C90 function declarations and definitions.
* config/mcore/mcore.c: Convert to ISO C90 function declarations and definitions. * config/mcore/mcore.h: Likewise. * config/mcore/mcore-protos.h: Likewise. From-SVN: r72020
This commit is contained in:
Steven Bosscher
Nick Clifton
parent
16aae3d209
commit
08903e087e
@ -1,3 +1,10 @@
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2003-10-02 Steven Bosscher <s.bosscher@student.tudelft.nl>
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* config/mcore/mcore.c: Convert to ISO C90 function declarations
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and definitions.
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* config/mcore/mcore.h: Likewise.
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* config/mcore/mcore-protos.h: Likewise.
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2003-10-02 Richard Sandiford <rsandifo@redhat.com>
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* config/frv/frv.c (frv_use_dfa_pipeline_interface): New function.
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@ -1,49 +1,49 @@
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/* Prototypes for exported functions defined in mcore.c
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Copyright (C) 2000, 2002 Free Software Foundation, Inc.
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Copyright (C) 2000, 2002, 2003 Free Software Foundation, Inc.
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Contributed by Nick Clifton (nickc@redhat.com)
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This file is part of GCC.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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extern const char * mcore_output_jump_label_table PARAMS ((void));
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extern void mcore_expand_prolog PARAMS ((void));
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extern void mcore_expand_epilog PARAMS ((void));
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extern int mcore_const_ok_for_inline PARAMS ((long));
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extern int mcore_num_ones PARAMS ((int));
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extern int mcore_num_zeros PARAMS ((int));
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extern int mcore_initial_elimination_offset PARAMS ((int, int));
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extern int mcore_byte_offset PARAMS ((unsigned int));
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extern int mcore_halfword_offset PARAMS ((unsigned int));
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extern int mcore_const_trick_uses_not PARAMS ((long));
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extern void mcore_override_options PARAMS ((void));
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extern int mcore_dllexport_name_p PARAMS ((const char *));
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extern int mcore_dllimport_name_p PARAMS ((const char *));
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extern int mcore_naked_function_p PARAMS ((void));
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extern const char * mcore_output_jump_label_table (void);
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extern void mcore_expand_prolog (void);
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extern void mcore_expand_epilog (void);
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extern int mcore_const_ok_for_inline (long);
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extern int mcore_num_ones (int);
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extern int mcore_num_zeros (int);
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extern int mcore_initial_elimination_offset (int, int);
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extern int mcore_byte_offset (unsigned int);
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extern int mcore_halfword_offset (unsigned int);
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extern int mcore_const_trick_uses_not (long);
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extern void mcore_override_options (void);
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extern int mcore_dllexport_name_p (const char *);
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extern int mcore_dllimport_name_p (const char *);
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extern int mcore_naked_function_p (void);
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#ifdef TREE_CODE
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#ifdef HAVE_MACHINE_MODES
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extern int mcore_function_arg_partial_nregs PARAMS ((CUMULATIVE_ARGS, enum machine_mode, tree, int));
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extern void mcore_setup_incoming_varargs PARAMS ((CUMULATIVE_ARGS, enum machine_mode, tree, int *));
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extern int mcore_num_arg_regs PARAMS ((enum machine_mode, tree));
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extern int mcore_must_pass_on_stack PARAMS ((enum machine_mode, tree));
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extern int mcore_function_arg_partial_nregs (CUMULATIVE_ARGS, enum machine_mode, tree, int);
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extern void mcore_setup_incoming_varargs (CUMULATIVE_ARGS, enum machine_mode, tree, int *);
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extern int mcore_num_arg_regs (enum machine_mode, tree);
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extern int mcore_must_pass_on_stack (enum machine_mode, tree);
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#endif /* HAVE_MACHINE_MODES */
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#ifdef RTX_CODE
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extern rtx mcore_function_value PARAMS ((tree, tree));
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extern rtx mcore_function_value (tree, tree);
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#endif /* RTX_CODE */
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#endif /* TREE_CODE */
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@ -52,49 +52,49 @@ extern rtx mcore_function_value PARAMS ((tree, tree));
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extern GTY(()) rtx arch_compare_op0;
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extern GTY(()) rtx arch_compare_op1;
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extern const char * mcore_output_bclri PARAMS ((rtx, int));
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extern const char * mcore_output_bseti PARAMS ((rtx, int));
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extern const char * mcore_output_cmov PARAMS ((rtx *, int, const char *));
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extern char * mcore_output_call PARAMS ((rtx *, int));
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extern int mcore_is_dead PARAMS ((rtx, rtx));
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extern int mcore_expand_insv PARAMS ((rtx *));
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extern int mcore_modify_comparison PARAMS ((RTX_CODE));
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extern void mcore_expand_block_move PARAMS ((rtx, rtx, rtx *));
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extern const char * mcore_output_andn PARAMS ((rtx, rtx *));
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extern void mcore_print_operand_address PARAMS ((FILE *, rtx));
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extern void mcore_print_operand PARAMS ((FILE *, rtx, int));
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extern rtx mcore_gen_compare_reg PARAMS ((RTX_CODE));
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extern int mcore_symbolic_address_p PARAMS ((rtx));
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extern bool mcore_r15_operand_p PARAMS ((rtx));
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extern enum reg_class mcore_secondary_reload_class PARAMS ((enum reg_class, enum machine_mode, rtx));
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extern enum reg_class mcore_reload_class PARAMS ((rtx, enum reg_class));
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extern int mcore_is_same_reg PARAMS ((rtx, rtx));
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extern int mcore_arith_S_operand PARAMS ((rtx));
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extern const char * mcore_output_bclri (rtx, int);
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extern const char * mcore_output_bseti (rtx, int);
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extern const char * mcore_output_cmov (rtx *, int, const char *);
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extern char * mcore_output_call (rtx *, int);
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extern int mcore_is_dead (rtx, rtx);
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extern int mcore_expand_insv (rtx *);
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extern int mcore_modify_comparison (RTX_CODE);
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extern void mcore_expand_block_move (rtx, rtx, rtx *);
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extern const char * mcore_output_andn (rtx, rtx *);
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extern void mcore_print_operand_address (FILE *, rtx);
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extern void mcore_print_operand (FILE *, rtx, int);
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extern rtx mcore_gen_compare_reg (RTX_CODE);
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extern int mcore_symbolic_address_p (rtx);
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extern bool mcore_r15_operand_p (rtx);
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extern enum reg_class mcore_secondary_reload_class (enum reg_class, enum machine_mode, rtx);
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extern enum reg_class mcore_reload_class (rtx, enum reg_class);
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extern int mcore_is_same_reg (rtx, rtx);
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extern int mcore_arith_S_operand (rtx);
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#ifdef HAVE_MACHINE_MODES
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extern const char * mcore_output_move PARAMS ((rtx, rtx *, enum machine_mode));
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extern const char * mcore_output_movedouble PARAMS ((rtx *, enum machine_mode));
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extern int mcore_arith_reg_operand PARAMS ((rtx, enum machine_mode));
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extern int mcore_general_movsrc_operand PARAMS ((rtx, enum machine_mode));
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extern int mcore_general_movdst_operand PARAMS ((rtx, enum machine_mode));
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extern int mcore_reload_operand PARAMS ((rtx, enum machine_mode));
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extern int mcore_arith_J_operand PARAMS ((rtx, enum machine_mode));
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extern int mcore_arith_K_operand PARAMS ((rtx, enum machine_mode));
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extern int mcore_arith_K_operand_not_0 PARAMS ((rtx, enum machine_mode));
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extern int mcore_arith_M_operand PARAMS ((rtx, enum machine_mode));
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extern int mcore_arith_K_S_operand PARAMS ((rtx, enum machine_mode));
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extern int mcore_arith_imm_operand PARAMS ((rtx, enum machine_mode));
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extern int mcore_arith_any_imm_operand PARAMS ((rtx, enum machine_mode));
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extern int mcore_arith_O_operand PARAMS ((rtx, enum machine_mode));
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extern int mcore_literal_K_operand PARAMS ((rtx, enum machine_mode));
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extern int mcore_addsub_operand PARAMS ((rtx, enum machine_mode));
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extern int mcore_compare_operand PARAMS ((rtx, enum machine_mode));
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extern int mcore_load_multiple_operation PARAMS ((rtx, enum machine_mode));
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extern int mcore_store_multiple_operation PARAMS ((rtx, enum machine_mode));
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extern int mcore_call_address_operand PARAMS ((rtx, enum machine_mode));
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extern const char * mcore_output_move (rtx, rtx *, enum machine_mode);
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extern const char * mcore_output_movedouble (rtx *, enum machine_mode);
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extern int mcore_arith_reg_operand (rtx, enum machine_mode);
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extern int mcore_general_movsrc_operand (rtx, enum machine_mode);
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extern int mcore_general_movdst_operand (rtx, enum machine_mode);
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extern int mcore_reload_operand (rtx, enum machine_mode);
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extern int mcore_arith_J_operand (rtx, enum machine_mode);
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extern int mcore_arith_K_operand (rtx, enum machine_mode);
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extern int mcore_arith_K_operand_not_0 (rtx, enum machine_mode);
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extern int mcore_arith_M_operand (rtx, enum machine_mode);
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extern int mcore_arith_K_S_operand (rtx, enum machine_mode);
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extern int mcore_arith_imm_operand (rtx, enum machine_mode);
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extern int mcore_arith_any_imm_operand (rtx, enum machine_mode);
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extern int mcore_arith_O_operand (rtx, enum machine_mode);
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extern int mcore_literal_K_operand (rtx, enum machine_mode);
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extern int mcore_addsub_operand (rtx, enum machine_mode);
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extern int mcore_compare_operand (rtx, enum machine_mode);
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extern int mcore_load_multiple_operation (rtx, enum machine_mode);
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extern int mcore_store_multiple_operation (rtx, enum machine_mode);
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extern int mcore_call_address_operand (rtx, enum machine_mode);
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#ifdef TREE_CODE
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extern rtx mcore_function_arg PARAMS ((CUMULATIVE_ARGS, enum machine_mode, tree, int));
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extern rtx mcore_function_arg (CUMULATIVE_ARGS, enum machine_mode, tree, int);
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#endif /* TREE_CODE */
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#endif /* HAVE_MACHINE_MODES */
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#endif /* RTX_CODE */
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File diff suppressed because it is too large
Load Diff
@ -60,7 +60,7 @@
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while (0)
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/* If -m4align is ever re-enabled then add this line to the definition of CPP_SPEC
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%{!m4align:-D__MCORE_ALIGN_8__} %{m4align:-D__MCORE__ALIGN_4__} */
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%{!m4align:-D__MCORE_ALIGN_8__} %{m4align:-D__MCORE__ALIGN_4__}. */
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#undef CPP_SPEC
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#define CPP_SPEC "%{m210:%{mlittle-endian:%ethe m210 does not have little endian support}}"
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@ -78,16 +78,16 @@
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many architecture specific files (other architectures...). */
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extern int target_flags;
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#define HARDLIT_BIT (1 << 0) /* Build in-line literals using 2 insns */
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#define ALIGN8_BIT (1 << 1) /* Max alignment goes to 8 instead of 4 */
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#define DIV_BIT (1 << 2) /* Generate divide instructions */
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#define RELAX_IMM_BIT (1 << 3) /* Arbitrary immediates in and, or, tst */
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#define W_FIELD_BIT (1 << 4) /* Generate bit insv/extv using SImode */
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#define OVERALIGN_FUNC_BIT (1 << 5) /* Align functions to 4 byte boundary */
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#define CGDATA_BIT (1 << 6) /* Generate callgraph data */
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#define SLOW_BYTES_BIT (1 << 7) /* Slow byte access */
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#define LITTLE_END_BIT (1 << 8) /* Generate little endian code */
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#define M340_BIT (1 << 9) /* Generate code for the m340 */
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#define HARDLIT_BIT (1 << 0) /* Build in-line literals using 2 insns. */
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#define ALIGN8_BIT (1 << 1) /* Max alignment goes to 8 instead of 4. */
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#define DIV_BIT (1 << 2) /* Generate divide instructions. */
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#define RELAX_IMM_BIT (1 << 3) /* Arbitrary immediates in and, or, tst. */
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#define W_FIELD_BIT (1 << 4) /* Generate bit insv/extv using SImode. */
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#define OVERALIGN_FUNC_BIT (1 << 5) /* Align functions to 4 byte boundary. */
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#define CGDATA_BIT (1 << 6) /* Generate callgraph data. */
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#define SLOW_BYTES_BIT (1 << 7) /* Slow byte access. */
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#define LITTLE_END_BIT (1 << 8) /* Generate little endian code. */
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#define M340_BIT (1 << 9) /* Generate code for the m340. */
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#define TARGET_DEFAULT \
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(HARDLIT_BIT | ALIGN8_BIT | DIV_BIT | RELAX_IMM_BIT | M340_BIT | LITTLE_END_BIT)
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@ -314,7 +314,7 @@ extern int mcore_stack_increment;
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ap arg pointer (doesn't really exist, always eliminated)
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c c bit
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fp frame pointer (doesn't really exist, always eliminated)
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x19 two control registers */
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x19 two control registers. */
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/* Number of actual hardware registers.
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The hardware registers are assigned numbers for the compiler
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@ -327,12 +327,12 @@ extern int mcore_stack_increment;
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#define FIRST_PSEUDO_REGISTER 20
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#define R1_REG 1 /* where literals are forced */
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#define LK_REG 15 /* overloaded on general register */
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#define AP_REG 16 /* fake arg pointer register */
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/* RBE: mcore.md depends on CC_REG being set to 17 */
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#define CC_REG 17 /* can't name it C_REG */
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#define FP_REG 18 /* fake frame pointer register */
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#define R1_REG 1 /* Where literals are forced. */
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#define LK_REG 15 /* Overloaded on general register. */
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#define AP_REG 16 /* Fake arg pointer register. */
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/* RBE: mcore.md depends on CC_REG being set to 17. */
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#define CC_REG 17 /* Can't name it C_REG. */
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#define FP_REG 18 /* Fake frame pointer register. */
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/* Specify the registers used for certain standard purposes.
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The values of these macros are register numbers. */
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@ -460,7 +460,7 @@ extern int mcore_stack_increment;
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/* The MCore has only general registers. There are
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also some special purpose registers: the T bit register, the
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procedure Link and the Count Registers */
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procedure Link and the Count Registers. */
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enum reg_class
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{
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NO_REGS,
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@ -625,14 +625,6 @@ extern const enum reg_class reg_class_from_letter[];
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makes the stack pointer a smaller address. */
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#define STACK_GROWS_DOWNWARD
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/* Define this if the nominal address of the stack frame
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is at the high-address end of the local variables;
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that is, each additional local variable allocated
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goes at a more negative offset in the frame. */
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/* We don't define this, because the MCore does not support
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addresses with negative offsets. */
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/* #define FRAME_GROWS_DOWNWARD */
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/* Offset within stack frame to start allocating local variables at.
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If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
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first local allocated. Otherwise, it is the offset to the BEGINNING
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@ -669,18 +661,6 @@ extern const enum reg_class reg_class_from_letter[];
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we want to retain compatibility with older gcc versions. */
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#define DEFAULT_PCC_STRUCT_RETURN 0
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/* how we are going to return big values */
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/*
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* #define RETURN_IN_MEMORY(TYPE) \
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* (TYPE_MODE (TYPE) == BLKmode \
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* || ((TREE_CODE (TYPE) == RECORD_TYPE || TREE_CODE(TYPE) == UNION_TYPE) \
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* && !(TYPE_MODE (TYPE) == SImode \
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* || (TYPE_MODE (TYPE) == BLKmode \
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* && TYPE_ALIGN (TYPE) == BITS_PER_WORD \
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* && int_size_in_bytes (TYPE) == UNITS_PER_WORD))))
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*/
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/* How many registers to use for struct return. */
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#define RETURN_IN_MEMORY(TYPE) (int_size_in_bytes (TYPE) > 2 * UNITS_PER_WORD)
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@ -939,11 +919,6 @@ extern const enum reg_class reg_class_from_letter[];
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for the index in the tablejump instruction. */
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#define CASE_VECTOR_MODE SImode
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/* Define this if the tablejump instruction expects the table
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to contain offsets from the address of the table.
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Do not define this if the table should contain absolute addresses. */
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/* #define CASE_VECTOR_PC_RELATIVE */
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/* 'char' is signed by default. */
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#define DEFAULT_SIGNED_CHAR 0
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@ -1030,11 +1005,9 @@ extern const enum reg_class reg_class_from_letter[];
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ASM_DECLARE_OBJECT_NAME and then switch back to the original section
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afterwards. */
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#define SWITCH_SECTION_FUNCTION \
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static void switch_to_section PARAMS ((enum in_section, tree)); \
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static void switch_to_section (enum in_section, tree); \
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static void \
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switch_to_section (section, decl) \
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enum in_section section; \
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tree decl; \
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switch_to_section (enum in_section section, tree decl) \
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{ \
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switch (section) \
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{ \
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