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mips.h (ELIMINABLE_REGS): Can't eliminate RETURN_ADDRESS_POINTER_REGNUM to $ra.
* config/mips/mips.h (ELIMINABLE_REGS): Can't eliminate RETURN_ADDRESS_POINTER_REGNUM to $ra. (CAN_ELIMINATE): Only eliminate it to $sp if a frame pointer is not needed. Disregard leaf_function_p(). (INITIAL_ELIMINATION_OFFSET): Adjust for elimination of rap to mips16 frame pointer. * config/mips/mips.md (store ra): Only to small SP offsets. 2001-08-22 Graham Stott <grahams@redhat.com> * config/mips/mips.h (RETURN_ADDR_RTX): For a leaf function return a REG rtx for the return address register. From-SVN: r50985
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Alexandre Oliva
Alexandre Oliva
parent
eb8e00ea23
commit
07e2e444ff
@ -1,3 +1,16 @@
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2002-03-18 Alexandre Oliva <aoliva@redhat.com>
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* config/mips/mips.h (ELIMINABLE_REGS): Can't eliminate
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RETURN_ADDRESS_POINTER_REGNUM to $ra.
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(CAN_ELIMINATE): Only eliminate it to $sp if a frame pointer is
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not needed. Disregard leaf_function_p().
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(INITIAL_ELIMINATION_OFFSET): Adjust for elimination of rap to
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mips16 frame pointer.
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* config/mips/mips.md (store ra): Only to small SP offsets.
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2001-08-22 Graham Stott <grahams@redhat.com>
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* config/mips/mips.h (RETURN_ADDR_RTX): For a leaf function
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return a REG rtx for the return address register.
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2002-03-18 Bob Wilson <bob.wilson@acm.org>
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* config/xtensa/xtensa.h (GO_IF_MODE_DEPENDENT_ADDRESS): Treat
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@ -2417,9 +2417,12 @@ extern enum reg_class mips_char_to_class[256];
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frame except by disassembling instructions in the prologue/epilogue.
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So currently we support only the current frame. */
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#define RETURN_ADDR_RTX(count, frame) \
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((count == 0) \
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? gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM))\
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#define RETURN_ADDR_RTX(count, frame) \
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(((count) == 0) \
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? (leaf_function_p () \
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? gen_rtx_REG (Pmode, GP_REG_FIRST + 31) \
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: gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode, \
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RETURN_ADDRESS_POINTER_REGNUM))) \
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: (rtx) 0)
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/* Structure to be filled in by compute_frame_size with register
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@ -2483,7 +2486,6 @@ extern struct mips_frame_info current_frame_info;
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{ RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
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{ RETURN_ADDRESS_POINTER_REGNUM, GP_REG_FIRST + 30}, \
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{ RETURN_ADDRESS_POINTER_REGNUM, GP_REG_FIRST + 17}, \
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{ RETURN_ADDRESS_POINTER_REGNUM, GP_REG_FIRST + 31}, \
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{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
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{ FRAME_POINTER_REGNUM, GP_REG_FIRST + 30}, \
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{ FRAME_POINTER_REGNUM, GP_REG_FIRST + 17}}
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@ -2510,10 +2512,8 @@ extern struct mips_frame_info current_frame_info;
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#define CAN_ELIMINATE(FROM, TO) \
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(((FROM) == RETURN_ADDRESS_POINTER_REGNUM \
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&& ((! leaf_function_p () \
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&& ((TO) == STACK_POINTER_REGNUM \
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|| (TO) == HARD_FRAME_POINTER_REGNUM)) \
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|| ((TO) == GP_REG_FIRST + 31 && leaf_function_p ()))) \
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&& (((TO) == STACK_POINTER_REGNUM && ! frame_pointer_needed) \
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|| (TO) == HARD_FRAME_POINTER_REGNUM)) \
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|| ((FROM) != RETURN_ADDRESS_POINTER_REGNUM \
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&& ((TO) == HARD_FRAME_POINTER_REGNUM \
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|| ((TO) == STACK_POINTER_REGNUM && ! frame_pointer_needed \
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@ -2553,11 +2553,11 @@ extern struct mips_frame_info current_frame_info;
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so we must add 4 bytes to the offset to get the right value. */ \
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else if ((FROM) == RETURN_ADDRESS_POINTER_REGNUM) \
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{ \
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if (leaf_function_p ()) \
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(OFFSET) = 0; \
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else (OFFSET) = current_frame_info.gp_sp_offset \
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+ ((UNITS_PER_WORD - (POINTER_SIZE / BITS_PER_UNIT)) \
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* (BYTES_BIG_ENDIAN != 0)); \
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(OFFSET) = current_frame_info.gp_sp_offset \
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+ ((UNITS_PER_WORD - (POINTER_SIZE / BITS_PER_UNIT)) \
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* (BYTES_BIG_ENDIAN != 0)); \
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if (TARGET_MIPS16 && (TO) != STACK_POINTER_REGNUM) \
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(OFFSET) -= current_function_outgoing_args_size; \
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} \
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else \
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abort(); \
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@ -4153,7 +4153,7 @@ while (0)
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"$0", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
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"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
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"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
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"t8", "t9", "k0", "k1", "gp", "sp", "$fp", "ra", \
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"t8", "t9", "k0", "k1", "gp", "sp", "$fp", "ra", \
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"$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", \
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"$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
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"$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", \
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@ -5489,22 +5489,25 @@ move\\t%0,%z4\\n\\
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}
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}")
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;; For mips16, we need a special case to handle storing $31 into
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;; memory, since we don't have a constraint to match $31. This
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;; instruction can be generated by save_restore_insns.
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;; We can only store $ra directly into a small sp offset. Should the
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;; offset be too wide, non-constant or not sp-based, leave it up to
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;; reload to choose a scratch register.
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(define_insn ""
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[(set (match_operand:SI 0 "memory_operand" "=R,m")
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[(set (mem:SI (plus:SI (reg:SI 29)
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(match_operand:SI 0 "small_int" "n")))
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(reg:SI 31))]
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"TARGET_MIPS16"
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"*
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{
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operands[1] = gen_rtx (REG, SImode, 31);
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return mips_move_1word (operands, insn, FALSE);
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}"
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"sw\\t$31,%0($sp)"
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[(set_attr "type" "store")
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(set_attr "mode" "SI")
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(set_attr "length" "4,8")])
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(set_attr_alternative
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"length"
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[(if_then_else
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(lt (symbol_ref "(unsigned HOST_WIDE_INT) INTVAL (operands[0])")
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(const_int 1024))
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(const_int 4)
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(const_int 8))])])
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;; The difference between these two is whether or not ints are allowed
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;; in FP registers (off by default, use -mdebugh to enable).
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