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m68k.md (zero_extendsidi2): Create expander; duplicate pattern and adjust constraints for coldfire.

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* config/m68k/m68k.md (zero_extendsidi2): Create expander; duplicate
        pattern and adjust constraints for coldfire.

From-SVN: r54865
This commit is contained in:
Richard Henderson 2002-06-20 16:47:35 -07:00 committed by Richard Henderson
parent aa8dea091f
commit 0655301f42
2 changed files with 39 additions and 3 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2002-06-20 Richard Henderson <rth@redhat.com>
PR target/4041
* config/m68k/m68k.md (zero_extendsidi2): Create expander; duplicate
pattern and adjust constraints for coldfire.
2002-06-20 Richard Henderson <rth@redhat.com>
* explow.c (probe_stack_range): Use gen_rtx_fmt_ee.

36
gcc/config/m68k/m68k.md
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@ -1525,10 +1525,40 @@
}")
;; this is the canonical form for (lshiftrt:DI x 32)
(define_insn "zero_extendsidi2"
[(set (match_operand:DI 0 "nonimmediate_operand" "=rm")
(zero_extend:DI (match_operand:SI 1 "general_operand" "rm")))]
(define_expand "zero_extendsidi2"
[(set (match_operand:DI 0 "nonimmediate_operand" "")
(zero_extend:DI (match_operand:SI 1 "general_operand" "")))]
""
"")
(define_insn "*zero_extendsidi2_cf"
[(set (match_operand:DI 0 "nonimmediate_operand" "=r,o")
(zero_extend:DI (match_operand:SI 1 "general_operand" "ro,r")))]
"TARGET_5200"
"*
{
CC_STATUS_INIT;
if (GET_CODE (operands[0]) == REG)
operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC)
return \"move%.l %1,%0\;clr%.l %0\";
else if (GET_CODE (XEXP (operands[0], 0)) == POST_INC)
return \"clr%.l %0\;move%.l %1,%0\";
else
operands[2] = adjust_address (operands[0], SImode, 4);
if (GET_CODE (operands[1]) != REG || GET_CODE (operands[2]) != REG
|| REGNO (operands[1]) != REGNO (operands[2]))
output_asm_insn (\"move%.l %1,%2\", operands);
if (ADDRESS_REG_P (operands[0]))
return \"sub%.l %0,%0\";
else
return \"clr%.l %0\";
}")
(define_insn "*zero_extendsidi2"
[(set (match_operand:DI 0 "nonimmediate_operand" "=ro")
(zero_extend:DI (match_operand:SI 1 "general_operand" "ro")))]
"!TARGET_5200"
"*
{
CC_STATUS_INIT;