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re PR testsuite/78421 (vect-strided-a-u8-i2-gap.c fails on armeb)
PR testsuite/78421 * lib/target-supports.exp (check_effective_target_vect_hw_misalign): If the target is ARM return the result of the check_effective_target_arm_vect_no_misalign proc. * gcc.dg/vect/vect-strided-a-u8-i2-gap.c: If the target does not support unaligned vectors then only expect one of the loops to be unrolled. Co-Authored-By: Nick Clifton <nickc@redhat.com> From-SVN: r244796
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@ -1,3 +1,14 @@
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2017-01-23 Richard Biener <rguenther@suse.de>
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Nick Clifton <nickc@redhat.com>
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PR testsuite/78421
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* lib/target-supports.exp (check_effective_target_vect_hw_misalign):
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If the target is ARM return the result of the
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check_effective_target_arm_vect_no_misalign proc.
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* gcc.dg/vect/vect-strided-a-u8-i2-gap.c: If the target does not
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support unaligned vectors then only expect one of the loops to be
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unrolled.
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2017-01-23 Martin Liska <mliska@suse.cz>
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* gcc.dg/asan/use-after-scope-10.c: New test.
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@ -71,5 +71,6 @@ int main (void)
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return 0;
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}
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/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { target vect_strided2 } } } */
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/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_strided2 && { ! vect_hw_misalign } } } } } */
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/* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" { target { vect_strided2 && vect_hw_misalign } } } } */
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@ -5752,6 +5752,9 @@ proc check_effective_target_vect_hw_misalign { } {
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|| ([istarget mips*-*-*] && [et-is-effective-target mips_msa]) } {
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set et_vect_hw_misalign_saved($et_index) 1
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}
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if { [istarget arm*-*-*] } {
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set et_vect_hw_misalign_saved($et_index) [check_effective_target_arm_vect_no_misalign]
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}
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}
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verbose "check_effective_target_vect_hw_misalign:\
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returning $et_vect_hw_misalign_saved($et_index)" 2
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