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genmodes: Update GET_MODE_MASK when changing NUNITS [PR98214]
The static GET_MODE_MASKs for SVE vectors are based on the static precisions, which in turn are based on 128-bit SVE. The precisions are later updated based on -msve-vector-bits (usually to become variable length), but the GET_MODE_MASK stayed the same. This caused combine to fold: (*_extract:DI (subreg:DI (reg:VNxMM R) 0) ...) to zero because the extracted bits appeared to be insignificant. gcc/ PR rtl-optimization/98214 * genmodes.c (emit_insn_modes_h): Emit a definition of CONST_MODE_MASK. (emit_mode_mask): Treat mode_mask_array as non-constant if adj_nunits. (emit_mode_adjustments): Update GET_MODE_MASK when updating GET_MODE_NUNITS. * machmode.h (mode_mask_array): Use CONST_MODE_MASK.
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@ -1324,6 +1324,7 @@ enum machine_mode\n{");
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#endif
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printf ("#define CONST_MODE_IBIT%s\n", adj_ibit ? "" : " const");
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printf ("#define CONST_MODE_FBIT%s\n", adj_fbit ? "" : " const");
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printf ("#define CONST_MODE_MASK%s\n", adj_nunits ? "" : " const");
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emit_max_int ();
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for_all_modes (c, m)
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@ -1561,8 +1562,8 @@ emit_mode_mask (void)
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int c;
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struct mode_data *m;
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print_decl ("unsigned HOST_WIDE_INT", "mode_mask_array",
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"NUM_MACHINE_MODES");
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print_maybe_const_decl ("%sunsigned HOST_WIDE_INT", "mode_mask_array",
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"NUM_MACHINE_MODES", adj_nunits);
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puts ("\
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#define MODE_MASK(m) \\\n\
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((m) >= HOST_BITS_PER_WIDE_INT) \\\n\
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@ -1719,6 +1720,20 @@ emit_mode_adjustments (void)
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struct mode_adjust *a;
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struct mode_data *m;
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if (adj_nunits)
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printf ("\n"
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"void\n"
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"adjust_mode_mask (machine_mode mode)\n"
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"{\n"
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" unsigned int precision;\n"
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" if (GET_MODE_PRECISION (mode).is_constant (&precision)\n"
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" && precision < HOST_BITS_PER_WIDE_INT)\n"
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" mode_mask_array[mode] = (HOST_WIDE_INT_1U << precision) - 1;"
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"\n"
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" else\n"
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" mode_mask_array[mode] = HOST_WIDE_INT_M1U;\n"
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"}\n");
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puts ("\
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\nvoid\
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\ninit_adjust_machine_modes (void)\
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@ -1736,10 +1751,11 @@ emit_mode_adjustments (void)
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printf (" int old_factor = vector_element_size"
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" (mode_precision[E_%smode], mode_nunits[E_%smode]);\n",
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m->name, m->name);
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printf (" mode_precision[E_%smode] = ps * old_factor;\n", m->name);
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printf (" mode_precision[E_%smode] = ps * old_factor;\n", m->name);
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printf (" mode_size[E_%smode] = exact_div (mode_precision[E_%smode],"
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" BITS_PER_UNIT);\n", m->name, m->name);
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printf (" mode_nunits[E_%smode] = ps;\n", m->name);
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printf (" adjust_mode_mask (E_%smode);\n", m->name);
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printf (" }\n");
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}
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@ -712,7 +712,8 @@ extern CONST_MODE_FBIT unsigned char mode_fbit[NUM_MACHINE_MODES];
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/* Get a bitmask containing 1 for all bits in a word
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that fit within mode MODE. */
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extern const unsigned HOST_WIDE_INT mode_mask_array[NUM_MACHINE_MODES];
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extern CONST_MODE_MASK unsigned HOST_WIDE_INT
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mode_mask_array[NUM_MACHINE_MODES];
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#define GET_MODE_MASK(MODE) mode_mask_array[MODE]
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21
gcc/testsuite/gcc.target/aarch64/sve/pr98214.c
Normal file
21
gcc/testsuite/gcc.target/aarch64/sve/pr98214.c
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@ -0,0 +1,21 @@
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/* { dg-options "-O3 -msve-vector-bits=512" } */
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long c;
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int a;
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int e[14];
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short b[14];
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void d(long *f, long h) { *f ^= h + *f; }
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void this_test_has_completed_successfully ();
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int main() {
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e[2] = 1;
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for (int g = 0; g < 13; g++)
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a = b[g] = e[g];
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d(&c, a);
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for (int g = 0; g < 4; g++)
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d(&c, b[2]);
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if (c != 15)
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__builtin_abort();
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this_test_has_completed_successfully ();
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}
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/* { dg-final { scan-assembler {this_test_has_completed_successfully} } } */
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