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RISC-V: Add missing negate patterns.

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gcc/
	* config/riscv/riscv.md (subsi3_extended2): Add J constraint.
	(negdi2, negsi2, negsi2_extended, negsi2_extended2): New.

From-SVN: r264655
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Jim Wilson 2018-09-26 21:06:01 +00:00 committed by Jim Wilson
parent d89fde46d7
commit 01414d53cf
2 changed files with 43 additions and 3 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2018-09-26 Jim Wilson <jimw@sifive.com>
* config/riscv/riscv.md (subsi3_extended2): Add J constraint.
(negdi2, negsi2, negsi2_extended, negsi2_extended2): New.
2018-09-26 Martin Sebor <msebor@redhat.com>
* tree.c (zerop): Change return type to bool.

41
gcc/config/riscv/riscv.md
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@ -514,16 +514,51 @@
(set_attr "mode" "SI")])
(define_insn "*subsi3_extended2"
[(set (match_operand:DI 0 "register_operand" "=r")
[(set (match_operand:DI 0 "register_operand" "= r")
(sign_extend:DI
(subreg:SI (minus:DI (match_operand:DI 1 "reg_or_0_operand" " r")
(match_operand:DI 2 "register_operand" " r"))
(subreg:SI (minus:DI (match_operand:DI 1 "reg_or_0_operand" " rJ")
(match_operand:DI 2 "register_operand" " r"))
0)))]
"TARGET_64BIT"
"subw\t%0,%z1,%2"
[(set_attr "type" "arith")
(set_attr "mode" "SI")])
(define_insn "negdi2"
[(set (match_operand:DI 0 "register_operand" "=r")
(neg:DI (match_operand:DI 1 "register_operand" " r")))]
"TARGET_64BIT"
"neg\t%0,%1"
[(set_attr "type" "arith")
(set_attr "mode" "DI")])
(define_insn "negsi2"
[(set (match_operand:SI 0 "register_operand" "=r")
(neg:SI (match_operand:SI 1 "register_operand" " r")))]
""
{ return TARGET_64BIT ? "negw\t%0,%1" : "neg\t%0,%1"; }
[(set_attr "type" "arith")
(set_attr "mode" "SI")])
(define_insn "*negsi2_extended"
[(set (match_operand:DI 0 "register_operand" "=r")
(sign_extend:DI
(neg:SI (match_operand:SI 1 "register_operand" " r"))))]
"TARGET_64BIT"
"negw\t%0,%1"
[(set_attr "type" "arith")
(set_attr "mode" "SI")])
(define_insn "*negsi2_extended2"
[(set (match_operand:DI 0 "register_operand" "=r")
(sign_extend:DI
(subreg:SI (neg:DI (match_operand:DI 1 "register_operand" " r"))
0)))]
"TARGET_64BIT"
"negw\t%0,%1"
[(set_attr "type" "arith")
(set_attr "mode" "SI")])
;;
;; ....................
;;