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altivec.md (altivec_vperm_v8hiv16qi): New define_insn.

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[gcc]

2015-09-03  Bill Schmidt  <wschmidt@vnet.linux.ibm.com>

	* config/rs6000/altivec.md (altivec_vperm_v8hiv16qi): New
	define_insn.
	(mulv16qi3): New define_expand.

[gcc/testsuite]

2015-09-03  Bill Schmidt  <wschmidt@vnet.linux.ibm.com>

	* gcc.target/powerpc/vec-mult-char-1.c: New test.
	* gcc.target/powerpc/vec-mult-char-2.c: New test.
	* lib/target-supports.exp (check_effective_target_vect_char_mult):
	Return true for PowerPC targets that implement Altivec.

From-SVN: r227464
This commit is contained in:
Bill Schmidt 2015-09-03 18:08:42 +00:00 committed by William Schmidt
parent 8b652e654f
commit 010f20ee1f
6 changed files with 126 additions and 1 deletions
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6
gcc/ChangeLog
View File

@ -1,3 +1,9 @@
2015-09-03 Bill Schmidt <wschmidt@vnet.linux.ibm.com>
* config/rs6000/altivec.md (altivec_vperm_v8hiv16qi): New
define_insn.
(mulv16qi3): New define_expand.
2015-09-03 Martin Sebor <msebor@redhat.com>
PR c/66516

37
gcc/config/rs6000/altivec.md
View File

@ -1957,6 +1957,16 @@
"vperm %0,%1,%2,%3"
[(set_attr "type" "vecperm")])
(define_insn "altivec_vperm_v8hiv16qi"
[(set (match_operand:V16QI 0 "register_operand" "=v")
(unspec:V16QI [(match_operand:V8HI 1 "register_operand" "v")
(match_operand:V8HI 2 "register_operand" "v")
(match_operand:V16QI 3 "register_operand" "v")]
UNSPEC_VPERM))]
"TARGET_ALTIVEC"
"vperm %0,%1,%2,%3"
[(set_attr "type" "vecperm")])
(define_expand "altivec_vperm_<mode>_uns"
[(set (match_operand:VM 0 "register_operand" "=v")
(unspec:VM [(match_operand:VM 1 "register_operand" "v")
@ -3161,6 +3171,33 @@
"<VI_unit>"
"")
(define_expand "mulv16qi3"
[(set (match_operand:V16QI 0 "register_operand" "=v")
(mult:V16QI (match_operand:V16QI 1 "register_operand" "v")
(match_operand:V16QI 2 "register_operand" "v")))]
"TARGET_ALTIVEC"
"
{
rtx even = gen_reg_rtx (V8HImode);
rtx odd = gen_reg_rtx (V8HImode);
rtx mask = gen_reg_rtx (V16QImode);
rtvec v = rtvec_alloc (16);
int i;
for (i = 0; i < 8; ++i) {
RTVEC_ELT (v, 2 * i)
= gen_rtx_CONST_INT (QImode, BYTES_BIG_ENDIAN ? 2 * i + 1 : 31 - 2 * i);
RTVEC_ELT (v, 2 * i + 1)
= gen_rtx_CONST_INT (QImode, BYTES_BIG_ENDIAN ? 2 * i + 17 : 15 - 2 * i);
}
emit_insn (gen_vec_initv16qi (mask, gen_rtx_PARALLEL (V16QImode, v)));
emit_insn (gen_altivec_vmulesb (even, operands[1], operands[2]));
emit_insn (gen_altivec_vmulosb (odd, operands[1], operands[2]));
emit_insn (gen_altivec_vperm_v8hiv16qi (operands[0], even, odd, mask));
DONE;
}")
(define_expand "altivec_negv4sf2"
[(use (match_operand:V4SF 0 "register_operand" ""))
(use (match_operand:V4SF 1 "register_operand" ""))]

7
gcc/testsuite/ChangeLog
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@ -1,3 +1,10 @@
2015-09-03 Bill Schmidt <wschmidt@vnet.linux.ibm.com>
* gcc.target/powerpc/vec-mult-char-1.c: New test.
* gcc.target/powerpc/vec-mult-char-2.c: New test.
* lib/target-supports.exp (check_effective_target_vect_char_mult):
Return true for PowerPC targets that implement Altivec.
2015-09-03 Renlin Li <renlin.li@arm.com>
* gcc.target/aarch64/arm_align_max_pwr.c: Make it a compile test case,

53
gcc/testsuite/gcc.target/powerpc/vec-mult-char-1.c Normal file
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@ -0,0 +1,53 @@
/* { dg-do run { target { powerpc*-*-* && vmx_hw } } } */
/* { dg-require-effective-target powerpc_altivec_ok } */
/* { dg-options "-maltivec" } */
#include <altivec.h>
extern void abort (void);
vector unsigned char vmului(vector unsigned char v,
vector unsigned char i)
{
return v * i;
}
vector signed char vmulsi(vector signed char v,
vector signed char i)
{
return v * i;
}
int main ()
{
vector unsigned char a = {2, 4, 6, 8, 10, 12, 14, 16,
18, 20, 22, 24, 26, 28, 30, 32};
vector unsigned char b = {3, 6, 9, 12, 15, 18, 21, 24,
27, 30, 33, 36, 39, 42, 45, 48};
vector unsigned char c = vmului (a, b);
vector unsigned char expect_c = {6, 24, 54, 96, 150, 216, 38, 128,
230, 88, 214, 96, 246, 152, 70, 0};
vector signed char d = {2, -4, 6, -8, 10, -12, 14, -16,
18, -20, 22, -24, 26, -28, 30, -32};
vector signed char e = {3, 6, -9, -12, 15, 18, -21, -24,
27, 30, -33, -36, 39, 42, -45, -48};
vector signed char f = vmulsi (d, e);
vector signed char expect_f = {6, -24, -54, 96, -106, 40, -38, -128,
-26, -88, 42, 96, -10, 104, -70, 0};
vector signed char g = {127, -128, 126, -126, 125, -125, 124, -124,
123, -123, 122, -122, 121, -121, 120, -120};
vector signed char h = { 2, 2, -2, -2, 127, 127, -128, -128,
10, 10, -10, -10, 64, 65, -64, -65};
vector signed char i = vmulsi (g, h);
vector signed char expect_i = {-2, 0, 4, -4, 3, -3, 0, 0,
-50, 50, 60, -60, 64, 71, 0, 120};
if (!vec_all_eq (c, expect_c))
abort ();
if (!vec_all_eq (f, expect_f))
abort ();
if (!vec_all_eq (i, expect_i))
abort ();
}

21
gcc/testsuite/gcc.target/powerpc/vec-mult-char-2.c Normal file
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@ -0,0 +1,21 @@
/* { dg-do compile { target { powerpc*-*-* && vmx_hw } } } */
/* { dg-require-effective-target powerpc_altivec_ok } */
/* { dg-options "-maltivec" } */
#include <altivec.h>
vector unsigned char vmului(vector unsigned char v,
vector unsigned char i)
{
return v * i;
}
vector signed char vmulsi(vector signed char v,
vector signed char i)
{
return v * i;
}
/* { dg-final { scan-assembler-times "vmulesb" 2 } } */
/* { dg-final { scan-assembler-times "vmulosb" 2 } } */
/* { dg-final { scan-assembler-times "vperm" 2 } } */

3
gcc/testsuite/lib/target-supports.exp
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@ -4577,7 +4577,8 @@ proc check_effective_target_vect_char_mult { } {
if { [istarget aarch64*-*-*]
|| [istarget ia64-*-*]
|| [istarget i?86-*-*] || [istarget x86_64-*-*]
|| [check_effective_target_arm32] } {
|| [check_effective_target_arm32]
|| [check_effective_target_powerpc_altivec] } {
set et_vect_char_mult_saved 1
}
}