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re PR target/59593 ([arm big-endian] using "ldrh" access a immediate which stored in a memory by word)

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PR target/59593
        * config/arm/arm.md (define_attr "arch"): Add v6t2.
        (define_attr "arch_enabled"): Add test for the above.
        (*movhi_insn_arch4): Add new alternative.

Co-Authored-By: Shanyao Chen <chenshanyao@huawei.com>

From-SVN: r217772
This commit is contained in:
Felix Yang 2014-11-19 13:46:16 +00:00 committed by Fei Yang
parent 74893f2591
commit 0096508a25
2 changed files with 23 additions and 7 deletions
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8
gcc/ChangeLog
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@ -1,3 +1,11 @@
2014-11-19 Felix Yang <felix.yang@huawei.com>
Shanyao Chen <chenshanyao@huawei.com>
PR target/59593
* config/arm/arm.md (define_attr "arch"): Add v6t2.
(define_attr "arch_enabled"): Add test for the above.
(*movhi_insn_arch4): Add new alternative.
2014-11-19 Richard Henderson <rth@redhat.com>
* c-family/c-common.c (c_common_reswords): Add

22
gcc/config/arm/arm.md
View File

@ -125,9 +125,10 @@
; This can be "a" for ARM, "t" for either of the Thumbs, "32" for
; TARGET_32BIT, "t1" or "t2" to specify a specific Thumb mode. "v6"
; for ARM or Thumb-2 with arm_arch6, and nov6 for ARM without
; arm_arch6. This attribute is used to compute attribute "enabled",
; use type "any" to enable an alternative in all cases.
(define_attr "arch" "any,a,t,32,t1,t2,v6,nov6,neon_for_64bits,avoid_neon_for_64bits,iwmmxt,iwmmxt2,armv6_or_vfpv3"
; arm_arch6. "v6t2" for Thumb-2 with arm_arch6. This attribute is
; used to compute attribute "enabled", use type "any" to enable an
; alternative in all cases.
(define_attr "arch" "any,a,t,32,t1,t2,v6,nov6,v6t2,neon_for_64bits,avoid_neon_for_64bits,iwmmxt,iwmmxt2,armv6_or_vfpv3"
(const_string "any"))
(define_attr "arch_enabled" "no,yes"
@ -162,6 +163,10 @@
(match_test "TARGET_32BIT && !arm_arch6"))
(const_string "yes")
(and (eq_attr "arch" "v6t2")
(match_test "TARGET_32BIT && arm_arch6 && arm_arch_thumb2"))
(const_string "yes")
(and (eq_attr "arch" "avoid_neon_for_64bits")
(match_test "TARGET_NEON")
(not (match_test "TARGET_PREFER_NEON_64BITS")))
@ -6288,8 +6293,8 @@
;; Pattern to recognize insn generated default case above
(define_insn "*movhi_insn_arch4"
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r")
(match_operand:HI 1 "general_operand" "rIk,K,r,mi"))]
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,r,m,r")
(match_operand:HI 1 "general_operand" "rIk,K,n,r,mi"))]
"TARGET_ARM
&& arm_arch4
&& (register_operand (operands[0], HImode)
@ -6297,16 +6302,19 @@
"@
mov%?\\t%0, %1\\t%@ movhi
mvn%?\\t%0, #%B1\\t%@ movhi
movw%?\\t%0, %1\\t%@ movhi
str%(h%)\\t%1, %0\\t%@ movhi
ldr%(h%)\\t%0, %1\\t%@ movhi"
[(set_attr "predicable" "yes")
(set_attr "pool_range" "*,*,*,256")
(set_attr "neg_pool_range" "*,*,*,244")
(set_attr "pool_range" "*,*,*,*,256")
(set_attr "neg_pool_range" "*,*,*,*,244")
(set_attr "arch" "*,*,v6t2,*,*")
(set_attr_alternative "type"
[(if_then_else (match_operand 1 "const_int_operand" "")
(const_string "mov_imm" )
(const_string "mov_reg"))
(const_string "mvn_imm")
(const_string "mov_imm")
(const_string "store1")
(const_string "load1")])]
)