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[73/77] Pass scalar_mode to scalar_mode_supported_p
This patch makes the preferred_simd_mode target hook take a scalar_mode rather than a machine_mode. 2017-08-30 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * target.def (preferred_simd_mode): Take a scalar_mode instead of a machine_mode. * targhooks.h (default_preferred_simd_mode): Likewise. * targhooks.c (default_preferred_simd_mode): Likewise. * config/arc/arc.c (arc_preferred_simd_mode): Likewise. * config/arm/arm.c (arm_preferred_simd_mode): Likewise. * config/c6x/c6x.c (c6x_preferred_simd_mode): Likewise. * config/epiphany/epiphany.c (epiphany_preferred_simd_mode): Likewise. * config/i386/i386.c (ix86_preferred_simd_mode): Likewise. * config/mips/mips.c (mips_preferred_simd_mode): Likewise. * config/nvptx/nvptx.c (nvptx_preferred_simd_mode): Likewise. * config/powerpcspe/powerpcspe.c (rs6000_preferred_simd_mode): Likewise. * config/rs6000/rs6000.c (rs6000_preferred_simd_mode): Likewise. * config/s390/s390.c (s390_preferred_simd_mode): Likewise. * config/sparc/sparc.c (sparc_preferred_simd_mode): Likewise. * config/aarch64/aarch64.c (aarch64_preferred_simd_mode): Likewise. (aarch64_simd_scalar_immediate_valid_for_move): Update accordingly. * doc/tm.texi: Regenerate. * optabs-query.c (can_vec_mask_load_store_p): Return false for non-scalar modes. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r251524
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@ -1,3 +1,29 @@
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2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
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Alan Hayward <alan.hayward@arm.com>
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David Sherwood <david.sherwood@arm.com>
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* target.def (preferred_simd_mode): Take a scalar_mode
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instead of a machine_mode.
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* targhooks.h (default_preferred_simd_mode): Likewise.
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* targhooks.c (default_preferred_simd_mode): Likewise.
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* config/arc/arc.c (arc_preferred_simd_mode): Likewise.
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* config/arm/arm.c (arm_preferred_simd_mode): Likewise.
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* config/c6x/c6x.c (c6x_preferred_simd_mode): Likewise.
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* config/epiphany/epiphany.c (epiphany_preferred_simd_mode): Likewise.
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* config/i386/i386.c (ix86_preferred_simd_mode): Likewise.
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* config/mips/mips.c (mips_preferred_simd_mode): Likewise.
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* config/nvptx/nvptx.c (nvptx_preferred_simd_mode): Likewise.
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* config/powerpcspe/powerpcspe.c (rs6000_preferred_simd_mode):
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Likewise.
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* config/rs6000/rs6000.c (rs6000_preferred_simd_mode): Likewise.
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* config/s390/s390.c (s390_preferred_simd_mode): Likewise.
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* config/sparc/sparc.c (sparc_preferred_simd_mode): Likewise.
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* config/aarch64/aarch64.c (aarch64_preferred_simd_mode): Likewise.
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(aarch64_simd_scalar_immediate_valid_for_move): Update accordingly.
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* doc/tm.texi: Regenerate.
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* optabs-query.c (can_vec_mask_load_store_p): Return false for
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non-scalar modes.
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2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
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Alan Hayward <alan.hayward@arm.com>
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David Sherwood <david.sherwood@arm.com>
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@ -11263,7 +11263,7 @@ aarch64_simd_container_mode (machine_mode mode, unsigned width)
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/* Return 128-bit container as the preferred SIMD mode for MODE. */
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static machine_mode
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aarch64_preferred_simd_mode (machine_mode mode)
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aarch64_preferred_simd_mode (scalar_mode mode)
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{
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return aarch64_simd_container_mode (mode, 128);
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}
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@ -11693,7 +11693,7 @@ aarch64_simd_scalar_immediate_valid_for_move (rtx op, machine_mode mode)
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machine_mode vmode;
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gcc_assert (!VECTOR_MODE_P (mode));
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vmode = aarch64_preferred_simd_mode (mode);
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vmode = aarch64_preferred_simd_mode (as_a <scalar_mode> (mode));
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rtx op_v = aarch64_simd_gen_const_vector_dup (vmode, INTVAL (op));
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return aarch64_simd_valid_immediate (op_v, vmode, false, NULL);
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}
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@ -332,7 +332,7 @@ arc_vector_mode_supported_p (machine_mode mode)
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/* Implements target hook TARGET_VECTORIZE_PREFERRED_SIMD_MODE. */
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static machine_mode
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arc_preferred_simd_mode (machine_mode mode)
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arc_preferred_simd_mode (scalar_mode mode)
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{
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switch (mode)
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{
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@ -269,7 +269,7 @@ static bool xscale_sched_adjust_cost (rtx_insn *, int, rtx_insn *, int *);
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static bool fa726te_sched_adjust_cost (rtx_insn *, int, rtx_insn *, int *);
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static bool arm_array_mode_supported_p (machine_mode,
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unsigned HOST_WIDE_INT);
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static machine_mode arm_preferred_simd_mode (machine_mode);
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static machine_mode arm_preferred_simd_mode (scalar_mode);
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static bool arm_class_likely_spilled_p (reg_class_t);
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static HOST_WIDE_INT arm_vector_alignment (const_tree type);
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static bool arm_vector_alignment_reachable (const_tree type, bool is_packed);
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@ -26950,7 +26950,7 @@ arm_array_mode_supported_p (machine_mode mode,
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widths are supported properly by the middle-end. */
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static machine_mode
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arm_preferred_simd_mode (machine_mode mode)
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arm_preferred_simd_mode (scalar_mode mode)
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{
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if (TARGET_NEON)
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switch (mode)
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@ -6239,7 +6239,7 @@ c6x_vector_mode_supported_p (machine_mode mode)
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/* Implements TARGET_VECTORIZE_PREFERRED_SIMD_MODE. */
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static machine_mode
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c6x_preferred_simd_mode (machine_mode mode)
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c6x_preferred_simd_mode (scalar_mode mode)
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{
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switch (mode)
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{
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@ -2774,7 +2774,7 @@ epiphany_min_divisions_for_recip_mul (machine_mode mode)
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}
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static machine_mode
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epiphany_preferred_simd_mode (machine_mode mode ATTRIBUTE_UNUSED)
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epiphany_preferred_simd_mode (scalar_mode mode ATTRIBUTE_UNUSED)
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{
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return TARGET_VECT_DOUBLE ? DImode : SImode;
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}
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@ -51515,7 +51515,7 @@ ix86_reassociation_width (unsigned int, machine_mode mode)
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place emms and femms instructions. */
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static machine_mode
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ix86_preferred_simd_mode (machine_mode mode)
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ix86_preferred_simd_mode (scalar_mode mode)
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{
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if (!TARGET_SSE)
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return word_mode;
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@ -13324,7 +13324,7 @@ mips_scalar_mode_supported_p (scalar_mode mode)
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/* Implement TARGET_VECTORIZE_PREFERRED_SIMD_MODE. */
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static machine_mode
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mips_preferred_simd_mode (machine_mode mode)
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mips_preferred_simd_mode (scalar_mode mode)
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{
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if (TARGET_PAIRED_SINGLE_FLOAT
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&& mode == SFmode)
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@ -5486,7 +5486,7 @@ nvptx_vector_mode_supported (machine_mode mode)
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/* Return the preferred mode for vectorizing scalar MODE. */
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static machine_mode
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nvptx_preferred_simd_mode (machine_mode mode)
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nvptx_preferred_simd_mode (scalar_mode mode)
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{
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switch (mode)
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{
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@ -5877,7 +5877,7 @@ rs6000_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost,
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/* Implement targetm.vectorize.preferred_simd_mode. */
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static machine_mode
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rs6000_preferred_simd_mode (machine_mode mode)
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rs6000_preferred_simd_mode (scalar_mode mode)
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{
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if (TARGET_VSX)
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switch (mode)
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@ -5527,7 +5527,7 @@ rs6000_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost,
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/* Implement targetm.vectorize.preferred_simd_mode. */
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static machine_mode
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rs6000_preferred_simd_mode (machine_mode mode)
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rs6000_preferred_simd_mode (scalar_mode mode)
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{
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if (TARGET_VSX)
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switch (mode)
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@ -15496,7 +15496,7 @@ s390_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update)
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/* Return the vector mode to be used for inner mode MODE when doing
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vectorization. */
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static machine_mode
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s390_preferred_simd_mode (machine_mode mode)
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s390_preferred_simd_mode (scalar_mode mode)
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{
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if (TARGET_VX)
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switch (mode)
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@ -662,7 +662,7 @@ static void sparc_conditional_register_usage (void);
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static const char *sparc_mangle_type (const_tree);
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#endif
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static void sparc_trampoline_init (rtx, tree, rtx);
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static machine_mode sparc_preferred_simd_mode (machine_mode);
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static machine_mode sparc_preferred_simd_mode (scalar_mode);
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static reg_class_t sparc_preferred_reload_class (rtx x, reg_class_t rclass);
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static bool sparc_lra_p (void);
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static bool sparc_print_operand_punct_valid_p (unsigned char);
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@ -7694,7 +7694,7 @@ sparc_vector_mode_supported_p (machine_mode mode)
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/* Implement the TARGET_VECTORIZE_PREFERRED_SIMD_MODE target hook. */
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static machine_mode
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sparc_preferred_simd_mode (machine_mode mode)
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sparc_preferred_simd_mode (scalar_mode mode)
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{
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if (TARGET_VIS)
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switch (mode)
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@ -5805,7 +5805,7 @@ the elements in the vectors should be of type @var{type}. @var{is_packed}
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parameter is true if the memory access is defined in a packed struct.
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@end deftypefn
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@deftypefn {Target Hook} machine_mode TARGET_VECTORIZE_PREFERRED_SIMD_MODE (machine_mode @var{mode})
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@deftypefn {Target Hook} machine_mode TARGET_VECTORIZE_PREFERRED_SIMD_MODE (scalar_mode @var{mode})
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This hook should return the preferred mode for vectorizing scalar
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mode @var{mode}. The default is
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equal to @code{word_mode}, because the vectorizer can do some
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@ -524,7 +524,11 @@ can_vec_mask_load_store_p (machine_mode mode,
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/* See if there is any chance the mask load or store might be
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vectorized. If not, punt. */
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vmode = targetm.vectorize.preferred_simd_mode (mode);
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scalar_mode smode;
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if (!is_a <scalar_mode> (mode, &smode))
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return false;
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vmode = targetm.vectorize.preferred_simd_mode (smode);
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if (!VECTOR_MODE_P (vmode))
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return false;
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@ -541,9 +545,9 @@ can_vec_mask_load_store_p (machine_mode mode,
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{
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unsigned int cur = 1 << floor_log2 (vector_sizes);
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vector_sizes &= ~cur;
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if (cur <= GET_MODE_SIZE (mode))
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if (cur <= GET_MODE_SIZE (smode))
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continue;
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vmode = mode_for_vector (mode, cur / GET_MODE_SIZE (mode));
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vmode = mode_for_vector (smode, cur / GET_MODE_SIZE (smode));
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mask_mode = targetm.vectorize.get_mask_mode (GET_MODE_NUNITS (vmode),
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cur);
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if (VECTOR_MODE_P (vmode)
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@ -1859,7 +1859,7 @@ mode @var{mode}. The default is\n\
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equal to @code{word_mode}, because the vectorizer can do some\n\
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transformations even in absence of specialized @acronym{SIMD} hardware.",
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machine_mode,
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(machine_mode mode),
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(scalar_mode mode),
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default_preferred_simd_mode)
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/* Returns a mask of vector sizes to iterate over when auto-vectorizing
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@ -1159,7 +1159,7 @@ default_builtin_support_vector_misalignment (machine_mode mode,
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possibly adds/subtracts using bit-twiddling. */
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machine_mode
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default_preferred_simd_mode (machine_mode mode ATTRIBUTE_UNUSED)
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default_preferred_simd_mode (scalar_mode)
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{
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return word_mode;
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}
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@ -100,7 +100,7 @@ extern bool
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default_builtin_support_vector_misalignment (machine_mode mode,
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const_tree,
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int, bool);
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extern machine_mode default_preferred_simd_mode (machine_mode mode);
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extern machine_mode default_preferred_simd_mode (scalar_mode mode);
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extern unsigned int default_autovectorize_vector_sizes (void);
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extern machine_mode default_get_mask_mode (unsigned, unsigned);
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extern void *default_init_cost (struct loop *);
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