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82f0ce2726
This provide several advantages: - more flexibility in designing unit tests - unit tests can be glued to speed up compilation - unit tests are compiled with same predefined macros, which is a requirement for zapcc
250 lines
9.2 KiB
C++
250 lines
9.2 KiB
C++
// This file is part of Eigen, a lightweight C++ template library
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// for linear algebra.
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//
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// Copyright (C) 2016
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// Mehdi Goli Codeplay Software Ltd.
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// Ralph Potter Codeplay Software Ltd.
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// Luke Iwanski Codeplay Software Ltd.
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// Contact: <eigen@codeplay.com>
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// Benoit Steiner <benoit.steiner.goog@gmail.com>
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//
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// This Source Code Form is subject to the terms of the Mozilla
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// Public License v. 2.0. If a copy of the MPL was not distributed
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// with this file, You can obtain one at http://mozilla.org/MPL/2.0/.
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#define EIGEN_TEST_NO_LONGDOUBLE
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#define EIGEN_TEST_NO_COMPLEX
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#define EIGEN_DEFAULT_DENSE_INDEX_TYPE int64_t
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#define EIGEN_USE_SYCL
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#include "main.h"
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#include <Eigen/CXX11/Tensor>
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using Eigen::Tensor;
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template <typename DataType, int DataLayout, typename IndexType>
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static void test_simple_patch_sycl(const Eigen::SyclDevice& sycl_device){
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IndexType sizeDim1 = 2;
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IndexType sizeDim2 = 3;
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IndexType sizeDim3 = 5;
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IndexType sizeDim4 = 7;
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array<IndexType, 4> tensorRange = {{sizeDim1, sizeDim2, sizeDim3, sizeDim4}};
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array<IndexType, 5> patchTensorRange;
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if (DataLayout == ColMajor) {
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patchTensorRange = {{1, 1, 1, 1, sizeDim1*sizeDim2*sizeDim3*sizeDim4}};
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}else{
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patchTensorRange = {{sizeDim1*sizeDim2*sizeDim3*sizeDim4,1, 1, 1, 1}};
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}
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Tensor<DataType, 4, DataLayout,IndexType> tensor(tensorRange);
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Tensor<DataType, 5, DataLayout,IndexType> no_patch(patchTensorRange);
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tensor.setRandom();
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array<ptrdiff_t, 4> patch_dims;
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patch_dims[0] = 1;
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patch_dims[1] = 1;
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patch_dims[2] = 1;
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patch_dims[3] = 1;
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const size_t tensorBuffSize =tensor.size()*sizeof(DataType);
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size_t patchTensorBuffSize =no_patch.size()*sizeof(DataType);
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DataType* gpu_data_tensor = static_cast<DataType*>(sycl_device.allocate(tensorBuffSize));
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DataType* gpu_data_no_patch = static_cast<DataType*>(sycl_device.allocate(patchTensorBuffSize));
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TensorMap<Tensor<DataType, 4, DataLayout,IndexType>> gpu_tensor(gpu_data_tensor, tensorRange);
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TensorMap<Tensor<DataType, 5, DataLayout,IndexType>> gpu_no_patch(gpu_data_no_patch, patchTensorRange);
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sycl_device.memcpyHostToDevice(gpu_data_tensor, tensor.data(), tensorBuffSize);
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gpu_no_patch.device(sycl_device)=gpu_tensor.extract_patches(patch_dims);
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sycl_device.memcpyDeviceToHost(no_patch.data(), gpu_data_no_patch, patchTensorBuffSize);
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if (DataLayout == ColMajor) {
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VERIFY_IS_EQUAL(no_patch.dimension(0), 1);
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VERIFY_IS_EQUAL(no_patch.dimension(1), 1);
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VERIFY_IS_EQUAL(no_patch.dimension(2), 1);
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VERIFY_IS_EQUAL(no_patch.dimension(3), 1);
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VERIFY_IS_EQUAL(no_patch.dimension(4), tensor.size());
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} else {
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VERIFY_IS_EQUAL(no_patch.dimension(0), tensor.size());
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VERIFY_IS_EQUAL(no_patch.dimension(1), 1);
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VERIFY_IS_EQUAL(no_patch.dimension(2), 1);
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VERIFY_IS_EQUAL(no_patch.dimension(3), 1);
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VERIFY_IS_EQUAL(no_patch.dimension(4), 1);
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}
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for (int i = 0; i < tensor.size(); ++i) {
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VERIFY_IS_EQUAL(tensor.data()[i], no_patch.data()[i]);
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}
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patch_dims[0] = 2;
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patch_dims[1] = 3;
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patch_dims[2] = 5;
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patch_dims[3] = 7;
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if (DataLayout == ColMajor) {
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patchTensorRange = {{sizeDim1,sizeDim2,sizeDim3,sizeDim4,1}};
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}else{
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patchTensorRange = {{1,sizeDim1,sizeDim2,sizeDim3,sizeDim4}};
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}
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Tensor<DataType, 5, DataLayout,IndexType> single_patch(patchTensorRange);
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patchTensorBuffSize =single_patch.size()*sizeof(DataType);
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DataType* gpu_data_single_patch = static_cast<DataType*>(sycl_device.allocate(patchTensorBuffSize));
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TensorMap<Tensor<DataType, 5, DataLayout,IndexType>> gpu_single_patch(gpu_data_single_patch, patchTensorRange);
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gpu_single_patch.device(sycl_device)=gpu_tensor.extract_patches(patch_dims);
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sycl_device.memcpyDeviceToHost(single_patch.data(), gpu_data_single_patch, patchTensorBuffSize);
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if (DataLayout == ColMajor) {
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VERIFY_IS_EQUAL(single_patch.dimension(0), 2);
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VERIFY_IS_EQUAL(single_patch.dimension(1), 3);
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VERIFY_IS_EQUAL(single_patch.dimension(2), 5);
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VERIFY_IS_EQUAL(single_patch.dimension(3), 7);
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VERIFY_IS_EQUAL(single_patch.dimension(4), 1);
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} else {
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VERIFY_IS_EQUAL(single_patch.dimension(0), 1);
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VERIFY_IS_EQUAL(single_patch.dimension(1), 2);
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VERIFY_IS_EQUAL(single_patch.dimension(2), 3);
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VERIFY_IS_EQUAL(single_patch.dimension(3), 5);
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VERIFY_IS_EQUAL(single_patch.dimension(4), 7);
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}
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for (int i = 0; i < tensor.size(); ++i) {
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VERIFY_IS_EQUAL(tensor.data()[i], single_patch.data()[i]);
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}
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patch_dims[0] = 1;
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patch_dims[1] = 2;
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patch_dims[2] = 2;
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patch_dims[3] = 1;
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if (DataLayout == ColMajor) {
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patchTensorRange = {{1,2,2,1,2*2*4*7}};
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}else{
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patchTensorRange = {{2*2*4*7, 1, 2,2,1}};
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}
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Tensor<DataType, 5, DataLayout,IndexType> twod_patch(patchTensorRange);
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patchTensorBuffSize =twod_patch.size()*sizeof(DataType);
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DataType* gpu_data_twod_patch = static_cast<DataType*>(sycl_device.allocate(patchTensorBuffSize));
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TensorMap<Tensor<DataType, 5, DataLayout,IndexType>> gpu_twod_patch(gpu_data_twod_patch, patchTensorRange);
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gpu_twod_patch.device(sycl_device)=gpu_tensor.extract_patches(patch_dims);
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sycl_device.memcpyDeviceToHost(twod_patch.data(), gpu_data_twod_patch, patchTensorBuffSize);
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if (DataLayout == ColMajor) {
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VERIFY_IS_EQUAL(twod_patch.dimension(0), 1);
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VERIFY_IS_EQUAL(twod_patch.dimension(1), 2);
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VERIFY_IS_EQUAL(twod_patch.dimension(2), 2);
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VERIFY_IS_EQUAL(twod_patch.dimension(3), 1);
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VERIFY_IS_EQUAL(twod_patch.dimension(4), 2*2*4*7);
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} else {
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VERIFY_IS_EQUAL(twod_patch.dimension(0), 2*2*4*7);
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VERIFY_IS_EQUAL(twod_patch.dimension(1), 1);
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VERIFY_IS_EQUAL(twod_patch.dimension(2), 2);
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VERIFY_IS_EQUAL(twod_patch.dimension(3), 2);
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VERIFY_IS_EQUAL(twod_patch.dimension(4), 1);
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}
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for (int i = 0; i < 2; ++i) {
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for (int j = 0; j < 2; ++j) {
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for (int k = 0; k < 4; ++k) {
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for (int l = 0; l < 7; ++l) {
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int patch_loc;
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if (DataLayout == ColMajor) {
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patch_loc = i + 2 * (j + 2 * (k + 4 * l));
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} else {
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patch_loc = l + 7 * (k + 4 * (j + 2 * i));
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}
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for (int x = 0; x < 2; ++x) {
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for (int y = 0; y < 2; ++y) {
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if (DataLayout == ColMajor) {
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VERIFY_IS_EQUAL(tensor(i,j+x,k+y,l), twod_patch(0,x,y,0,patch_loc));
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} else {
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VERIFY_IS_EQUAL(tensor(i,j+x,k+y,l), twod_patch(patch_loc,0,x,y,0));
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}
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}
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}
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}
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}
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}
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}
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patch_dims[0] = 1;
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patch_dims[1] = 2;
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patch_dims[2] = 3;
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patch_dims[3] = 5;
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if (DataLayout == ColMajor) {
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patchTensorRange = {{1,2,3,5,2*2*3*3}};
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}else{
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patchTensorRange = {{2*2*3*3, 1, 2,3,5}};
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}
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Tensor<DataType, 5, DataLayout,IndexType> threed_patch(patchTensorRange);
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patchTensorBuffSize =threed_patch.size()*sizeof(DataType);
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DataType* gpu_data_threed_patch = static_cast<DataType*>(sycl_device.allocate(patchTensorBuffSize));
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TensorMap<Tensor<DataType, 5, DataLayout,IndexType>> gpu_threed_patch(gpu_data_threed_patch, patchTensorRange);
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gpu_threed_patch.device(sycl_device)=gpu_tensor.extract_patches(patch_dims);
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sycl_device.memcpyDeviceToHost(threed_patch.data(), gpu_data_threed_patch, patchTensorBuffSize);
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if (DataLayout == ColMajor) {
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VERIFY_IS_EQUAL(threed_patch.dimension(0), 1);
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VERIFY_IS_EQUAL(threed_patch.dimension(1), 2);
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VERIFY_IS_EQUAL(threed_patch.dimension(2), 3);
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VERIFY_IS_EQUAL(threed_patch.dimension(3), 5);
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VERIFY_IS_EQUAL(threed_patch.dimension(4), 2*2*3*3);
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} else {
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VERIFY_IS_EQUAL(threed_patch.dimension(0), 2*2*3*3);
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VERIFY_IS_EQUAL(threed_patch.dimension(1), 1);
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VERIFY_IS_EQUAL(threed_patch.dimension(2), 2);
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VERIFY_IS_EQUAL(threed_patch.dimension(3), 3);
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VERIFY_IS_EQUAL(threed_patch.dimension(4), 5);
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}
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for (int i = 0; i < 2; ++i) {
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for (int j = 0; j < 2; ++j) {
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for (int k = 0; k < 3; ++k) {
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for (int l = 0; l < 3; ++l) {
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int patch_loc;
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if (DataLayout == ColMajor) {
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patch_loc = i + 2 * (j + 2 * (k + 3 * l));
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} else {
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patch_loc = l + 3 * (k + 3 * (j + 2 * i));
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}
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for (int x = 0; x < 2; ++x) {
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for (int y = 0; y < 3; ++y) {
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for (int z = 0; z < 5; ++z) {
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if (DataLayout == ColMajor) {
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VERIFY_IS_EQUAL(tensor(i,j+x,k+y,l+z), threed_patch(0,x,y,z,patch_loc));
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} else {
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VERIFY_IS_EQUAL(tensor(i,j+x,k+y,l+z), threed_patch(patch_loc,0,x,y,z));
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}
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}
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}
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}
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}
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}
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}
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}
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sycl_device.deallocate(gpu_data_tensor);
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sycl_device.deallocate(gpu_data_no_patch);
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sycl_device.deallocate(gpu_data_single_patch);
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sycl_device.deallocate(gpu_data_twod_patch);
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sycl_device.deallocate(gpu_data_threed_patch);
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}
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template<typename DataType, typename dev_Selector> void sycl_tensor_patch_test_per_device(dev_Selector s){
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QueueInterface queueInterface(s);
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auto sycl_device = Eigen::SyclDevice(&queueInterface);
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test_simple_patch_sycl<DataType, RowMajor, int64_t>(sycl_device);
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test_simple_patch_sycl<DataType, ColMajor, int64_t>(sycl_device);
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}
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EIGEN_DECLARE_TEST(cxx11_tensor_patch_sycl)
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{
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for (const auto& device :Eigen::get_sycl_supported_devices()) {
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CALL_SUBTEST(sycl_tensor_patch_test_per_device<float>(device));
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}
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}
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