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Merged in rmlarsen/eigen (pull request PR-178)
Eigen Tensor cost model part 2: Thread scheduling for standard evaluators and reductions.
This commit is contained in:
Benoit Steiner
commit
eb669f989f
@ -10,9 +10,9 @@
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#ifndef EIGEN_CXX11_TENSOR_TENSOR_COST_MODEL_H
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#define EIGEN_CXX11_TENSOR_TENSOR_COST_MODEL_H
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#if !defined(EIGEN_USE_GPU)
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#define EIGEN_USE_COST_MODEL
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#endif
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//#if !defined(EIGEN_USE_GPU)
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//#define EIGEN_USE_COST_MODEL
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//#endif
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namespace Eigen {
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@ -189,6 +189,11 @@ struct TensorEvaluator<const Derived, Device>
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return loadConstant(m_data+index);
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}
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EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE TensorOpCost costPerCoeff(bool vectorized) const {
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return TensorOpCost(sizeof(CoeffReturnType), 0, 0, vectorized,
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internal::unpacket_traits<PacketReturnType>::size);
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}
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EIGEN_DEVICE_FUNC const Scalar* data() const { return m_data; }
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protected:
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@ -59,9 +59,16 @@ class TensorExecutor<Expression, DefaultDevice, true>
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{
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const Index size = array_prod(evaluator.dimensions());
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const int PacketSize = unpacket_traits<typename TensorEvaluator<Expression, DefaultDevice>::PacketReturnType>::size;
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// Manually unroll this loop since compilers don't do it.
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const Index UnrolledSize = (size / (4 * PacketSize)) * 4 * PacketSize;
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for (Index i = 0; i < UnrolledSize; i += 4*PacketSize) {
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evaluator.evalPacket(i);
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evaluator.evalPacket(i+PacketSize);
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evaluator.evalPacket(i+2*PacketSize);
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evaluator.evalPacket(i+3*PacketSize);
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}
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const Index VectorizedSize = (size / PacketSize) * PacketSize;
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for (Index i = 0; i < VectorizedSize; i += PacketSize) {
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for (Index i = UnrolledSize; i < VectorizedSize; i += PacketSize) {
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evaluator.evalPacket(i);
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}
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for (Index i = VectorizedSize; i < size; ++i) {
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@ -78,8 +85,9 @@ class TensorExecutor<Expression, DefaultDevice, true>
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#ifdef EIGEN_USE_THREADS
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template <typename Evaluator, typename Index, bool Vectorizable>
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struct EvalRange {
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static void run(Evaluator evaluator, const Index first, const Index last) {
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eigen_assert(last > first);
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static void run(Evaluator* evaluator_in, const Index first, const Index last) {
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Evaluator evaluator = *evaluator_in;
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eigen_assert(last >= first);
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for (Index i = first; i < last; ++i) {
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evaluator.evalScalar(i);
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}
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@ -88,19 +96,26 @@ struct EvalRange {
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template <typename Evaluator, typename Index>
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struct EvalRange<Evaluator, Index, true> {
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static void run(Evaluator evaluator, const Index first, const Index last) {
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eigen_assert(last > first);
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static void run(Evaluator* evaluator_in, const Index first, const Index last) {
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Evaluator evaluator = *evaluator_in;
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eigen_assert(last >= first);
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Index i = first;
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static const int PacketSize = unpacket_traits<typename Evaluator::PacketReturnType>::size;
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const int PacketSize = unpacket_traits<typename Evaluator::PacketReturnType>::size;
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if (last - first >= PacketSize) {
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eigen_assert(first % PacketSize == 0);
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Index lastPacket = last - (last % PacketSize);
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for (; i < lastPacket; i += PacketSize) {
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Index last_chunk_offset = last - 4 * PacketSize;
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// Manually unroll this loop since compilers don't do it.
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for (; i <= last_chunk_offset; i += 4*PacketSize) {
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evaluator.evalPacket(i);
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evaluator.evalPacket(i+PacketSize);
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evaluator.evalPacket(i+2*PacketSize);
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evaluator.evalPacket(i+3*PacketSize);
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}
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last_chunk_offset = last - PacketSize;
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for (; i <= last_chunk_offset; i += PacketSize) {
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evaluator.evalPacket(i);
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}
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}
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for (; i < last; ++i) {
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evaluator.evalScalar(i);
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}
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@ -108,8 +123,7 @@ struct EvalRange<Evaluator, Index, true> {
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};
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template <typename Expression, bool Vectorizable>
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class TensorExecutor<Expression, ThreadPoolDevice, Vectorizable>
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{
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class TensorExecutor<Expression, ThreadPoolDevice, Vectorizable> {
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public:
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typedef typename Expression::Index Index;
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static inline void run(const Expression& expr, const ThreadPoolDevice& device)
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@ -119,25 +133,35 @@ class TensorExecutor<Expression, ThreadPoolDevice, Vectorizable>
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const bool needs_assign = evaluator.evalSubExprsIfNeeded(NULL);
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if (needs_assign)
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{
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const Index PacketSize = Vectorizable ? unpacket_traits<typename Evaluator::PacketReturnType>::size : 1;
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const Index size = array_prod(evaluator.dimensions());
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static const int PacketSize = Vectorizable ? unpacket_traits<typename Evaluator::PacketReturnType>::size : 1;
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int blocksz = std::ceil<int>(static_cast<float>(size)/device.numThreads()) + PacketSize - 1;
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int num_threads = device.numThreads();
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#ifdef EIGEN_USE_COST_MODEL
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if (num_threads > 1) {
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num_threads = TensorCostModel<ThreadPoolDevice>::numThreads(
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size, evaluator.costPerCoeff(Vectorizable), num_threads);
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}
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#endif
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if (num_threads == 1) {
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EvalRange<Evaluator, Index, Vectorizable>::run(&evaluator, 0, size);
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} else {
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Index blocksz = std::ceil<Index>(static_cast<float>(size)/num_threads) + PacketSize - 1;
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const Index blocksize = numext::maxi<Index>(PacketSize, (blocksz - (blocksz % PacketSize)));
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const unsigned int numblocks = static_cast<unsigned int>(size / blocksize);
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const Index numblocks = size / blocksize;
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Barrier barrier(numblocks);
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for (unsigned int i = 0; i < numblocks; ++i) {
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device.enqueue_with_barrier(&barrier, &EvalRange<Evaluator, Index, Vectorizable>::run, evaluator, i*blocksize, (i+1)*blocksize);
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for (int i = 0; i < numblocks; ++i) {
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device.enqueue_with_barrier(
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&barrier, &EvalRange<Evaluator, Index, Vectorizable>::run,
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&evaluator, i * blocksize, (i + 1) * blocksize);
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}
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if (static_cast<Index>(numblocks) * blocksize < size) {
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EvalRange<Evaluator, Index, Vectorizable>::run(evaluator, numblocks * blocksize, size);
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if (numblocks * blocksize < size) {
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EvalRange<Evaluator, Index, Vectorizable>::run(
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&evaluator, numblocks * blocksize, size);
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}
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barrier.Wait();
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}
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}
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evaluator.cleanup();
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}
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};
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@ -226,7 +250,6 @@ inline void TensorExecutor<Expression, GpuDevice, Vectorizable>::run(
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#endif // __CUDACC__
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#endif // EIGEN_USE_GPU
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} // end namespace internal
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} // end namespace Eigen
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@ -214,7 +214,7 @@ struct FullReducer {
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static EIGEN_DEVICE_FUNC void run(const Self& self, Op& reducer, const Device&, typename Self::CoeffReturnType* output) {
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const typename Self::Index num_coeffs = array_prod(self.m_impl.dimensions());
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*output = InnerMostDimReducer<Self, Op>::reduce(self, 0, num_coeffs, reducer);
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*output = InnerMostDimReducer<Self, Op, Vectorizable>::reduce(self, 0, num_coeffs, reducer);
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}
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};
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@ -222,18 +222,19 @@ struct FullReducer {
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#ifdef EIGEN_USE_THREADS
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// Multithreaded full reducers
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template <typename Self, typename Op,
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bool vectorizable = (Self::InputPacketAccess & Op::PacketAccess)>
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bool Vectorizable = (Self::InputPacketAccess & Op::PacketAccess)>
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struct FullReducerShard {
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static EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE void run(const Self& self, typename Self::Index firstIndex,
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typename Self::Index numValuesToReduce, Op& reducer,
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typename Self::CoeffReturnType* output) {
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*output = InnerMostDimReducer<Self, Op, vectorizable>::reduce(
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*output = InnerMostDimReducer<Self, Op, Vectorizable>::reduce(
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self, firstIndex, numValuesToReduce, reducer);
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}
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};
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template <typename Self, typename Op>
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struct FullReducer<Self, Op, ThreadPoolDevice, false> {
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// Multithreaded full reducer
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template <typename Self, typename Op, bool Vectorizable>
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struct FullReducer<Self, Op, ThreadPoolDevice, Vectorizable> {
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static const bool HasOptimizedImplementation = !Op::IsStateful;
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static const int PacketSize =
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unpacket_traits<typename Self::PacketReturnType>::size;
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@ -247,79 +248,44 @@ struct FullReducer<Self, Op, ThreadPoolDevice, false> {
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*output = reducer.finalize(reducer.initialize());
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return;
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}
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const std::size_t num_threads = device.numThreads();
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#ifdef EIGEN_USE_COST_MODEL
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const TensorOpCost cost =
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self.m_impl.costPerCoeff(Vectorizable) +
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TensorOpCost(0, 0, internal::functor_traits<Op>::Cost, Vectorizable,
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PacketSize);
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const int num_threads = TensorCostModel<ThreadPoolDevice>::numThreads(
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num_coeffs, cost, device.numThreads());
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#else
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const int num_threads = device.numThreads();
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#endif
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if (num_threads == 1) {
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*output = InnerMostDimReducer<Self, Op, false>::reduce(self, 0, num_coeffs, reducer);
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*output =
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InnerMostDimReducer<Self, Op, Vectorizable>::reduce(self, 0, num_coeffs, reducer);
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return;
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} else {
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const Index blocksize = std::floor<Index>(static_cast<float>(num_coeffs) / num_threads);
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const unsigned int numblocks = blocksize > 0 ? static_cast<unsigned int>(num_coeffs / blocksize) : 0;
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eigen_assert(num_coeffs >= static_cast<Index>(numblocks) * blocksize);
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}
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const Index blocksize =
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std::floor<Index>(static_cast<float>(num_coeffs) / num_threads);
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const Index numblocks = blocksize > 0 ? num_coeffs / blocksize : 0;
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eigen_assert(num_coeffs >= numblocks * blocksize);
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Barrier barrier(numblocks);
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MaxSizeVector<typename Self::CoeffReturnType> shards(numblocks, reducer.initialize());
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for (unsigned int i = 0; i < numblocks; ++i) {
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device.enqueue_with_barrier(&barrier, &FullReducerShard<Self, Op, false>::run, self,
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i * blocksize, blocksize, reducer, &shards[i]);
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}
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typename Self::CoeffReturnType finalShard;
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if (static_cast<Index>(numblocks) * blocksize < num_coeffs) {
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finalShard = InnerMostDimReducer<Self, Op, false>::reduce(
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self, numblocks * blocksize, num_coeffs - numblocks * blocksize, reducer);
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} else {
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finalShard = reducer.initialize();
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}
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barrier.Wait();
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for (unsigned int i = 0; i < numblocks; ++i) {
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reducer.reduce(shards[i], &finalShard);
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}
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*output = reducer.finalize(finalShard);
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}
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}
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};
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template <typename Self, typename Op>
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struct FullReducer<Self, Op, ThreadPoolDevice, true> {
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static const bool HasOptimizedImplementation = !Op::IsStateful;
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static const int PacketSize =
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unpacket_traits<typename Self::PacketReturnType>::size;
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// launch one reducer per thread and accumulate the result.
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static void run(const Self& self, Op& reducer, const ThreadPoolDevice& device,
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typename Self::CoeffReturnType* output) {
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typedef typename Self::Index Index;
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const Index num_coeffs = array_prod(self.m_impl.dimensions());
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if (num_coeffs == 0) {
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*output = reducer.finalize(reducer.initialize());
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return;
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}
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const std::size_t num_threads = device.numThreads();
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if (num_threads == 1) {
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*output = InnerMostDimReducer<Self, Op, true>::reduce(self, 0, num_coeffs, reducer);
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return;
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}
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const Index blocksize = std::floor<Index>(static_cast<float>(num_coeffs) / num_threads);
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const unsigned int numblocks = blocksize > 0 ? static_cast<unsigned int>(num_coeffs / blocksize) : 0;
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eigen_assert(num_coeffs >= static_cast<Index>(numblocks) * blocksize);
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Barrier barrier(numblocks);
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MaxSizeVector<typename Self::CoeffReturnType> shards(numblocks, reducer.initialize());
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for (unsigned int i = 0; i < numblocks; ++i) {
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device.enqueue_with_barrier(&barrier, &FullReducerShard<Self, Op, true>::run,
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for (Index i = 0; i < numblocks; ++i) {
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device.enqueue_with_barrier(&barrier, &FullReducerShard<Self, Op, Vectorizable>::run,
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self, i * blocksize, blocksize, reducer,
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&shards[i]);
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}
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typename Self::CoeffReturnType finalShard;
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if (static_cast<Index>(numblocks) * blocksize < num_coeffs) {
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finalShard = InnerMostDimReducer<Self, Op, true>::reduce(
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self, numblocks * blocksize, num_coeffs - numblocks * blocksize, reducer);
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if (numblocks * blocksize < num_coeffs) {
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finalShard = InnerMostDimReducer<Self, Op, Vectorizable>::reduce(
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self, numblocks * blocksize, num_coeffs - numblocks * blocksize,
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reducer);
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} else {
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finalShard = reducer.initialize();
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}
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barrier.Wait();
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for (unsigned int i = 0; i < numblocks; ++i) {
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for (Index i = 0; i < numblocks; ++i) {
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reducer.reduce(shards[i], &finalShard);
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}
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*output = reducer.finalize(finalShard);
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@ -498,13 +464,21 @@ struct TensorEvaluator<const TensorReductionOp<Op, Dims, ArgType>, Device>
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EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE const Dimensions& dimensions() const { return m_dimensions; }
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static bool size_large_enough(Index total_size) {
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#ifndef EIGEN_USE_COST_MODEL
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return total_size > 1024 * 1024;
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#else
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return true || total_size;
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#endif
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}
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EIGEN_STRONG_INLINE EIGEN_DEVICE_FUNC bool evalSubExprsIfNeeded(CoeffReturnType* data) {
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m_impl.evalSubExprsIfNeeded(NULL);
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// Use the FullReducer if possible.
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if (RunningFullReduction && internal::FullReducer<Self, Op, Device>::HasOptimizedImplementation &&
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((RunningOnGPU && (m_device.majorDeviceVersion() >= 3)) ||
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(!RunningOnGPU && (internal::array_prod(m_impl.dimensions()) > 1024 * 1024)))) {
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(!RunningOnGPU && size_large_enough(internal::array_prod(m_impl.dimensions()))))) {
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bool need_assign = false;
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if (!data) {
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