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Fix ambiguous call to CUDA __half constructor.
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@ -848,19 +848,23 @@ EIGEN_STRONG_INLINE EIGEN_DEVICE_FUNC uint16_t bit_cast<uint16_t, Eigen::half>(c
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#if defined(EIGEN_HAS_CUDA_FP16) && EIGEN_CUDA_SDK_VER >= 90000
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__device__ EIGEN_STRONG_INLINE Eigen::half __shfl_sync(unsigned mask, Eigen::half var, int srcLane, int width=warpSize) {
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return static_cast<Eigen::half>(__shfl_sync(mask, static_cast<__half>(var), srcLane, width));
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const __half h = var;
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return static_cast<Eigen::half>(__shfl_sync(mask, h, srcLane, width));
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}
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__device__ EIGEN_STRONG_INLINE Eigen::half __shfl_up_sync(unsigned mask, Eigen::half var, unsigned int delta, int width=warpSize) {
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return static_cast<Eigen::half>(__shfl_up_sync(mask, static_cast<__half>(var), delta, width));
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const __half h = var;
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return static_cast<Eigen::half>(__shfl_up_sync(mask, h, delta, width));
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}
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__device__ EIGEN_STRONG_INLINE Eigen::half __shfl_down_sync(unsigned mask, Eigen::half var, unsigned int delta, int width=warpSize) {
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return static_cast<Eigen::half>(__shfl_down_sync(mask, static_cast<__half>(var), delta, width));
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const __half h = var;
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return static_cast<Eigen::half>(__shfl_down_sync(mask, h, delta, width));
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}
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__device__ EIGEN_STRONG_INLINE Eigen::half __shfl_xor_sync(unsigned mask, Eigen::half var, int laneMask, int width=warpSize) {
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return static_cast<Eigen::half>(__shfl_xor_sync(mask, static_cast<__half>(var), laneMask, width));
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const __half h = var;
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return static_cast<Eigen::half>(__shfl_xor_sync(mask, h, laneMask, width));
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}
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#else // HIP or CUDA SDK < 9.0
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