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update the fast 4x4 SSE inversion code from more recent Intel's code
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@ -1,7 +1,8 @@
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// This file is part of Eigen, a lightweight C++ template library
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// for linear algebra.
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//
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// Copyright (C) 1999 Intel Corporation
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// Copyright (C) 2001 Intel Corporation
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// Copyright (C) 2010 Gael Guennebaud <g.gael@free.fr>
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// Copyright (C) 2009 Benoit Jacob <jacob.benoit.1@gmail.com>
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//
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// Eigen is free software; you can redistribute it and/or
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@ -23,12 +24,20 @@
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// License and a copy of the GNU General Public License along with
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// Eigen. If not, see <http://www.gnu.org/licenses/>.
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// The SSE code for the 4x4 float matrix inverse in this file comes from the file
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// ftp://download.intel.com/design/PentiumIII/sml/24504301.pdf
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// See page ii of that document for legal stuff. Not being lawyers, we just assume
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// here that if Intel makes this document publically available, with source code
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// and detailed explanations, it's because they want their CPUs to be fed with
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// good code, and therefore they presumably don't mind us using it in Eigen.
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// The SSE code for the 4x4 float matrix inverse in this file comes from
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// the following Intel's library:
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// http://software.intel.com/en-us/articles/optimized-matrix-library-for-use-with-the-intel-pentiumr-4-processors-sse2-instructions/
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//
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// Here is the respective copyright and license statement:
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//
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// Copyright (c) 2001 Intel Corporation.
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//
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// Permition is granted to use, copy, distribute and prepare derivative works
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// of this library for any purpose and without fee, provided, that the above
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// copyright notice and this statement appear in all copies.
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// Intel makes no representations about the suitability of this software for
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// any purpose, and specifically disclaims all warranties.
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// See LEGAL.TXT for all the legal information.
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#ifndef EIGEN_INVERSE_SSE_H
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#define EIGEN_INVERSE_SSE_H
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@ -38,114 +47,110 @@ struct ei_compute_inverse_size4<Architecture::SSE, float, MatrixType, ResultType
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{
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static void run(const MatrixType& matrix, ResultType& result)
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{
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// Variables (Streaming SIMD Extensions registers) which will contain cofactors and, later, the
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// lines of the inverted matrix.
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__m128 minor0, minor1, minor2, minor3;
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EIGEN_ALIGN16 const int _Sign_PNNP[4] = { 0x00000000, 0x80000000, 0x80000000, 0x00000000 };
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// Variables which will contain the lines of the reference matrix and, later (after the transposition),
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// the columns of the original matrix.
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__m128 row0, row1, row2, row3;
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// Load the full matrix into registers
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__m128 _L1 = matrix.template packet<Aligned>( 0);
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__m128 _L2 = matrix.template packet<Aligned>( 4);
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__m128 _L3 = matrix.template packet<Aligned>( 8);
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__m128 _L4 = matrix.template packet<Aligned>(12);
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// Temporary variables and the variable that will contain the matrix determinant.
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__m128 det, tmp1;
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// The inverse is calculated using "Divide and Conquer" technique. The
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// original matrix is divide into four 2x2 sub-matrices. Since each
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// register holds four matrix element, the smaller matrices are
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// represented as a registers. Hence we get a better locality of the
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// calculations.
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// Matrix transposition
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const float *src = matrix.data();
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tmp1 = _mm_loadh_pi(_mm_castpd_ps(_mm_load_sd((double*)src)), (__m64*)(src+ 4));
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row1 = _mm_loadh_pi(_mm_castpd_ps(_mm_load_sd((double*)(src+8))), (__m64*)(src+12));
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row0 = _mm_shuffle_ps(tmp1, row1, 0x88);
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row1 = _mm_shuffle_ps(row1, tmp1, 0xDD);
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tmp1 = _mm_loadh_pi(_mm_castpd_ps(_mm_load_sd((double*)(src+ 2))), (__m64*)(src+ 6));
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row3 = _mm_loadh_pi(_mm_castpd_ps(_mm_load_sd((double*)(src+10))), (__m64*)(src+14));
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row2 = _mm_shuffle_ps(tmp1, row3, 0x88);
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row3 = _mm_shuffle_ps(row3, tmp1, 0xDD);
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__m128 A = _mm_movelh_ps(_L1, _L2), // the four sub-matrices
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B = _mm_movehl_ps(_L2, _L1),
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C = _mm_movelh_ps(_L3, _L4),
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D = _mm_movehl_ps(_L4, _L3);
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__m128 iA, iB, iC, iD, // partial inverse of the sub-matrices
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DC, AB;
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__m128 dA, dB, dC, dD; // determinant of the sub-matrices
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__m128 det, d, d1, d2;
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__m128 rd; // reciprocal of the determinant
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// Cofactors calculation. Because in the process of cofactor computation some pairs in three-
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// element products are repeated, it is not reasonable to load these pairs anew every time. The
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// values in the registers with these pairs are formed using shuffle instruction. Cofactors are
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// calculated row by row (4 elements are placed in 1 SP FP SIMD floating point register).
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// AB = A# * B
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AB = _mm_mul_ps(_mm_shuffle_ps(A,A,0x0F), B);
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AB = _mm_sub_ps(AB,_mm_mul_ps(_mm_shuffle_ps(A,A,0xA5), _mm_shuffle_ps(B,B,0x4E)));
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// DC = D# * C
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DC = _mm_mul_ps(_mm_shuffle_ps(D,D,0x0F), C);
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DC = _mm_sub_ps(DC,_mm_mul_ps(_mm_shuffle_ps(D,D,0xA5), _mm_shuffle_ps(C,C,0x4E)));
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tmp1 = _mm_mul_ps(row2, row3);
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tmp1 = _mm_shuffle_ps(tmp1, tmp1, 0xB1);
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minor0 = _mm_mul_ps(row1, tmp1);
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minor1 = _mm_mul_ps(row0, tmp1);
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tmp1 = _mm_shuffle_ps(tmp1, tmp1, 0x4E);
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minor0 = _mm_sub_ps(_mm_mul_ps(row1, tmp1), minor0);
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minor1 = _mm_sub_ps(_mm_mul_ps(row0, tmp1), minor1);
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minor1 = _mm_shuffle_ps(minor1, minor1, 0x4E);
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// -----------------------------------------------
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tmp1 = _mm_mul_ps(row1, row2);
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tmp1 = _mm_shuffle_ps(tmp1, tmp1, 0xB1);
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minor0 = _mm_add_ps(_mm_mul_ps(row3, tmp1), minor0);
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minor3 = _mm_mul_ps(row0, tmp1);
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tmp1 = _mm_shuffle_ps(tmp1, tmp1, 0x4E);
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minor0 = _mm_sub_ps(minor0, _mm_mul_ps(row3, tmp1));
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minor3 = _mm_sub_ps(_mm_mul_ps(row0, tmp1), minor3);
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minor3 = _mm_shuffle_ps(minor3, minor3, 0x4E);
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// -----------------------------------------------
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tmp1 = _mm_mul_ps(_mm_shuffle_ps(row1, row1, 0x4E), row3);
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tmp1 = _mm_shuffle_ps(tmp1, tmp1, 0xB1);
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row2 = _mm_shuffle_ps(row2, row2, 0x4E);
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minor0 = _mm_add_ps(_mm_mul_ps(row2, tmp1), minor0);
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minor2 = _mm_mul_ps(row0, tmp1);
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tmp1 = _mm_shuffle_ps(tmp1, tmp1, 0x4E);
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minor0 = _mm_sub_ps(minor0, _mm_mul_ps(row2, tmp1));
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minor2 = _mm_sub_ps(_mm_mul_ps(row0, tmp1), minor2);
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minor2 = _mm_shuffle_ps(minor2, minor2, 0x4E);
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// -----------------------------------------------
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tmp1 = _mm_mul_ps(row0, row1);
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tmp1 = _mm_shuffle_ps(tmp1, tmp1, 0xB1);
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minor2 = _mm_add_ps(_mm_mul_ps(row3, tmp1), minor2);
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minor3 = _mm_sub_ps(_mm_mul_ps(row2, tmp1), minor3);
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tmp1 = _mm_shuffle_ps(tmp1, tmp1, 0x4E);
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minor2 = _mm_sub_ps(_mm_mul_ps(row3, tmp1), minor2);
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minor3 = _mm_sub_ps(minor3, _mm_mul_ps(row2, tmp1));
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// -----------------------------------------------
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tmp1 = _mm_mul_ps(row0, row3);
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tmp1 = _mm_shuffle_ps(tmp1, tmp1, 0xB1);
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minor1 = _mm_sub_ps(minor1, _mm_mul_ps(row2, tmp1));
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minor2 = _mm_add_ps(_mm_mul_ps(row1, tmp1), minor2);
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tmp1 = _mm_shuffle_ps(tmp1, tmp1, 0x4E);
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minor1 = _mm_add_ps(_mm_mul_ps(row2, tmp1), minor1);
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minor2 = _mm_sub_ps(minor2, _mm_mul_ps(row1, tmp1));
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// -----------------------------------------------
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tmp1 = _mm_mul_ps(row0, row2);
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tmp1 = _mm_shuffle_ps(tmp1, tmp1, 0xB1);
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minor1 = _mm_add_ps(_mm_mul_ps(row3, tmp1), minor1);
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minor3 = _mm_sub_ps(minor3, _mm_mul_ps(row1, tmp1));
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tmp1 = _mm_shuffle_ps(tmp1, tmp1, 0x4E);
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minor1 = _mm_sub_ps(minor1, _mm_mul_ps(row3, tmp1));
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minor3 = _mm_add_ps(_mm_mul_ps(row1, tmp1), minor3);
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// dA = |A|
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dA = _mm_mul_ps(_mm_shuffle_ps(A, A, 0x5F),A);
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dA = _mm_sub_ss(dA, _mm_movehl_ps(dA,dA));
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// dB = |B|
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dB = _mm_mul_ps(_mm_shuffle_ps(B, B, 0x5F),B);
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dB = _mm_sub_ss(dB, _mm_movehl_ps(dB,dB));
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// Evaluation of determinant and its reciprocal value. In the original Intel document,
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// 1/det was evaluated using a fast rcpps command with subsequent approximation using
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// the Newton-Raphson algorithm. Here, we go for a IEEE-compliant division instead,
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// so as to not compromise precision at all.
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det = _mm_mul_ps(row0, minor0);
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det = _mm_add_ps(_mm_shuffle_ps(det, det, 0x4E), det);
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det = _mm_add_ss(_mm_shuffle_ps(det, det, 0xB1), det);
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// tmp1= _mm_rcp_ss(det);
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// det= _mm_sub_ss(_mm_add_ss(tmp1, tmp1), _mm_mul_ss(det, _mm_mul_ss(tmp1, tmp1)));
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det = _mm_div_ss(_mm_set_ss(1.0f), det); // <--- yay, one original line not copied from Intel
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det = _mm_shuffle_ps(det, det, 0x00);
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// warning, Intel's variable naming is very confusing: now 'det' is 1/det !
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// dC = |C|
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dC = _mm_mul_ps(_mm_shuffle_ps(C, C, 0x5F),C);
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dC = _mm_sub_ss(dC, _mm_movehl_ps(dC,dC));
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// dD = |D|
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dD = _mm_mul_ps(_mm_shuffle_ps(D, D, 0x5F),D);
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dD = _mm_sub_ss(dD, _mm_movehl_ps(dD,dD));
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// Multiplication of cofactors by 1/det. Storing the inverse matrix to the address in pointer src.
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minor0 = _mm_mul_ps(det, minor0);
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float *dst = result.data();
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_mm_storel_pi((__m64*)(dst), minor0);
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_mm_storeh_pi((__m64*)(dst+2), minor0);
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minor1 = _mm_mul_ps(det, minor1);
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_mm_storel_pi((__m64*)(dst+4), minor1);
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_mm_storeh_pi((__m64*)(dst+6), minor1);
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minor2 = _mm_mul_ps(det, minor2);
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_mm_storel_pi((__m64*)(dst+ 8), minor2);
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_mm_storeh_pi((__m64*)(dst+10), minor2);
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minor3 = _mm_mul_ps(det, minor3);
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_mm_storel_pi((__m64*)(dst+12), minor3);
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_mm_storeh_pi((__m64*)(dst+14), minor3);
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// d = trace(AB*DC) = trace(A#*B*D#*C)
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d = _mm_mul_ps(_mm_shuffle_ps(DC,DC,0xD8),AB);
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// iD = C*A#*B
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iD = _mm_mul_ps(_mm_shuffle_ps(C,C,0xA0), _mm_movelh_ps(AB,AB));
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iD = _mm_add_ps(iD,_mm_mul_ps(_mm_shuffle_ps(C,C,0xF5), _mm_movehl_ps(AB,AB)));
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// iA = B*D#*C
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iA = _mm_mul_ps(_mm_shuffle_ps(B,B,0xA0), _mm_movelh_ps(DC,DC));
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iA = _mm_add_ps(iA,_mm_mul_ps(_mm_shuffle_ps(B,B,0xF5), _mm_movehl_ps(DC,DC)));
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// d = trace(AB*DC) = trace(A#*B*D#*C) [continue]
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d = _mm_add_ps(d, _mm_movehl_ps(d, d));
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d = _mm_add_ss(d, _mm_shuffle_ps(d, d, 1));
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d1 = _mm_mul_ss(dA,dD);
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d2 = _mm_mul_ss(dB,dC);
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// iD = D*|A| - C*A#*B
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iD = _mm_sub_ps(_mm_mul_ps(D,_mm_shuffle_ps(dA,dA,0)), iD);
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// iA = A*|D| - B*D#*C;
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iA = _mm_sub_ps(_mm_mul_ps(A,_mm_shuffle_ps(dD,dD,0)), iA);
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// det = |A|*|D| + |B|*|C| - trace(A#*B*D#*C)
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det = _mm_sub_ss(_mm_add_ss(d1,d2),d);
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rd = _mm_div_ss(_mm_set_ss(1.0f), det);
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// #ifdef ZERO_SINGULAR
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// rd = _mm_and_ps(_mm_cmpneq_ss(det,_mm_setzero_ps()), rd);
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// #endif
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// iB = D * (A#B)# = D*B#*A
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iB = _mm_mul_ps(D, _mm_shuffle_ps(AB,AB,0x33));
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iB = _mm_sub_ps(iB, _mm_mul_ps(_mm_shuffle_ps(D,D,0xB1), _mm_shuffle_ps(AB,AB,0x66)));
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// iC = A * (D#C)# = A*C#*D
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iC = _mm_mul_ps(A, _mm_shuffle_ps(DC,DC,0x33));
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iC = _mm_sub_ps(iC, _mm_mul_ps(_mm_shuffle_ps(A,A,0xB1), _mm_shuffle_ps(DC,DC,0x66)));
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rd = _mm_shuffle_ps(rd,rd,0);
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rd = _mm_xor_ps(rd, _mm_load_ps((float*)_Sign_PNNP));
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// iB = C*|B| - D*B#*A
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iB = _mm_sub_ps(_mm_mul_ps(C,_mm_shuffle_ps(dB,dB,0)), iB);
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// iC = B*|C| - A*C#*D;
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iC = _mm_sub_ps(_mm_mul_ps(B,_mm_shuffle_ps(dC,dC,0)), iC);
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// iX = iX / det
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iA = _mm_mul_ps(rd,iA);
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iB = _mm_mul_ps(rd,iB);
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iC = _mm_mul_ps(rd,iC);
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iD = _mm_mul_ps(rd,iD);
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result.template writePacket<Aligned>( 0, _mm_shuffle_ps(iA,iB,0x77));
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result.template writePacket<Aligned>( 4, _mm_shuffle_ps(iA,iB,0x22));
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result.template writePacket<Aligned>( 8, _mm_shuffle_ps(iC,iD,0x77));
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result.template writePacket<Aligned>(12, _mm_shuffle_ps(iC,iD,0x22));
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}
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};
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#endif // EIGEN_INVERSE_SSE_H
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