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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
71 lines
1.8 KiB
Plaintext
71 lines
1.8 KiB
Plaintext
# frv testcase for nldqfu @($GRi,$GRj),$GRk
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# mach: frv
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# as(frv): -mcpu=frv
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.include "testutils.inc"
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start
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.global nldqfu
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nldqfu:
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set_mem_limmed 0xdead,0xbeef,sp
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inc_gr_immed -4,sp
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set_mem_limmed 0xbeef,0xdead,sp
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inc_gr_immed -4,sp
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set_mem_limmed 0x1234,0x5678,sp
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inc_gr_immed -4,sp
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set_mem_limmed 0x9abc,0xdef0,sp
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set_gr_gr sp,gr20
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xbeef,0xdead,fr9
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set_fr_iimmed 0x1234,0x5678,fr10
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set_fr_iimmed 0x9abc,0xdef0,fr11
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set_gr_immed 0,gr7
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nldqfu @(sp,gr7),fr8
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test_fr_limmed 0x9abc,0xdef0,fr8
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test_fr_limmed 0x1234,0x5678,fr9
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test_fr_limmed 0xbeef,0xdead,fr10
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test_fr_limmed 0xdead,0xbeef,fr11
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test_gr_gr sp,gr20
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test_spr_limmed 0xc8c0,0x0001,nesr0
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test_spr_gr neear0,gr20
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test_spr_limmed 0x0000,0x0000,fner1
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test_spr_limmed 0x0000,0x0000,fner0
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xbeef,0xdead,fr9
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set_fr_iimmed 0x1234,0x5678,fr10
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set_fr_iimmed 0x9abc,0xdef0,fr11
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inc_gr_immed -16,sp
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set_gr_immed 16,gr7
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nldqfu @(sp,gr7),fr8
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test_fr_limmed 0x9abc,0xdef0,fr8
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test_fr_limmed 0x1234,0x5678,fr9
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test_fr_limmed 0xbeef,0xdead,fr10
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test_fr_limmed 0xdead,0xbeef,fr11
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test_gr_gr sp,gr20
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test_spr_limmed 0xc8c0,0x0401,nesr1
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test_spr_gr neear1,gr20
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test_spr_limmed 0x0000,0x0000,fner1
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test_spr_limmed 0x0000,0x0000,fner0
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set_fr_iimmed 0xdead,0xbeef,fr8
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set_fr_iimmed 0xbeef,0xdead,fr9
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set_fr_iimmed 0x1234,0x5678,fr10
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set_fr_iimmed 0x9abc,0xdef0,fr11
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inc_gr_immed 16,sp
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set_gr_immed -16,gr7
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nldqfu @(sp,gr7),fr8
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test_fr_limmed 0x9abc,0xdef0,fr8
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test_fr_limmed 0x1234,0x5678,fr9
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test_fr_limmed 0xbeef,0xdead,fr10
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test_fr_limmed 0xdead,0xbeef,fr11
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test_gr_gr sp,gr20
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test_spr_limmed 0xc8c0,0x0801,nesr2
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test_spr_gr neear2,gr20
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test_spr_limmed 0x0000,0x0000,fner1
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test_spr_limmed 0x0000,0x0000,fner0
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pass
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