mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-21 04:42:53 +08:00
1d506c26d9
This commit is the result of the following actions:
- Running gdb/copyright.py to update all of the copyright headers to
include 2024,
- Manually updating a few files the copyright.py script told me to
update, these files had copyright headers embedded within the
file,
- Regenerating gdbsupport/Makefile.in to refresh it's copyright
date,
- Using grep to find other files that still mentioned 2023. If
these files were updated last year from 2022 to 2023 then I've
updated them this year to 2024.
I'm sure I've probably missed some dates. Feel free to fix them up as
you spot them.
337 lines
13 KiB
Plaintext
337 lines
13 KiB
Plaintext
dnl Copyright (C) 2005-2024 Free Software Foundation, Inc.
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dnl
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dnl This program is free software; you can redistribute it and/or modify
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dnl it under the terms of the GNU General Public License as published by
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dnl the Free Software Foundation; either version 3 of the License, or
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dnl (at your option) any later version.
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dnl
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dnl This program is distributed in the hope that it will be useful,
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dnl but WITHOUT ANY WARRANTY; without even the implied warranty of
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dnl MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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dnl GNU General Public License for more details.
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dnl
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dnl You should have received a copy of the GNU General Public License
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dnl along with this program. If not, see <http://www.gnu.org/licenses/>.
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dnl
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dnl NB: This file is included in sim/configure, so keep settings namespaced.
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dnl DEPRECATED
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dnl
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dnl Instead of defining a `subtarget' macro, code should be checking the value
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dnl of {STATE,CPU}_ARCHITECTURE to identify the architecture dnl in question.
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AC_MSG_CHECKING([mips subtarget])
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SIM_MIPS_SUBTARGET=
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AS_CASE([${target}],
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[mips64vr*-*-*], [SIM_MIPS_SUBTARGET="-DTARGET_ENABLE_FR=1"],
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[mips*tx39*], [SIM_MIPS_SUBTARGET="-DSUBTARGET_R3900=1"],
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[mips*-sde-elf*], [SIM_MIPS_SUBTARGET="-DTARGET_ENABLE_FR=1"],
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[mips*-mti-elf*], [SIM_MIPS_SUBTARGET="-DTARGET_ENABLE_FR=1"],
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[mipsisa32*-*-*], [SIM_MIPS_SUBTARGET="-DTARGET_ENABLE_FR=1"],
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[mipsisa64*-*-*], [SIM_MIPS_SUBTARGET="-DTARGET_ENABLE_FR=1"])
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AC_MSG_RESULT([${SIM_MIPS_SUBTARGET:-none}])
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AC_SUBST(SIM_MIPS_SUBTARGET)
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dnl Select the bitsize of the target.
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AC_MSG_CHECKING([mips bitsize])
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SIM_MIPS_BITSIZE=64
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AS_CASE([${target}],
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[mips*-sde-elf*], [SIM_MIPS_BITSIZE=64],
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[mips*-mti-elf*], [SIM_MIPS_BITSIZE=64],
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[mips64*-*-*], [SIM_MIPS_BITSIZE=64],
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[mips16*-*-*], [SIM_MIPS_BITSIZE=64],
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[mipsisa32*-*-*], [SIM_MIPS_BITSIZE=32],
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[mipsisa64*-*-*], [SIM_MIPS_BITSIZE=64],
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[mips*-*-*], [SIM_MIPS_BITSIZE=32])
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AC_MSG_RESULT([$SIM_MIPS_BITSIZE])
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AC_SUBST(SIM_MIPS_BITSIZE)
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dnl Select the floating hardware support of the target.
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AC_MSG_CHECKING([mips fpu bitsize])
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SIM_MIPS_FPU_BITSIZE=64
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AS_CASE([${target}],
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[mips*tx39*], [SIM_MIPS_FPU_BITSIZE=32],
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[mips*-sde-elf*], [SIM_MIPS_FPU_BITSIZE=64],
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[mips*-mti-elf*], [SIM_MIPS_FPU_BITSIZE=64],
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[mipsisa32*-*-*], [SIM_MIPS_FPU_BITSIZE=64],
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[mipsisa64*-*-*], [SIM_MIPS_FPU_BITSIZE=64],
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[mips*-*-*], [SIM_MIPS_FPU_BITSIZE=32])
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AC_MSG_RESULT([$SIM_MIPS_FPU_BITSIZE])
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AC_SUBST(SIM_MIPS_FPU_BITSIZE)
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dnl Select the IGEN architecture.
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SIM_MIPS_GEN=SINGLE
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sim_mips_single_machine="-M mipsIV"
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sim_mips_m16_machine="-M mips16,mipsIII"
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sim_mips_single_filter="32,64,f"
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sim_mips_m16_filter="16"
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AS_CASE([${target}],
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[mips*tx39*], [dnl
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SIM_MIPS_GEN=SINGLE
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sim_mips_single_filter="32,f"
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sim_mips_single_machine="-M r3900"],
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[mips64vr41*], [dnl
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SIM_MIPS_GEN=M16
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sim_mips_single_machine="-M vr4100"
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sim_mips_m16_machine="-M vr4100"],
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[mips64*], [dnl
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SIM_MIPS_GEN=MULTI
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sim_mips_multi_configs="\
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vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\
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vr4120:mipsIII,mips16,vr4120:32,64:mips4120\
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vr5000:mipsIV:32,64,f:mips4300,mips5000,mips8000\
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vr5400:mipsIV,vr5400:32,64,f:mips5400\
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vr5500:mipsIV,vr5500:32,64,f:mips5500"
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sim_mips_multi_default=mips5000],
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[mips*-sde-elf* | mips*-mti-elf*], [dnl
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SIM_MIPS_GEN=MULTI
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sim_mips_multi_configs="\
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micromips:micromips64,micromipsdsp:32,64,f:mips_micromips\
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mipsisa64r2:mips64r2,mips16,mips16e,mdmx,dsp,dsp2,mips3d,smartmips:32,64,f:mipsisa32r2,mipsisa64r2,mipsisa32r5,mipsisa64r5\
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mipsisa64r6:mips64r6:32,64,f:mipsisa32r6,mipsisa64r6"
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sim_mips_multi_default=mipsisa64r2],
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[mips16*], [dnl
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SIM_MIPS_GEN=M16],
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[mipsisa32r2*], [dnl
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SIM_MIPS_GEN=MULTI
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sim_mips_multi_configs="\
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micromips:micromips32,micromipsdsp:32,f:mips_micromips\
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mips32r2:mips32r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,f:mipsisa32r2"
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sim_mips_multi_default=mipsisa32r2],
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[mipsisa32r6*], [dnl
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SIM_MIPS_GEN=SINGLE
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sim_mips_single_machine="-M mips32r6"
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sim_mips_single_filter="32,f"],
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[mipsisa32*], [dnl
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SIM_MIPS_GEN=M16
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sim_mips_single_machine="-M mips32,mips16,mips16e,smartmips"
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sim_mips_m16_machine="-M mips16,mips16e,mips32"
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sim_mips_single_filter="32,f"],
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[mipsisa64r2*], [dnl
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SIM_MIPS_GEN=M16
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sim_mips_single_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
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sim_mips_m16_machine="-M mips16,mips16e,mips64r2"],
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[mipsisa64r6*], [dnl
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SIM_MIPS_GEN=SINGLE
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sim_mips_single_machine="-M mips64r6"],
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[mipsisa64sb1*], [dnl
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SIM_MIPS_GEN=SINGLE
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sim_mips_single_machine="-M mips64,mips3d,sb1"],
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[mipsisa64*], [dnl
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SIM_MIPS_GEN=M16
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sim_mips_single_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
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sim_mips_m16_machine="-M mips16,mips16e,mips64"],
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[mips*lsi*], [dnl
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SIM_MIPS_GEN=M16
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sim_mips_single_machine="-M mipsIII,mips16"
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sim_mips_m16_machine="-M mips16,mipsIII"
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sim_mips_single_filter="32,f"],
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[mips*], [dnl
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SIM_MIPS_GEN=SINGLE
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sim_mips_single_filter="32,f"])
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dnl The MULTI generator can combine several simulation engines into one.
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dnl executable. A configuration which uses the MULTI should set two
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dnl variables: ${sim_mips_multi_configs} and ${sim_mips_multi_default}.
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dnl
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dnl ${sim_mips_multi_configs} is the list of engines to build. Each
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dnl space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS,
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dnl where:
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dnl
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dnl - NAME is a C-compatible prefix for the engine,
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dnl - MACHINE is a -M argument,
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dnl - FILTER is a -F argument, and
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dnl - BFDMACHS is a comma-separated list of bfd machines that the
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dnl simulator can run.
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dnl
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dnl Each entry will have a separate simulation engine whose prefix is
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dnl m32<NAME>. If the machine list includes "mips16", there will also
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dnl be a mips16 engine, prefix m16<NAME>. The mips16 engine will be
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dnl generated using the same machine list as the 32-bit version,
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dnl but the filter will be "16" instead of FILTER.
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dnl
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dnl The simulator compares the bfd mach against BFDMACHS to decide
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dnl which engine to use. Entries in BFDMACHS should be bfd_mach
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dnl values with "bfd_mach_" removed. ${sim_mips_multi_default} says
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dnl which entry should be the default.
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SIM_MIPS_IGEN_ITABLE_FLAGS=
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SIM_MIPS_MULTI_SRC=
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SIM_MIPS_MULTI_OBJ=
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SIM_MIPS_MULTI_IGEN_CONFIGS=
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AS_VAR_IF([SIM_MIPS_GEN], ["MULTI"], [dnl
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dnl Verify the AS_CASE logic above is setup correctly.
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AS_IF([test -z "${sim_mips_multi_configs}" || test -z "${sim_mips_multi_default}"], [dnl
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AC_MSG_ERROR(Error in configure.ac: MULTI simulator not set up correctly)])
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dnl Start in a known state.
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AS_MKDIR_P([mips])
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rm -f mips/multi-include.h mips/multi-run.c
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sim_mips_seen_default=no
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cat << __EOF__ > mips/multi-run.c
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/* Main entry point for MULTI simulators.
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Copyright (C) 2003-2023 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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--
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This file was generated by sim/mips/configure. */
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#include "sim-main.h"
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#include "multi-include.h"
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#include "bfd/elf-bfd.h"
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#include "bfd/elfxx-mips.h"
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#include "elf/mips.h"
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#define SD sd
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#define CPU cpu
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void
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sim_engine_run (SIM_DESC sd,
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int next_cpu_nr,
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int nr_cpus,
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int signal) /* ignore */
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{
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int mach;
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if (STATE_ARCHITECTURE (sd) == NULL)
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mach = bfd_mach_${sim_mips_multi_default};
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else if (elf_elfheader (STATE_PROG_BFD (sd))->e_flags
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& EF_MIPS_ARCH_ASE_MICROMIPS)
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mach = bfd_mach_mips_micromips;
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else
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{
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mach = _bfd_elf_mips_mach (elf_elfheader (STATE_PROG_BFD (sd))->e_flags);
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if (!mach)
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mach = STATE_ARCHITECTURE (SD)->mach;
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}
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switch (mach)
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{
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__EOF__
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for fc in ${sim_mips_multi_configs}; do
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dnl Split up the entry. ${c} contains the first three elements.
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dnl Note: outer sqaure brackets are m4 quotes.
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c=`echo ${fc} | sed ['s/:[^:]*$//']`
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bfdmachs=`echo ${fc} | sed 's/.*://'`
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name=`echo ${c} | sed 's/:.*//'`
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machine=`echo ${c} | sed 's/.*:\(.*\):.*/\1/'`
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filter=`echo ${c} | sed 's/.*://'`
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dnl Build the following lists:
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dnl
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dnl SIM_MIPS_IGEN_ITABLE_FLAGS: all -M and -F flags used by the simulator
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dnl SIM_MIPS_MULTI_SRC: all makefile-generated source files
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dnl SIM_MIPS_MULTI_OBJ: the objects for ${SIM_MIPS_MULTI_SRC}
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dnl SIM_MIPS_MULTI_IGEN_CONFIGS: igen configuration strings.
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dnl
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dnl Each entry in ${SIM_MIPS_MULTI_IGEN_CONFIGS} is a prefix (m32
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dnl or m16) followed by the NAME, MACHINE and FILTER part of
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dnl the ${sim_mips_multi_configs} entry.
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AS_VAR_APPEND([SIM_MIPS_IGEN_ITABLE_FLAGS], [" -F ${filter} -M ${machine}"])
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dnl Check whether special handling is needed.
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AS_CASE([${c}],
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[*:*mips16*:*], [dnl
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dnl Run igen twice, once for normal mode and once for mips16.
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ws="m32 m16"
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dnl The top-level function for the mips16 simulator is
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dnl in a file m16${name}_run.c, generated by the
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dnl tmp-run-multi Makefile rule.
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AS_VAR_APPEND([SIM_MIPS_MULTI_SRC], [" mips/m16${name}_run.c"])
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AS_VAR_APPEND([SIM_MIPS_MULTI_OBJ], [" mips/m16${name}_run.o"])
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AS_VAR_APPEND([SIM_MIPS_IGEN_ITABLE_FLAGS], [" -F 16"])
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],
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[*:*micromips32*:*], [dnl
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dnl Run igen thrice, once for micromips32, once for micromips16,
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dnl and once for m32.
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ws="micromips_m32 micromips16 micromips32"
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dnl The top-level function for the micromips simulator is
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dnl in a file micromips${name}_run.c, generated by the
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dnl tmp-run-multi Makefile rule.
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AS_VAR_APPEND([SIM_MIPS_MULTI_SRC], [" mips/micromips${name}_run.c"])
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AS_VAR_APPEND([SIM_MIPS_MULTI_OBJ], [" mips/micromips${name}_run.o"])
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AS_VAR_APPEND([SIM_MIPS_IGEN_ITABLE_FLAGS], [" -F 16,32"])
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],
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[*:*micromips64*:*], [dnl
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dnl Run igen thrice, once for micromips64, once for micromips16,
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dnl and once for m64.
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ws="micromips_m64 micromips16 micromips64"
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dnl The top-level function for the micromips simulator is
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dnl in a file micromips${name}_run.c, generated by the
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dnl tmp-run-multi Makefile rule.
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AS_VAR_APPEND([SIM_MIPS_MULTI_SRC], [" mips/micromips${name}_run.c"])
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AS_VAR_APPEND([SIM_MIPS_MULTI_OBJ], [" mips/micromips${name}_run.o"])
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AS_VAR_APPEND([SIM_MIPS_IGEN_ITABLE_FLAGS], [" -F 16,32,64"])
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],
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[ws=m32])
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dnl Now add the list of igen-generated files to ${SIM_MIPS_MULTI_SRC}
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dnl and ${SIM_MIPS_MULTI_OBJ}.
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for w in ${ws}; do
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for base in engine icache idecode model semantics support; do
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AS_VAR_APPEND([SIM_MIPS_MULTI_SRC], [" mips/${w}${name}_${base}.c"])
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AS_VAR_APPEND([SIM_MIPS_MULTI_SRC], [" mips/${w}${name}_${base}.h"])
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AS_VAR_APPEND([SIM_MIPS_MULTI_OBJ], [" mips/${w}${name}_${base}.o"])
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done
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AS_VAR_APPEND([SIM_MIPS_MULTI_IGEN_CONFIGS], [" ${w}${c}"])
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done
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dnl Add an include for the engine.h file. This file declares the
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dnl top-level foo_engine_run() function.
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echo "#include \"${w}${name}_engine.h\"" >> mips/multi-include.h
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dnl Add case statements for this engine to sim_engine_run().
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for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
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echo " case bfd_mach_${mach}:" >> mips/multi-run.c
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AS_VAR_IF([mach], ["${sim_mips_multi_default}"], [dnl
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echo " default:" >> mips/multi-run.c
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sim_mips_seen_default=yes
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])
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done
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echo " ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \
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>> mips/multi-run.c
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echo " break;" >> mips/multi-run.c
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done
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dnl Check whether we added a 'default:' label.
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AS_VAR_IF([sim_mips_seen_default], [no], [dnl
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AC_MSG_ERROR(Error in configure.ac: \${sim_mips_multi_configs} doesn't have an entry for \${sim_mips_multi_default})])
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cat << __EOF__ >> mips/multi-run.c
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}
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}
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__EOF__
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], [dnl
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SIM_MIPS_IGEN_ITABLE_FLAGS='$(SIM_MIPS_SINGLE_FLAGS)'
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AS_VAR_IF([SIM_MIPS_GEN], ["M16"], [AS_VAR_APPEND([SIM_MIPS_IGEN_ITABLE_FLAGS], [' $(SIM_MIPS_M16_FLAGS)'])])
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])
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SIM_MIPS_SINGLE_FLAGS="-F ${sim_mips_single_filter} ${sim_mips_single_machine}"
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SIM_MIPS_M16_FLAGS="-F ${sim_mips_m16_filter} ${sim_mips_m16_machine}"
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AC_SUBST(SIM_MIPS_SINGLE_FLAGS)
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AC_SUBST(SIM_MIPS_M16_FLAGS)
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AC_SUBST(SIM_MIPS_GEN)
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AC_SUBST(SIM_MIPS_IGEN_ITABLE_FLAGS)
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AC_SUBST(SIM_MIPS_MULTI_IGEN_CONFIGS)
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AC_SUBST(SIM_MIPS_MULTI_SRC)
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AC_SUBST(SIM_MIPS_MULTI_OBJ)
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AM_CONDITIONAL([SIM_MIPS_GEN_MODE_SINGLE], [test "$SIM_MIPS_GEN" = "SINGLE"])
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AM_CONDITIONAL([SIM_MIPS_GEN_MODE_M16], [test "$SIM_MIPS_GEN" = "M16"])
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AM_CONDITIONAL([SIM_MIPS_GEN_MODE_MULTI], [test "$SIM_MIPS_GEN" = "MULTI"])
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