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https://sourceware.org/git/binutils-gdb.git
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d87bef3a7b
The newer update-copyright.py fixes file encoding too, removing cr/lf on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
44 lines
1.5 KiB
C
44 lines
1.5 KiB
C
/* This file defines the interface between the FR-V simulator and GDB.
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Copyright (C) 2003-2023 Free Software Foundation, Inc.
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Contributed by Red Hat.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#if !defined (SIM_FRV_H)
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#define SIM_FRV_H
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enum sim_frv_regs
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{
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SIM_FRV_GR0_REGNUM = 0,
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SIM_FRV_GR63_REGNUM = 63,
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SIM_FRV_FR0_REGNUM = 64,
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SIM_FRV_FR63_REGNUM = 127,
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SIM_FRV_PC_REGNUM = 128,
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/* An FR-V architecture may have up to 4096 special purpose registers
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(SPRs). In order to determine a specific constant used to access
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a particular SPR, one of the H_SPR_ prefixed offsets defined in
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opcodes/frv-desc.h should be added to SIM_FRV_SPR0_REGNUM. So,
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for example, the number that GDB uses to fetch the link register
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from the simulator is (SIM_FRV_SPR0_REGNUM + H_SPR_LR). */
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SIM_FRV_SPR0_REGNUM = 129,
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SIM_FRV_SPR4095_REGNUM = SIM_FRV_SPR0_REGNUM + 4095
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};
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#endif
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