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fec5386aef
To prepare moving this logic to the top-level configure, the vars need to be namespaced. Do that here to make it easier to review. Basically sim_xxx -> SIM_MIPS_XXX when a var is exported from the configure script to the Makefile, and sim_xxx -> sim_mips_xxx when the var is internal in the configure script.
513 lines
13 KiB
Makefile
513 lines
13 KiB
Makefile
# Makefile template for Configure for the MIPS simulator.
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# Written by Cygnus Support.
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## COMMON_PRE_CONFIG_FRAG
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SIM_MIPS_IGEN_FLAGS = @SIM_MIPS_IGEN_FLAGS@
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SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
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SIM_MIPS_MICROMIPS_FLAGS = @SIM_MIPS_MICROMIPS_FLAGS@
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SIM_MIPS_MICROMIPS16_FLAGS = @SIM_MIPS_MICROMIPS16_FLAGS@
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SIM_MIPS_GEN = @SIM_MIPS_GEN@
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SIM_MIPS_MULTI_FLAGS = @SIM_MIPS_MULTI_FLAGS@
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SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
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SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
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SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
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arch = mips
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# Object files created by various simulator generators.
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SIM_IGEN_OBJ = \
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support.o \
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itable.o \
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semantics.o \
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idecode.o \
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icache.o \
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engine.o \
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irun.o \
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SIM_M16_OBJ = \
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m16_support.o \
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m16_semantics.o \
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m16_idecode.o \
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m16_icache.o \
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\
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m32_support.o \
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m32_semantics.o \
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m32_idecode.o \
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m32_icache.o \
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\
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itable.o \
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m16run.o \
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SIM_MICROMIPS_OBJ = \
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micromips16_support.o \
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micromips16_semantics.o \
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micromips16_idecode.o \
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micromips16_icache.o \
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\
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micromips32_support.o \
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micromips32_semantics.o \
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micromips32_idecode.o \
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micromips32_icache.o \
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\
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micromips_m32_support.o \
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micromips_m32_semantics.o \
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micromips_m32_idecode.o \
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micromips_m32_icache.o \
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\
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itable.o \
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micromipsrun.o \
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SIM_MULTI_OBJ = $(SIM_MIPS_MULTI_OBJ) \
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itable.o \
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multi-run.o \
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SIM_OBJS = \
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interp.o \
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$(SIM_$(SIM_MIPS_GEN)_OBJ) \
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$(SIM_NEW_COMMON_OBJS) \
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cp1.o \
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mdmx.o \
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dsp.o \
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sim-main.o \
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sim-resume.o \
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# List of flags to always pass to $(CC).
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SIM_EXTRA_CFLAGS = $(SIM_MIPS_SUBTARGET)
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SIM_BITSIZE = $(SIM_MIPS_BITSIZE)
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SIM_FLOAT = -DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=$(SIM_MIPS_FPU_BITSIZE)
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SIM_EXTRA_CLEAN = clean-extra
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SIM_EXTRA_DISTCLEAN = distclean-extra
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all: $(SIM_$(SIM_MIPS_GEN)_ALL)
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SIM_EXTRA_DEPS = itable.h
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## COMMON_POST_CONFIG_FRAG
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IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
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IGEN_INSN=$(srcdir)/mips.igen
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IGEN_DC=$(srcdir)/mips.dc
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M16_DC=$(srcdir)/m16.dc
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MICROMIPS32_DC=$(srcdir)/micromips.dc
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MICROMIPS16_DC=$(srcdir)/micromips16.dc
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IGEN_INCLUDE=\
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$(srcdir)/micromipsdsp.igen \
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$(srcdir)/micromips.igen \
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$(srcdir)/m16.igen \
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$(srcdir)/m16e.igen \
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$(srcdir)/mdmx.igen \
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$(srcdir)/mips3d.igen \
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$(srcdir)/sb1.igen \
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$(srcdir)/tx.igen \
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$(srcdir)/vr.igen \
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$(srcdir)/dsp.igen \
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$(srcdir)/dsp2.igen \
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$(srcdir)/mips3264r2.igen \
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$(srcdir)/mips3264r6.igen \
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# NB: Since these can be built by a number of generators, care
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# must be taken to ensure that they are only dependant on
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# one of those generators.
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BUILT_SRC_FROM_GEN = \
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itable.h \
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itable.c \
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SIM_IGEN_ALL = tmp-igen
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SIM_M16_ALL = tmp-m16
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SIM_MICROMIPS_ALL = tmp-micromips
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SIM_MULTI_ALL = tmp-multi
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$(BUILT_SRC_FROM_GEN): $(SIM_$(SIM_MIPS_GEN)_ALL)
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BUILT_SRC_FROM_IGEN = \
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icache.h \
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icache.c \
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idecode.h \
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idecode.c \
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semantics.h \
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semantics.c \
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model.h \
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model.c \
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support.h \
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support.c \
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engine.h \
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engine.c \
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irun.c \
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$(BUILT_SRC_FROM_IGEN): tmp-igen
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tmp-igen: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
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$(ECHO_IGEN) $(IGEN_RUN) \
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$(IGEN_TRACE) \
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-I $(srcdir) \
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-Werror \
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-Wnodiscard \
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$(SIM_MIPS_IGEN_FLAGS) \
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-G gen-direct-access \
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-G gen-zero-r0 \
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-B 32 \
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-H 31 \
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-i $(IGEN_INSN) \
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-o $(IGEN_DC) \
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-x \
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-n icache.h -hc icache.h \
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-n icache.c -c icache.c \
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-n semantics.h -hs semantics.h \
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-n semantics.c -s semantics.c \
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-n idecode.h -hd idecode.h \
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-n idecode.c -d idecode.c \
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-n model.h -hm model.h \
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-n model.c -m model.c \
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-n support.h -hf support.h \
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-n support.c -f support.c \
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-n itable.h -ht itable.h \
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-n itable.c -t itable.c \
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-n engine.h -he engine.h \
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-n engine.c -e engine.c \
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-n irun.c -r irun.c
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$(SILENCE) touch $@
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BUILT_SRC_FROM_M16 = \
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m16_icache.h \
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m16_icache.c \
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m16_idecode.h \
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m16_idecode.c \
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m16_semantics.h \
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m16_semantics.c \
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m16_model.h \
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m16_model.c \
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m16_support.h \
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m16_support.c \
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\
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m32_icache.h \
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m32_icache.c \
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m32_idecode.h \
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m32_idecode.c \
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m32_semantics.h \
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m32_semantics.c \
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m32_model.h \
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m32_model.c \
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m32_support.h \
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m32_support.c \
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$(BUILT_SRC_FROM_M16): tmp-m16
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tmp-m16: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
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$(ECHO_IGEN) $(IGEN_RUN) \
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$(IGEN_TRACE) \
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-I $(srcdir) \
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-Werror \
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-Wnodiscard \
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$(SIM_MIPS_M16_FLAGS) \
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-G gen-direct-access \
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-G gen-zero-r0 \
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-B 16 \
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-H 15 \
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-i $(IGEN_INSN) \
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-o $(M16_DC) \
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-P m16_ \
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-x \
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-n m16_icache.h -hc m16_icache.h \
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-n m16_icache.c -c m16_icache.c \
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-n m16_semantics.h -hs m16_semantics.h \
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-n m16_semantics.c -s m16_semantics.c \
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-n m16_idecode.h -hd m16_idecode.h \
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-n m16_idecode.c -d m16_idecode.c \
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-n m16_model.h -hm m16_model.h \
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-n m16_model.c -m m16_model.c \
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-n m16_support.h -hf m16_support.h \
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-n m16_support.c -f m16_support.c \
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#
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$(ECHO_IGEN) $(IGEN_RUN) \
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$(IGEN_TRACE) \
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-I $(srcdir) \
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-Werror \
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-Wnodiscard \
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$(SIM_MIPS_IGEN_FLAGS) \
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-G gen-direct-access \
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-G gen-zero-r0 \
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-B 32 \
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-H 31 \
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-i $(IGEN_INSN) \
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-o $(IGEN_DC) \
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-P m32_ \
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-x \
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-n m32_icache.h -hc m32_icache.h \
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-n m32_icache.c -c m32_icache.c \
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-n m32_semantics.h -hs m32_semantics.h \
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-n m32_semantics.c -s m32_semantics.c \
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-n m32_idecode.h -hd m32_idecode.h \
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-n m32_idecode.c -d m32_idecode.c \
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-n m32_model.h -hm m32_model.h \
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-n m32_model.c -m m32_model.c \
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-n m32_support.h -hf m32_support.h \
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-n m32_support.c -f m32_support.c \
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#
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$(ECHO_IGEN) $(IGEN_RUN) \
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$(IGEN_TRACE) \
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-I $(srcdir) \
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-Werror \
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-Wnodiscard \
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-Wnowidth \
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$(SIM_MIPS_IGEN_FLAGS) $(SIM_MIPS_M16_FLAGS) \
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-G gen-direct-access \
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-G gen-zero-r0 \
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-i $(IGEN_INSN) \
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-n itable.h -ht itable.h \
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-n itable.c -t itable.c \
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#
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$(SILENCE) touch $@
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BUILT_SRC_FROM_MICROMIPS = \
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micromips16_icache.h \
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micromips16_icache.c \
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micromips16_idecode.h \
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micromips16_idecode.c \
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micromips16_semantics.h \
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micromips16_semantics.c \
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micromips16_model.h \
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micromips16_model.c \
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micromips16_support.h \
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micromips16_support.c \
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\
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micromips32_icache.h \
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micromips32_icache.c \
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micromips32_idecode.h \
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micromips32_idecode.c \
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micromips32_semantics.h \
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micromips32_semantics.c \
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micromips32_model.h \
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micromips32_model.c \
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micromips32_support.h \
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micromips32_support.c \
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\
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micromips_m32_icache.h \
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micromips_m32_icache.c \
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micromips_m32_idecode.h \
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micromips_m32_idecode.c \
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micromips_m32_semantics.h \
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micromips_m32_semantics.c \
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micromips_m32_model.h \
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micromips_m32_model.c \
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micromips_m32_support.h \
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micromips_m32_support.c \
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$(BUILT_SRC_FROM_MICROMIPS): tmp-micromips
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tmp-micromips: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
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$(ECHO_IGEN) $(IGEN_RUN) \
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$(IGEN_TRACE) \
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-I $(srcdir) \
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-Werror \
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-Wnodiscard \
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$(SIM_MIPS_MICROMIPS16_FLAGS) \
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-G gen-direct-access \
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-G gen-zero-r0 \
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-B 16 \
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-H 15 \
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-i $(IGEN_INSN) \
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-o $(MICROMIPS16_DC) \
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-P micromips16_ \
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-x \
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-n micromips16_icache.h -hc micromips16_icache.h \
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-n micromips16_icache.c -c micromips16_icache.c \
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-n micromips16_semantics.h -hs micromips16_semantics.h \
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-n micromips16_semantics.c -s micromips16_semantics.c \
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-n micromips16_idecode.h -hd micromips16_idecode.h \
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-n micromips16_idecode.c -d micromips16_idecode.c \
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-n micromips16_model.h -hm micromips16_model.h \
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-n micromips16_model.c -m micromips16_model.c \
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-n micromips16_support.h -hf micromips16_support.h \
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-n micromips16_support.c -f micromips16_support.c \
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#
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$(ECHO_IGEN) $(IGEN_RUN) \
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$(IGEN_TRACE) \
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-I $(srcdir) \
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-Werror \
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-Wnodiscard \
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$(SIM_MIPS_MICROMIPS_FLAGS) \
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-G gen-direct-access \
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-G gen-zero-r0 \
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-B 32 \
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-H 31 \
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-i $(IGEN_INSN) \
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-o $(MICROMIPS32_DC) \
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-P micromips32_ \
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-x \
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-n micromips32_icache.h -hc micromips32_icache.h \
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-n micromips32_icache.c -c micromips32_icache.c \
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-n micromips32_semantics.h -hs micromips32_semantics.h \
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-n micromips32_semantics.c -s micromips32_semantics.c \
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-n micromips32_idecode.h -hd micromips32_idecode.h \
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-n micromips32_idecode.c -d micromips32_idecode.c \
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-n micromips32_model.h -hm micromips32_model.h \
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-n micromips32_model.c -m micromips32_model.c \
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-n micromips32_support.h -hf micromips32_support.h \
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-n micromips32_support.c -f micromips32_support.c \
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#
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$(ECHO_IGEN) $(IGEN_RUN) \
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$(IGEN_TRACE) \
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-I $(srcdir) \
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-Werror \
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-Wnodiscard \
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$(SIM_MIPS_IGEN_FLAGS) \
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-G gen-direct-access \
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-G gen-zero-r0 \
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-B 32 \
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-H 31 \
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-i $(IGEN_INSN) \
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-o $(IGEN_DC) \
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-P micromips_m32_ \
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-x \
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-n micromips_m32_icache.h -hc micromips_m32_icache.h \
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-n micromips_m32_icache.c -c micromips_m32_icache.c \
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-n micromips_m32_semantics.h -hs micromips_m32_semantics.h \
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-n micromips_m32_semantics.c -s micromips_m32_semantics.c \
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-n micromips_m32_idecode.h -hd micromips_m32_idecode.h \
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-n micromips_m32_idecode.c -d micromips_m32_idecode.c \
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-n micromips_m32_model.h -hm micromips_m32_model.h \
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-n micromips_m32_model.c -m micromips_m32_model.c \
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-n micromips_m32_support.h -hf micromips_m32_support.h \
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-n micromips_m32_support.c -f micromips_m32_support.c \
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#
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$(ECHO_IGEN) $(IGEN_RUN) \
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$(IGEN_TRACE) \
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-I $(srcdir) \
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-Werror \
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-Wnodiscard \
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-Wnowidth \
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$(SIM_MIPS_IGEN_FLAGS) $(SIM_MIPS_MICROMIPS_FLAGS) $(SIM_MIPS_MICROMIPS16_FLAGS) \
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-G gen-direct-access \
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-G gen-zero-r0 \
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-i $(IGEN_INSN) \
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-n itable.h -ht itable.h \
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-n itable.c -t itable.c \
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#
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$(SILENCE) touch $@
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BUILT_SRC_FROM_MULTI = $(SIM_MIPS_MULTI_SRC)
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$(BUILT_SRC_FROM_MULTI): tmp-multi
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tmp-multi: tmp-mach-multi tmp-itable-multi tmp-run-multi
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tmp-mach-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
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for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
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p=`echo $${t} | sed -e 's/:.*//'` ; \
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m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
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f=`echo $${t} | sed -e 's/.*://'` ; \
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case $${p} in \
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micromips16*) e="-B 16 -H 15 -o $(MICROMIPS16_DC) -F 16" ;; \
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micromips32* | micromips64*) \
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e="-B 32 -H 31 -o $(MICROMIPS32_DC) -F $${f}" ;; \
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micromips_m32*) \
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e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}"; \
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m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
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micromips_m64*) \
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e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}"; \
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m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
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m16*) e="-B 16 -H 15 -o $(M16_DC) -F 16" ;; \
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*) e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}" ;; \
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esac; \
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$(IGEN_RUN) \
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$(IGEN_TRACE) \
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$${e} \
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-I $(srcdir) \
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-Werror \
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-Wnodiscard \
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-N 0 \
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-M $${m} \
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-G gen-direct-access \
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-G gen-zero-r0 \
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-i $(IGEN_INSN) \
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-P $${p}_ \
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-x \
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-n $${p}_icache.h -hc $${p}_icache.h \
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-n $${p}_icache.c -c $${p}_icache.c \
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-n $${p}_semantics.h -hs $${p}_semantics.h \
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-n $${p}_semantics.c -s $${p}_semantics.c \
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-n $${p}_idecode.h -hd $${p}_idecode.h \
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-n $${p}_idecode.c -d $${p}_idecode.c \
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-n $${p}_model.h -hm $${p}_model.h \
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-n $${p}_model.c -m $${p}_model.c \
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-n $${p}_support.h -hf $${p}_support.h \
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-n $${p}_support.c -f $${p}_support.c \
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-n $${p}_engine.h -he $${p}_engine.h \
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-n $${p}_engine.c -e $${p}_engine.c \
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|| exit; \
|
|
done
|
|
$(SILENCE) touch $@
|
|
tmp-itable-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
|
|
$(ECHO_IGEN) $(IGEN_RUN) \
|
|
$(IGEN_TRACE) \
|
|
-I $(srcdir) \
|
|
-Werror \
|
|
-Wnodiscard \
|
|
-Wnowidth \
|
|
-N 0 \
|
|
$(SIM_MIPS_MULTI_FLAGS) \
|
|
-G gen-direct-access \
|
|
-G gen-zero-r0 \
|
|
-i $(IGEN_INSN) \
|
|
-n itable.h -ht itable.h \
|
|
-n itable.c -t itable.c \
|
|
#
|
|
$(SILENCE) touch $@
|
|
tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c
|
|
for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
|
|
case $${t} in \
|
|
m16*) \
|
|
m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
|
|
sed < $(srcdir)/m16run.c > tmp-run \
|
|
-e "s/^sim_/m16$${m}_/" \
|
|
-e "/include/s/sim-engine/m16$${m}_engine/" \
|
|
-e "s/m16_/m16$${m}_/" \
|
|
-e "s/m32_/m32$${m}_/" ; \
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-run \
|
|
m16$${m}_run.c ; \
|
|
;;\
|
|
micromips32*) \
|
|
m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
|
|
sed < $(srcdir)/micromipsrun.c > tmp-run \
|
|
-e "s/^sim_/micromips32$${m}_/" \
|
|
-e "/include/s/sim-engine/micromips32$${m}_engine/" \
|
|
-e "s/micromips16_/micromips16$${m}_/" \
|
|
-e "s/micromips32_/micromips32$${m}_/" \
|
|
-e "s/m32_/m32$${m}_/" ; \
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-run \
|
|
micromips$${m}_run.c ; \
|
|
;;\
|
|
micromips64*) \
|
|
m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
|
|
sed < $(srcdir)/micromipsrun.c > tmp-run \
|
|
-e "s/^sim_/micromips64$${m}_/" \
|
|
-e "/include/s/sim-engine/micromips64$${m}_engine/" \
|
|
-e "s/micromips16_/micromips16$${m}_/" \
|
|
-e "s/micromips32_/micromips64$${m}_/" \
|
|
-e "s/m32_/m64$${m}_/" ; \
|
|
$(SHELL) $(srcdir)/../../move-if-change tmp-run \
|
|
micromips$${m}_run.c ; \
|
|
;;\
|
|
esac \
|
|
done
|
|
$(SILENCE) touch $@
|
|
|
|
clean-extra:
|
|
rm -f $(BUILT_SRC_FROM_GEN)
|
|
rm -f $(BUILT_SRC_FROM_IGEN)
|
|
rm -f $(BUILT_SRC_FROM_M16)
|
|
rm -f $(BUILT_SRC_FROM_MICROMIPS)
|
|
rm -f $(BUILT_SRC_FROM_MULTI)
|
|
rm -f tmp-*
|
|
rm -f micromips16*.o micromips32*.o m16*.o m32*.o itable*.o
|
|
|
|
distclean-extra:
|
|
rm -f multi-include.h multi-run.c
|