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https://sourceware.org/git/binutils-gdb.git
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fd67aa1129
Adds two new external authors to etc/update-copyright.py to cover bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then updates copyright messages as follows: 1) Update cgen/utils.scm emitted copyrights. 2) Run "etc/update-copyright.py --this-year" with an extra external author I haven't committed, 'Kalray SA.', to cover gas testsuite files (which should have their copyright message removed). 3) Build with --enable-maintainer-mode --enable-cgen-maint=yes. 4) Check out */po/*.pot which we don't update frequently.
1956 lines
53 KiB
C
1956 lines
53 KiB
C
/* TI PRU assembler.
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Copyright (C) 2014-2024 Free Software Foundation, Inc.
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Contributed by Dimitar Dimitrov <dimitar@dinux.eu>
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Based on tc-nios2.c
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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#include "as.h"
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#include <stdint.h>
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#include "opcode/pru.h"
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#include "elf/pru.h"
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#include "tc-pru.h"
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#include "bfd.h"
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#include "dwarf2dbg.h"
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#include "subsegs.h"
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#include "safe-ctype.h"
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#include "dw2gencfi.h"
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#ifndef OBJ_ELF
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/* We are not supporting any other target so we throw a compile time error. */
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#error "OBJ_ELF not defined"
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#endif
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/* This array holds the chars that always start a comment. If the
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pre-processor is disabled, these aren't very useful. */
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const char comment_chars[] = "#;";
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/* This array holds the chars that only start a comment at the beginning of
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a line. If the line seems to have the form '# 123 filename'
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.line and .file directives will appear in the pre-processed output. */
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/* Note that input_file.c hand checks for '#' at the beginning of the
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first line of the input file. This is because the compiler outputs
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#NO_APP at the beginning of its output. */
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/* Also note that C style comments are always supported. */
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const char line_comment_chars[] = "#;*";
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/* This array holds machine specific line separator characters. */
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const char line_separator_chars[] = "";
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/* Chars that can be used to separate mant from exp in floating point nums. */
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const char EXP_CHARS[] = "eE";
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/* Chars that mean this number is a floating point constant.
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As in 0f12.456
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or 0d1.2345e12 */
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const char FLT_CHARS[] = "rRsSfFdDxXpP";
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/* Machine-dependent command-line options. */
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struct pru_opt_s
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{
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/* -mno-link-relax / -mlink-relax: generate (or not)
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relocations for linker relaxation. */
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bool link_relax;
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/* -mno-warn-regname-label: do not output a warning that a label name
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matches a register name. */
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bool warn_regname_label;
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};
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static struct pru_opt_s pru_opt = { true, true };
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const char *md_shortopts = "r";
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enum options
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{
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OPTION_LINK_RELAX = OPTION_MD_BASE + 1,
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OPTION_NO_LINK_RELAX,
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OPTION_NO_WARN_REGNAME_LABEL,
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};
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struct option md_longopts[] = {
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{ "mlink-relax", no_argument, NULL, OPTION_LINK_RELAX },
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{ "mno-link-relax", no_argument, NULL, OPTION_NO_LINK_RELAX },
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{ "mno-warn-regname-label", no_argument, NULL,
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OPTION_NO_WARN_REGNAME_LABEL },
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{ NULL, no_argument, NULL, 0 }
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};
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size_t md_longopts_size = sizeof (md_longopts);
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typedef struct pru_insn_reloc
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{
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/* Any expression in the instruction is parsed into this field,
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which is passed to fix_new_exp () to generate a fixup. */
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expressionS reloc_expression;
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/* The type of the relocation to be applied. */
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bfd_reloc_code_real_type reloc_type;
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/* PC-relative. */
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unsigned int reloc_pcrel;
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/* The next relocation to be applied to the instruction. */
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struct pru_insn_reloc *reloc_next;
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} pru_insn_relocS;
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/* This struct is used to hold state when assembling instructions. */
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typedef struct pru_insn_info
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{
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/* Assembled instruction. */
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unsigned long insn_code;
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/* Used for assembling LDI32. */
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unsigned long ldi32_imm32;
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/* Pointer to the relevant bit of the opcode table. */
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const struct pru_opcode *insn_pru_opcode;
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/* After parsing ptrs to the tokens in the instruction fill this array
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it is terminated with a null pointer (hence the first +1).
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The second +1 is because in some parts of the code the opcode
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is not counted as a token, but still placed in this array. */
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const char *insn_tokens[PRU_MAX_INSN_TOKENS + 1 + 1];
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/* This holds information used to generate fixups
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and eventually relocations if it is not null. */
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pru_insn_relocS *insn_reloc;
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} pru_insn_infoS;
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/* Opcode hash table. */
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static htab_t pru_opcode_hash = NULL;
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#define pru_opcode_lookup(NAME) \
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((struct pru_opcode *) str_hash_find (pru_opcode_hash, (NAME)))
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/* Register hash table. */
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static htab_t pru_reg_hash = NULL;
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#define pru_reg_lookup(NAME) \
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((struct pru_reg *) str_hash_find (pru_reg_hash, (NAME)))
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/* The known current alignment of the current section. */
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static int pru_current_align;
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static segT pru_current_align_seg;
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static int pru_auto_align_on = 1;
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/* The last seen label in the current section. This is used to auto-align
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labels preceding instructions. */
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static symbolS *pru_last_label;
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/** Utility routines. */
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/* Function md_chars_to_number takes the sequence of
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bytes in buf and returns the corresponding value
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in an int. n must be 1, 2, 4 or 8. */
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static uint64_t
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md_chars_to_number (char *buf, int n)
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{
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int i;
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uint64_t val;
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gas_assert (n == 1 || n == 2 || n == 4 || n == 8);
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val = 0;
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for (i = 0; i < n; ++i)
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val = val | ((buf[i] & 0xff) << 8 * i);
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return val;
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}
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/* This function turns a C long int, short int or char
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into the series of bytes that represent the number
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on the target machine. */
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void
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md_number_to_chars (char *buf, valueT val, int n)
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{
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gas_assert (n == 1 || n == 2 || n == 4 || n == 8);
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number_to_chars_littleendian (buf, val, n);
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}
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/* Turn a string in input_line_pointer into a floating point constant
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of type TYPE, and store the appropriate bytes in *LITP. The number
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of LITTLENUMS emitted is stored in *SIZEP. An error message is
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returned, or NULL on OK. */
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const char *
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md_atof (int type, char *litP, int *sizeP)
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{
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return ieee_md_atof (type, litP, sizeP, false);
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}
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/* Return true if STR starts with PREFIX, which should be a string literal. */
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#define strprefix(STR, PREFIX) \
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(strncmp ((STR), PREFIX, strlen (PREFIX)) == 0)
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/* nop fill pattern for text section. */
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static char const nop[4] = { 0xe0, 0xe0, 0xe0, 0x12 };
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/* Handles all machine-dependent alignment needs. */
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static void
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pru_align (int log_size, const char *pfill, symbolS *label)
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{
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int align;
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long max_alignment = 15;
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/* The front end is prone to changing segments out from under us
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temporarily when -g is in effect. */
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int switched_seg_p = (pru_current_align_seg != now_seg);
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align = log_size;
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if (align > max_alignment)
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{
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align = max_alignment;
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as_bad (_("Alignment too large: %d assumed"), align);
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}
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else if (align < 0)
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{
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as_warn (_("Alignment negative: 0 assumed"));
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align = 0;
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}
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if (align != 0)
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{
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if (subseg_text_p (now_seg) && align >= 2)
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{
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/* First, make sure we're on a four-byte boundary, in case
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someone has been putting .byte values the text section. */
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if (pru_current_align < 2 || switched_seg_p)
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frag_align (2, 0, 0);
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/* Now fill in the alignment pattern. */
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if (pfill != NULL)
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frag_align_pattern (align, pfill, sizeof nop, 0);
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else
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frag_align (align, 0, 0);
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}
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else
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frag_align (align, 0, 0);
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if (!switched_seg_p)
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pru_current_align = align;
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/* If the last label was in a different section we can't align it. */
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if (label != NULL && !switched_seg_p)
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{
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symbolS *sym;
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int label_seen = false;
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struct frag *old_frag;
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valueT old_value;
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valueT new_value;
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gas_assert (S_GET_SEGMENT (label) == now_seg);
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old_frag = symbol_get_frag (label);
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old_value = S_GET_VALUE (label);
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new_value = (valueT) frag_now_fix ();
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/* It is possible to have more than one label at a particular
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address, especially if debugging is enabled, so we must
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take care to adjust all the labels at this address in this
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fragment. To save time we search from the end of the symbol
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list, backwards, since the symbols we are interested in are
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almost certainly the ones that were most recently added.
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Also to save time we stop searching once we have seen at least
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one matching label, and we encounter a label that is no longer
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in the target fragment. Note, this search is guaranteed to
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find at least one match when sym == label, so no special case
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code is necessary. */
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for (sym = symbol_lastP; sym != NULL; sym = symbol_previous (sym))
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if (symbol_get_frag (sym) == old_frag
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&& S_GET_VALUE (sym) == old_value)
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{
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label_seen = true;
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symbol_set_frag (sym, frag_now);
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S_SET_VALUE (sym, new_value);
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}
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else if (label_seen && symbol_get_frag (sym) != old_frag)
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break;
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}
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record_alignment (now_seg, align);
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}
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}
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/** Support for self-check mode. */
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/* Mode of the assembler. */
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typedef enum
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{
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PRU_MODE_ASSEMBLE, /* Ordinary operation. */
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PRU_MODE_TEST /* Hidden mode used for self testing. */
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} PRU_MODE;
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static PRU_MODE pru_mode = PRU_MODE_ASSEMBLE;
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/* This function is used to in self-checking mode
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to check the assembled instruction.
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OPCODE should be the assembled opcode, and exp_opcode
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the parsed string representing the expected opcode. */
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static void
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pru_check_assembly (unsigned int opcode, const char *exp_opcode)
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{
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if (pru_mode == PRU_MODE_TEST)
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{
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if (exp_opcode == NULL)
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as_bad (_("expecting opcode string in self test mode"));
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else if (opcode != strtoul (exp_opcode, NULL, 16))
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as_bad (_("assembly 0x%08x, expected %s"), opcode, exp_opcode);
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}
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}
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/** Support for machine-dependent assembler directives. */
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/* Handle the .align pseudo-op. This aligns to a power of two. It
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also adjusts any current instruction label. We treat this the same
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way the MIPS port does: .align 0 turns off auto alignment. */
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static void
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s_pru_align (int ignore ATTRIBUTE_UNUSED)
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{
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int align;
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char fill;
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const char *pfill = NULL;
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long max_alignment = 15;
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align = get_absolute_expression ();
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if (align > max_alignment)
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{
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align = max_alignment;
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as_bad (_("Alignment too large: %d assumed"), align);
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}
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else if (align < 0)
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{
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as_warn (_("Alignment negative: 0 assumed"));
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align = 0;
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}
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if (*input_line_pointer == ',')
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{
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input_line_pointer++;
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fill = get_absolute_expression ();
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pfill = (const char *) &fill;
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}
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else if (subseg_text_p (now_seg))
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pfill = (const char *) &nop;
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else
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{
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pfill = NULL;
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pru_last_label = NULL;
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}
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if (align != 0)
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{
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pru_auto_align_on = 1;
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pru_align (align, pfill, pru_last_label);
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pru_last_label = NULL;
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}
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else
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pru_auto_align_on = 0;
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demand_empty_rest_of_line ();
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}
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/* Handle the .text pseudo-op. This is like the usual one, but it
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clears the saved last label and resets known alignment. */
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static void
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s_pru_text (int i)
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{
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s_text (i);
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pru_last_label = NULL;
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pru_current_align = 0;
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pru_current_align_seg = now_seg;
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}
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/* Handle the .data pseudo-op. This is like the usual one, but it
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clears the saved last label and resets known alignment. */
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static void
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s_pru_data (int i)
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{
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s_data (i);
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pru_last_label = NULL;
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pru_current_align = 0;
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pru_current_align_seg = now_seg;
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}
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/* Handle the .section pseudo-op. This is like the usual one, but it
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clears the saved last label and resets known alignment. */
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static void
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s_pru_section (int ignore)
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{
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obj_elf_section (ignore);
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pru_last_label = NULL;
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pru_current_align = 0;
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pru_current_align_seg = now_seg;
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}
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/* Explicitly unaligned cons. */
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static void
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s_pru_ucons (int nbytes)
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{
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int hold;
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hold = pru_auto_align_on;
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pru_auto_align_on = 0;
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cons (nbytes);
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pru_auto_align_on = hold;
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}
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/* .set sets assembler options. */
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static void
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s_pru_set (int equiv)
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{
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char *save = input_line_pointer;
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char *directive;
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char delim = get_symbol_name (&directive);
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char *endline = input_line_pointer;
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(void) restore_line_pointer (delim);
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/* We only want to handle ".set XXX" if the
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user has tried ".set XXX, YYY" they are not
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trying a directive. This prevents
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us from polluting the name space. */
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SKIP_WHITESPACE ();
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if (is_end_of_line[(unsigned char) *input_line_pointer])
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{
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bool done = true;
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*endline = 0;
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if (!strcmp (directive, "no_warn_regname_label"))
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pru_opt.warn_regname_label = false;
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else
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done = false;
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if (done)
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{
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*endline = delim;
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demand_empty_rest_of_line ();
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return;
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}
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}
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/* If we fall through to here, either we have ".set XXX, YYY"
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or we have ".set XXX" where XXX is unknown or we have
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a syntax error. */
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input_line_pointer = save;
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s_set (equiv);
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}
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/* Machine-dependent assembler directives.
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Format of each entry is:
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{ "directive", handler_func, param } */
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const pseudo_typeS md_pseudo_table[] = {
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{"align", s_pru_align, 0},
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{"text", s_pru_text, 0},
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{"data", s_pru_data, 0},
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{"section", s_pru_section, 0},
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{"section.s", s_pru_section, 0},
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{"sect", s_pru_section, 0},
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{"sect.s", s_pru_section, 0},
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/* .dword and .half are included for compatibility with MIPS. */
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{"dword", cons, 8},
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{"half", cons, 2},
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/* PRU native word size is 4 bytes, so we override
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the GAS default of 2. */
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{"word", cons, 4},
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/* Explicitly unaligned directives. */
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{"2byte", s_pru_ucons, 2},
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{"4byte", s_pru_ucons, 4},
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{"8byte", s_pru_ucons, 8},
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{"16byte", s_pru_ucons, 16},
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{"set", s_pru_set, 0},
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{NULL, NULL, 0}
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};
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int
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md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
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asection *seg ATTRIBUTE_UNUSED)
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{
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abort ();
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return 0;
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}
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void
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md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT segment ATTRIBUTE_UNUSED,
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fragS *fragp ATTRIBUTE_UNUSED)
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{
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abort ();
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}
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static bool
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relaxable_section (asection *sec)
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{
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return ((sec->flags & SEC_DEBUGGING) == 0
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&& (sec->flags & SEC_CODE) != 0
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&& (sec->flags & SEC_ALLOC) != 0);
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}
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/* Does whatever the xtensa port does. */
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int
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pru_validate_fix_sub (fixS *fix)
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{
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segT add_symbol_segment, sub_symbol_segment;
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/* The difference of two symbols should be resolved by the assembler when
|
||
linkrelax is not set. If the linker may relax the section containing
|
||
the symbols, then an Xtensa DIFF relocation must be generated so that
|
||
the linker knows to adjust the difference value. */
|
||
if (!linkrelax || fix->fx_addsy == NULL)
|
||
return 0;
|
||
|
||
/* Make sure both symbols are in the same segment, and that segment is
|
||
"normal" and relaxable. If the segment is not "normal", then the
|
||
fix is not valid. If the segment is not "relaxable", then the fix
|
||
should have been handled earlier. */
|
||
add_symbol_segment = S_GET_SEGMENT (fix->fx_addsy);
|
||
if (! SEG_NORMAL (add_symbol_segment)
|
||
|| ! relaxable_section (add_symbol_segment))
|
||
return 0;
|
||
|
||
sub_symbol_segment = S_GET_SEGMENT (fix->fx_subsy);
|
||
return (sub_symbol_segment == add_symbol_segment);
|
||
}
|
||
|
||
/* TC_FORCE_RELOCATION hook. */
|
||
|
||
/* If linkrelax is turned on, and the symbol to relocate
|
||
against is in a relaxable segment, don't compute the value -
|
||
generate a relocation instead. */
|
||
int
|
||
pru_force_relocation (fixS *fix)
|
||
{
|
||
if (linkrelax && fix->fx_addsy
|
||
&& relaxable_section (S_GET_SEGMENT (fix->fx_addsy)))
|
||
return 1;
|
||
|
||
return generic_force_reloc (fix);
|
||
}
|
||
|
||
|
||
|
||
/** Fixups and overflow checking. */
|
||
|
||
/* Check a fixup for overflow. */
|
||
static bfd_reloc_status_type
|
||
pru_check_overflow (valueT fixup, reloc_howto_type *howto)
|
||
{
|
||
bfd_reloc_status_type ret;
|
||
|
||
ret = bfd_check_overflow (howto->complain_on_overflow,
|
||
howto->bitsize,
|
||
howto->rightshift,
|
||
bfd_get_reloc_size (howto) * 8,
|
||
fixup);
|
||
|
||
return ret;
|
||
}
|
||
|
||
/* Emit diagnostic for fixup overflow. */
|
||
static void
|
||
pru_diagnose_overflow (valueT fixup, reloc_howto_type *howto,
|
||
fixS *fixP, valueT value)
|
||
{
|
||
if (fixP->fx_r_type == BFD_RELOC_8
|
||
|| fixP->fx_r_type == BFD_RELOC_16
|
||
|| fixP->fx_r_type == BFD_RELOC_32)
|
||
/* These relocs are against data, not instructions. */
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("immediate value 0x%x truncated to 0x%x"),
|
||
(unsigned int) fixup,
|
||
(unsigned int) (~(~(valueT) 0 << howto->bitsize) & fixup));
|
||
else
|
||
{
|
||
/* What opcode is the instruction? This will determine
|
||
whether we check for overflow in immediate values
|
||
and what error message we get. */
|
||
const struct pru_opcode *opcode;
|
||
enum overflow_type overflow_msg_type;
|
||
unsigned int range_min;
|
||
unsigned int range_max;
|
||
unsigned int address;
|
||
gas_assert (fixP->fx_size == 4);
|
||
opcode = pru_find_opcode (value);
|
||
gas_assert (opcode);
|
||
overflow_msg_type = opcode->overflow_msg;
|
||
switch (overflow_msg_type)
|
||
{
|
||
case call_target_overflow:
|
||
range_min
|
||
= ((fixP->fx_frag->fr_address + fixP->fx_where) & 0xf0000000);
|
||
range_max = range_min + 0x0fffffff;
|
||
address = fixup | range_min;
|
||
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("call target address 0x%08x out of range 0x%08x to 0x%08x"),
|
||
address, range_min, range_max);
|
||
break;
|
||
case qbranch_target_overflow:
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("quick branch offset %d out of range %d to %d"),
|
||
(int)fixup, -((1<<9) * 4), (1 << 9) * 4);
|
||
break;
|
||
case address_offset_overflow:
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("%s offset %d out of range %d to %d"),
|
||
opcode->name, (int)fixup, -32768, 32767);
|
||
break;
|
||
case signed_immed16_overflow:
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("immediate value %d out of range %d to %d"),
|
||
(int)fixup, -32768, 32767);
|
||
break;
|
||
case unsigned_immed32_overflow:
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("immediate value %llu out of range %u to %lu"),
|
||
(unsigned long long)fixup, 0, 0xfffffffflu);
|
||
break;
|
||
case unsigned_immed16_overflow:
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("immediate value %u out of range %u to %u"),
|
||
(unsigned int)fixup, 0, 65535);
|
||
break;
|
||
case unsigned_immed5_overflow:
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("immediate value %u out of range %u to %u"),
|
||
(unsigned int)fixup, 0, 31);
|
||
break;
|
||
default:
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("overflow in immediate argument"));
|
||
break;
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Apply a fixup to the object file. */
|
||
void
|
||
md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
|
||
{
|
||
unsigned char *where;
|
||
valueT value = *valP;
|
||
|
||
/* Assert that the fixup is one we can handle. */
|
||
gas_assert (fixP != NULL && valP != NULL
|
||
&& (fixP->fx_r_type == BFD_RELOC_8
|
||
|| fixP->fx_r_type == BFD_RELOC_16
|
||
|| fixP->fx_r_type == BFD_RELOC_32
|
||
|| fixP->fx_r_type == BFD_RELOC_64
|
||
|| fixP->fx_r_type == BFD_RELOC_PRU_LDI32
|
||
|| fixP->fx_r_type == BFD_RELOC_PRU_U16
|
||
|| fixP->fx_r_type == BFD_RELOC_PRU_U16_PMEMIMM
|
||
|| fixP->fx_r_type == BFD_RELOC_PRU_S10_PCREL
|
||
|| fixP->fx_r_type == BFD_RELOC_PRU_U8_PCREL
|
||
|| fixP->fx_r_type == BFD_RELOC_PRU_32_PMEM
|
||
|| fixP->fx_r_type == BFD_RELOC_PRU_16_PMEM
|
||
/* Add other relocs here as we generate them. */
|
||
));
|
||
|
||
if (fixP->fx_r_type == BFD_RELOC_64)
|
||
{
|
||
/* We may reach here due to .8byte directives, but we never output
|
||
BFD_RELOC_64; it must be resolved. */
|
||
if (fixP->fx_addsy != NULL)
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("cannot create 64-bit relocation"));
|
||
else
|
||
{
|
||
md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
|
||
*valP, 8);
|
||
fixP->fx_done = 1;
|
||
}
|
||
return;
|
||
}
|
||
|
||
/* gas_assert (had_errors () || !fixP->fx_subsy); */
|
||
|
||
/* In general, fix instructions with immediate
|
||
constants. But leave LDI32 for the linker,
|
||
which is prepared to shorten insns. */
|
||
if (fixP->fx_addsy == (symbolS *) NULL
|
||
&& fixP->fx_r_type != BFD_RELOC_PRU_LDI32)
|
||
fixP->fx_done = 1;
|
||
|
||
else if (fixP->fx_pcrel)
|
||
{
|
||
segT s = S_GET_SEGMENT (fixP->fx_addsy);
|
||
|
||
if (s == seg || s == absolute_section)
|
||
{
|
||
/* Blindly copied from AVR, but I don't understand why
|
||
this is needed in the first place. Fail hard to catch
|
||
when this curious code snippet is utilized. */
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("unexpected PC relative expression"));
|
||
value += S_GET_VALUE (fixP->fx_addsy);
|
||
fixP->fx_done = 1;
|
||
}
|
||
}
|
||
else if (linkrelax && fixP->fx_subsy)
|
||
{
|
||
/* For a subtraction relocation expression, generate one
|
||
of the DIFF relocs, with the value being the difference.
|
||
Note that a sym1 - sym2 expression is adjusted into a
|
||
section_start_sym + sym4_offset_from_section_start - sym1
|
||
expression. fixP->fx_addsy holds the section start symbol,
|
||
fixP->fx_offset holds sym2's offset, and fixP->fx_subsy
|
||
holds sym1. Calculate the current difference and write value,
|
||
but leave fx_offset as is - during relaxation,
|
||
fx_offset - value gives sym1's value. */
|
||
|
||
offsetT diffval; /* valueT is unsigned, so use offsetT. */
|
||
|
||
diffval = S_GET_VALUE (fixP->fx_addsy)
|
||
+ fixP->fx_offset - S_GET_VALUE (fixP->fx_subsy);
|
||
|
||
switch (fixP->fx_r_type)
|
||
{
|
||
case BFD_RELOC_8:
|
||
fixP->fx_r_type = BFD_RELOC_PRU_GNU_DIFF8;
|
||
break;
|
||
case BFD_RELOC_16:
|
||
fixP->fx_r_type = BFD_RELOC_PRU_GNU_DIFF16;
|
||
break;
|
||
case BFD_RELOC_32:
|
||
fixP->fx_r_type = BFD_RELOC_PRU_GNU_DIFF32;
|
||
break;
|
||
case BFD_RELOC_PRU_16_PMEM:
|
||
fixP->fx_r_type = BFD_RELOC_PRU_GNU_DIFF16_PMEM;
|
||
if (diffval % 4)
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("residual low bits in pmem diff relocation"));
|
||
diffval /= 4;
|
||
break;
|
||
case BFD_RELOC_PRU_32_PMEM:
|
||
fixP->fx_r_type = BFD_RELOC_PRU_GNU_DIFF32_PMEM;
|
||
if (diffval % 4)
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("residual low bits in pmem diff relocation"));
|
||
diffval /= 4;
|
||
break;
|
||
default:
|
||
as_bad_subtract (fixP);
|
||
break;
|
||
}
|
||
|
||
value = *valP = diffval;
|
||
|
||
fixP->fx_subsy = NULL;
|
||
}
|
||
/* We don't actually support subtracting a symbol. */
|
||
if (fixP->fx_subsy != (symbolS *) NULL)
|
||
as_bad_subtract (fixP);
|
||
|
||
/* For the DIFF relocs, write the value into the object file while still
|
||
keeping fx_done FALSE, as both the difference (recorded in the object file)
|
||
and the sym offset (part of fixP) are needed at link relax time. */
|
||
where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
|
||
switch (fixP->fx_r_type)
|
||
{
|
||
case BFD_RELOC_PRU_GNU_DIFF8:
|
||
*where = value;
|
||
break;
|
||
case BFD_RELOC_PRU_GNU_DIFF16:
|
||
case BFD_RELOC_PRU_GNU_DIFF16_PMEM:
|
||
bfd_putl16 ((bfd_vma) value, where);
|
||
break;
|
||
case BFD_RELOC_PRU_GNU_DIFF32:
|
||
case BFD_RELOC_PRU_GNU_DIFF32_PMEM:
|
||
bfd_putl32 ((bfd_vma) value, where);
|
||
break;
|
||
default:
|
||
break;
|
||
}
|
||
|
||
if (fixP->fx_done)
|
||
/* Fully resolved fixup. */
|
||
{
|
||
reloc_howto_type *howto
|
||
= bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);
|
||
|
||
if (howto == NULL)
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("relocation is not supported"));
|
||
else
|
||
{
|
||
valueT fixup = value;
|
||
uint64_t insn;
|
||
char *buf;
|
||
|
||
/* Get the instruction or data to be fixed up. */
|
||
buf = fixP->fx_frag->fr_literal + fixP->fx_where;
|
||
insn = md_chars_to_number (buf, fixP->fx_size);
|
||
|
||
/* Check for overflow, emitting a diagnostic if necessary. */
|
||
if (pru_check_overflow (fixup, howto) != bfd_reloc_ok)
|
||
pru_diagnose_overflow (fixup, howto, fixP, insn);
|
||
|
||
/* Apply the right shift. */
|
||
fixup = (offsetT) fixup >> howto->rightshift;
|
||
|
||
/* Truncate the fixup to right size. */
|
||
if (howto->bitsize == 0)
|
||
fixup = 0;
|
||
else
|
||
fixup &= ((valueT) 2 << (howto->bitsize - 1)) - 1;
|
||
|
||
/* Fix up the instruction. Non-contiguous bitfields need
|
||
special handling. */
|
||
if (fixP->fx_r_type == BFD_RELOC_PRU_LDI32)
|
||
{
|
||
/* As the only 64-bit "insn", LDI32 needs special handling. */
|
||
uint32_t insn1 = insn & 0xffffffff;
|
||
uint32_t insn2 = insn >> 32;
|
||
SET_INSN_FIELD (IMM16, insn1, fixup >> 16);
|
||
SET_INSN_FIELD (IMM16, insn2, fixup & 0xffff);
|
||
|
||
SET_INSN_FIELD (RDSEL, insn1, RSEL_31_16);
|
||
SET_INSN_FIELD (RDSEL, insn2, RSEL_15_0);
|
||
|
||
md_number_to_chars (buf, insn1, 4);
|
||
md_number_to_chars (buf + 4, insn2, 4);
|
||
}
|
||
else
|
||
{
|
||
if (fixP->fx_r_type == BFD_RELOC_PRU_S10_PCREL)
|
||
SET_BROFF_URAW (insn, fixup);
|
||
else
|
||
insn = (insn & ~howto->dst_mask) | (fixup << howto->bitpos);
|
||
md_number_to_chars (buf, insn, fixP->fx_size);
|
||
}
|
||
}
|
||
|
||
fixP->fx_done = 1;
|
||
}
|
||
|
||
if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT)
|
||
{
|
||
fixP->fx_done = 0;
|
||
if (fixP->fx_addsy
|
||
&& !S_IS_DEFINED (fixP->fx_addsy) && !S_IS_WEAK (fixP->fx_addsy))
|
||
S_SET_WEAK (fixP->fx_addsy);
|
||
}
|
||
else if (fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
|
||
fixP->fx_done = 0;
|
||
}
|
||
|
||
|
||
|
||
/** Instruction parsing support. */
|
||
|
||
/* Creates a new pru_insn_relocS and returns a pointer to it. */
|
||
static pru_insn_relocS *
|
||
pru_insn_reloc_new (bfd_reloc_code_real_type reloc_type, unsigned int pcrel)
|
||
{
|
||
pru_insn_relocS *retval;
|
||
retval = XNEW (pru_insn_relocS);
|
||
if (retval == NULL)
|
||
{
|
||
as_bad (_("can't create relocation"));
|
||
abort ();
|
||
}
|
||
|
||
/* Fill out the fields with default values. */
|
||
retval->reloc_next = NULL;
|
||
retval->reloc_type = reloc_type;
|
||
retval->reloc_pcrel = pcrel;
|
||
return retval;
|
||
}
|
||
|
||
/* Frees up memory previously allocated by pru_insn_reloc_new (). */
|
||
static void
|
||
pru_insn_reloc_destroy (pru_insn_relocS *reloc)
|
||
{
|
||
pru_insn_relocS *next;
|
||
|
||
while (reloc)
|
||
{
|
||
next = reloc->reloc_next;
|
||
free (reloc);
|
||
reloc = next;
|
||
}
|
||
}
|
||
|
||
/* The various pru_assemble_* functions call this
|
||
function to generate an expression from a string representing an expression.
|
||
It then tries to evaluate the expression, and if it can, returns its value.
|
||
If not, it creates a new pru_insn_relocS and stores the expression and
|
||
reloc_type for future use. */
|
||
static unsigned long
|
||
pru_assemble_expression (const char *exprstr,
|
||
pru_insn_infoS *insn,
|
||
pru_insn_relocS *prev_reloc,
|
||
bfd_reloc_code_real_type reloc_type,
|
||
unsigned int pcrel)
|
||
{
|
||
expressionS *ep;
|
||
pru_insn_relocS *reloc;
|
||
char *saved_line_ptr;
|
||
unsigned short value;
|
||
|
||
gas_assert (exprstr != NULL);
|
||
gas_assert (insn != NULL);
|
||
|
||
/* We use this blank keyword to distinguish register from
|
||
label operands. */
|
||
if (strstr (exprstr, "%label") != NULL)
|
||
{
|
||
exprstr += strlen ("%label") + 1;
|
||
}
|
||
|
||
/* Check for pmem relocation operator.
|
||
Change the relocation type and advance the ptr to the start of
|
||
the expression proper. */
|
||
if (strstr (exprstr, "%pmem") != NULL)
|
||
{
|
||
reloc_type = BFD_RELOC_PRU_U16_PMEMIMM;
|
||
exprstr += strlen ("%pmem") + 1;
|
||
}
|
||
|
||
/* We potentially have a relocation. */
|
||
reloc = pru_insn_reloc_new (reloc_type, pcrel);
|
||
if (prev_reloc != NULL)
|
||
prev_reloc->reloc_next = reloc;
|
||
else
|
||
insn->insn_reloc = reloc;
|
||
|
||
/* Parse the expression string. */
|
||
ep = &reloc->reloc_expression;
|
||
saved_line_ptr = input_line_pointer;
|
||
input_line_pointer = (char *) exprstr;
|
||
SKIP_WHITESPACE ();
|
||
expression (ep);
|
||
SKIP_WHITESPACE ();
|
||
if (*input_line_pointer)
|
||
as_bad (_("trailing garbage after expression: %s"), input_line_pointer);
|
||
input_line_pointer = saved_line_ptr;
|
||
|
||
|
||
if (ep->X_op == O_illegal || ep->X_op == O_absent)
|
||
as_bad (_("expected expression, got %s"), exprstr);
|
||
|
||
/* This is redundant as the fixup will put this into
|
||
the instruction, but it is included here so that
|
||
self-test mode (-r) works. */
|
||
value = 0;
|
||
if (pru_mode == PRU_MODE_TEST && ep->X_op == O_constant)
|
||
value = ep->X_add_number;
|
||
|
||
return (unsigned long) value;
|
||
}
|
||
|
||
/* Try to parse a non-relocatable expression. */
|
||
static unsigned long
|
||
pru_assemble_noreloc_expression (const char *exprstr)
|
||
{
|
||
expressionS exp;
|
||
char *saved_line_ptr;
|
||
unsigned long val;
|
||
|
||
gas_assert (exprstr != NULL);
|
||
|
||
saved_line_ptr = input_line_pointer;
|
||
input_line_pointer = (char *) exprstr;
|
||
SKIP_WHITESPACE ();
|
||
expression (&exp);
|
||
SKIP_WHITESPACE ();
|
||
if (*input_line_pointer)
|
||
as_bad (_("trailing garbage after expression: %s"), input_line_pointer);
|
||
input_line_pointer = saved_line_ptr;
|
||
|
||
val = 0;
|
||
if (exp.X_op != O_constant)
|
||
as_bad (_("expected constant expression, got %s"), exprstr);
|
||
else
|
||
val = exp.X_add_number;
|
||
|
||
return val;
|
||
}
|
||
|
||
/* Argument assemble functions.
|
||
All take an instruction argument string, and a pointer
|
||
to an instruction opcode. Upon return the insn_opcode
|
||
has the relevant fields filled in to represent the arg
|
||
string. The return value is NULL if successful, or
|
||
an error message if an error was detected. */
|
||
|
||
static void
|
||
pru_assemble_arg_d (pru_insn_infoS *insn_info, const char *argstr)
|
||
{
|
||
struct pru_reg *dst = pru_reg_lookup (argstr);
|
||
|
||
if (dst == NULL)
|
||
as_bad (_("unknown register %s"), argstr);
|
||
else
|
||
{
|
||
SET_INSN_FIELD (RD, insn_info->insn_code, dst->index);
|
||
SET_INSN_FIELD (RDSEL, insn_info->insn_code, dst->regsel);
|
||
}
|
||
}
|
||
|
||
static void
|
||
pru_assemble_arg_D (pru_insn_infoS *insn_info, const char *argstr)
|
||
{
|
||
struct pru_reg *dst;
|
||
|
||
/* The leading & before an address register is optional. */
|
||
if (*argstr == '&')
|
||
argstr++;
|
||
|
||
dst = pru_reg_lookup (argstr);
|
||
|
||
if (dst == NULL)
|
||
as_bad (_("unknown register %s"), argstr);
|
||
else
|
||
{
|
||
unsigned long rxb = 0;
|
||
|
||
switch (dst->regsel)
|
||
{
|
||
case RSEL_31_0: rxb = 0; break; /* whole register defaults to .b0 */
|
||
case RSEL_7_0: rxb = 0; break;
|
||
case RSEL_15_8: rxb = 1; break;
|
||
case RSEL_23_16: rxb = 2; break;
|
||
case RSEL_31_24: rxb = 3; break;
|
||
default:
|
||
as_bad (_("data transfer register cannot be halfword"));
|
||
}
|
||
|
||
SET_INSN_FIELD (RD, insn_info->insn_code, dst->index);
|
||
SET_INSN_FIELD (RDB, insn_info->insn_code, rxb);
|
||
}
|
||
}
|
||
|
||
static void
|
||
pru_assemble_arg_R (pru_insn_infoS *insn_info, const char *argstr)
|
||
{
|
||
struct pru_reg *dst = pru_reg_lookup (argstr);
|
||
|
||
if (dst == NULL)
|
||
as_bad (_("unknown register %s"), argstr);
|
||
else
|
||
{
|
||
if (dst->regsel != RSEL_31_0)
|
||
{
|
||
as_bad (_("destination register must be full-word"));
|
||
}
|
||
|
||
SET_INSN_FIELD (RD, insn_info->insn_code, dst->index);
|
||
SET_INSN_FIELD (RDSEL, insn_info->insn_code, dst->regsel);
|
||
}
|
||
}
|
||
|
||
static void
|
||
pru_assemble_arg_s (pru_insn_infoS *insn_info, const char *argstr)
|
||
{
|
||
struct pru_reg *src1 = pru_reg_lookup (argstr);
|
||
|
||
if (src1 == NULL)
|
||
as_bad (_("unknown register %s"), argstr);
|
||
else
|
||
{
|
||
SET_INSN_FIELD (RS1, insn_info->insn_code, src1->index);
|
||
SET_INSN_FIELD (RS1SEL, insn_info->insn_code, src1->regsel);
|
||
}
|
||
}
|
||
|
||
static void
|
||
pru_assemble_arg_S (pru_insn_infoS *insn_info, const char *argstr)
|
||
{
|
||
struct pru_reg *src1 = pru_reg_lookup (argstr);
|
||
|
||
if (src1 == NULL)
|
||
as_bad (_("unknown register %s"), argstr);
|
||
else
|
||
{
|
||
if (src1->regsel != RSEL_31_0)
|
||
as_bad (_("cannot use partial register %s for addressing"), argstr);
|
||
SET_INSN_FIELD (RS1, insn_info->insn_code, src1->index);
|
||
}
|
||
}
|
||
|
||
static void
|
||
pru_assemble_arg_b (pru_insn_infoS *insn_info, const char *argstr)
|
||
{
|
||
struct pru_reg *src2 = pru_reg_lookup (argstr);
|
||
if (src2 == NULL)
|
||
{
|
||
unsigned long imm8 = pru_assemble_noreloc_expression (argstr);
|
||
if (imm8 >= 0x100)
|
||
as_bad (_("value %lu is too large for a byte operand"), imm8);
|
||
SET_INSN_FIELD (IMM8, insn_info->insn_code, imm8);
|
||
SET_INSN_FIELD (IO, insn_info->insn_code, 1);
|
||
}
|
||
else
|
||
{
|
||
SET_INSN_FIELD (IO, insn_info->insn_code, 0);
|
||
SET_INSN_FIELD (RS2, insn_info->insn_code, src2->index);
|
||
SET_INSN_FIELD (RS2SEL, insn_info->insn_code, src2->regsel);
|
||
}
|
||
|
||
}
|
||
|
||
static void
|
||
pru_assemble_arg_B (pru_insn_infoS *insn_info, const char *argstr)
|
||
{
|
||
struct pru_reg *src2 = pru_reg_lookup (argstr);
|
||
if (src2 == NULL)
|
||
{
|
||
unsigned long imm8;
|
||
imm8 = pru_assemble_noreloc_expression (argstr);
|
||
if (!imm8 || imm8 > 0xff)
|
||
as_bad (_("loop count constant %ld is out of range [1..%d]"),
|
||
imm8, 0xff);
|
||
/* Note: HW expects the immediate loop count field
|
||
to be one less than the actual loop count. */
|
||
SET_INSN_FIELD (IMM8, insn_info->insn_code, imm8 - 1);
|
||
SET_INSN_FIELD (IO, insn_info->insn_code, 1);
|
||
}
|
||
else
|
||
{
|
||
SET_INSN_FIELD (IO, insn_info->insn_code, 0);
|
||
SET_INSN_FIELD (RS2, insn_info->insn_code, src2->index);
|
||
SET_INSN_FIELD (RS2SEL, insn_info->insn_code, src2->regsel);
|
||
}
|
||
}
|
||
|
||
static void
|
||
pru_assemble_arg_i (pru_insn_infoS *insn_info, const char *argstr)
|
||
{
|
||
unsigned long imm32;
|
||
|
||
/* We must not generate PRU_LDI32 relocation if relaxation is disabled in
|
||
GAS. Consider the following scenario: GAS relaxation is disabled, so
|
||
DIFF* expressions are fixed and not emitted as relocations. Then if LD
|
||
has relaxation enabled, it may shorten LDI32 but will not update
|
||
accordingly the DIFF expressions. */
|
||
if (pru_opt.link_relax)
|
||
imm32 = pru_assemble_expression (argstr, insn_info,
|
||
insn_info->insn_reloc,
|
||
BFD_RELOC_PRU_LDI32, 0);
|
||
else
|
||
imm32 = pru_assemble_noreloc_expression (argstr);
|
||
|
||
/* QUIRK: LDI must clear IO bit high, even though it has immediate arg. */
|
||
SET_INSN_FIELD (IO, insn_info->insn_code, 0);
|
||
SET_INSN_FIELD (RDSEL, insn_info->insn_code, RSEL_31_16);
|
||
SET_INSN_FIELD (IMM16, insn_info->insn_code, imm32 >> 16);
|
||
insn_info->ldi32_imm32 = imm32;
|
||
}
|
||
|
||
static void
|
||
pru_assemble_arg_j (pru_insn_infoS *insn_info, const char *argstr)
|
||
{
|
||
struct pru_reg *src2 = pru_reg_lookup (argstr);
|
||
|
||
if (src2 == NULL)
|
||
{
|
||
unsigned long imm16 = pru_assemble_expression (argstr, insn_info,
|
||
insn_info->insn_reloc,
|
||
BFD_RELOC_PRU_U16_PMEMIMM,
|
||
0);
|
||
SET_INSN_FIELD (IMM16, insn_info->insn_code, imm16);
|
||
SET_INSN_FIELD (IO, insn_info->insn_code, 1);
|
||
}
|
||
else
|
||
{
|
||
SET_INSN_FIELD (IO, insn_info->insn_code, 0);
|
||
SET_INSN_FIELD (RS2, insn_info->insn_code, src2->index);
|
||
SET_INSN_FIELD (RS2SEL, insn_info->insn_code, src2->regsel);
|
||
}
|
||
}
|
||
|
||
static void
|
||
pru_assemble_arg_W (pru_insn_infoS *insn_info, const char *argstr)
|
||
{
|
||
unsigned long imm16 = pru_assemble_expression (argstr, insn_info,
|
||
insn_info->insn_reloc,
|
||
BFD_RELOC_PRU_U16, 0);
|
||
/* QUIRK: LDI must clear IO bit high, even though it has immediate arg. */
|
||
SET_INSN_FIELD (IO, insn_info->insn_code, 0);
|
||
SET_INSN_FIELD (IMM16, insn_info->insn_code, imm16);
|
||
}
|
||
|
||
static void
|
||
pru_assemble_arg_o (pru_insn_infoS *insn_info, const char *argstr)
|
||
{
|
||
unsigned long imm10 = pru_assemble_expression (argstr, insn_info,
|
||
insn_info->insn_reloc,
|
||
BFD_RELOC_PRU_S10_PCREL, 1);
|
||
SET_BROFF_URAW (insn_info->insn_code, imm10);
|
||
}
|
||
|
||
static void
|
||
pru_assemble_arg_O (pru_insn_infoS *insn_info, const char *argstr)
|
||
{
|
||
unsigned long imm8 = pru_assemble_expression (argstr, insn_info,
|
||
insn_info->insn_reloc,
|
||
BFD_RELOC_PRU_U8_PCREL, 1);
|
||
SET_INSN_FIELD (LOOP_JMPOFFS, insn_info->insn_code, imm8);
|
||
}
|
||
|
||
static void
|
||
pru_assemble_arg_l (pru_insn_infoS *insn_info, const char *argstr)
|
||
{
|
||
unsigned long burstlen = 0;
|
||
struct pru_reg *blreg = pru_reg_lookup (argstr);
|
||
|
||
if (blreg == NULL)
|
||
{
|
||
burstlen = pru_assemble_noreloc_expression (argstr);
|
||
if (!burstlen || burstlen > LSSBBO_BYTECOUNT_R0_BITS7_0)
|
||
as_bad (_("byte count constant %ld is out of range [1..%d]"),
|
||
burstlen, LSSBBO_BYTECOUNT_R0_BITS7_0);
|
||
burstlen--;
|
||
}
|
||
else
|
||
{
|
||
if (blreg->index != 0)
|
||
as_bad (_("only r0 can be used as byte count register"));
|
||
else if (blreg->regsel > RSEL_31_24)
|
||
as_bad (_("only r0.bX byte fields of r0 can be used as byte count"));
|
||
else
|
||
burstlen = LSSBBO_BYTECOUNT_R0_BITS7_0 + blreg->regsel;
|
||
}
|
||
SET_BURSTLEN (insn_info->insn_code, burstlen);
|
||
}
|
||
|
||
static void
|
||
pru_assemble_arg_n (pru_insn_infoS *insn_info, const char *argstr)
|
||
{
|
||
unsigned long burstlen = 0;
|
||
struct pru_reg *blreg = pru_reg_lookup (argstr);
|
||
|
||
if (blreg == NULL)
|
||
{
|
||
burstlen = pru_assemble_noreloc_expression (argstr);
|
||
if (!burstlen || burstlen > LSSBBO_BYTECOUNT_R0_BITS7_0)
|
||
as_bad (_("byte count constant %ld is out of range [1..%d]"),
|
||
burstlen, LSSBBO_BYTECOUNT_R0_BITS7_0);
|
||
burstlen--;
|
||
}
|
||
else
|
||
{
|
||
if (blreg->index != 0)
|
||
as_bad (_("only r0 can be used as byte count register"));
|
||
else if (blreg->regsel > RSEL_31_24)
|
||
as_bad (_("only r0.bX byte fields of r0 can be used as byte count"));
|
||
else
|
||
burstlen = LSSBBO_BYTECOUNT_R0_BITS7_0 + blreg->regsel;
|
||
}
|
||
SET_INSN_FIELD (XFR_LENGTH, insn_info->insn_code, burstlen);
|
||
}
|
||
|
||
static void
|
||
pru_assemble_arg_c (pru_insn_infoS *insn_info, const char *argstr)
|
||
{
|
||
unsigned long cb = pru_assemble_noreloc_expression (argstr);
|
||
|
||
if (cb > 31)
|
||
as_bad (_("invalid constant table offset %ld"), cb);
|
||
else
|
||
SET_INSN_FIELD (CB, insn_info->insn_code, cb);
|
||
}
|
||
|
||
static void
|
||
pru_assemble_arg_w (pru_insn_infoS *insn_info, const char *argstr)
|
||
{
|
||
unsigned long wk = pru_assemble_noreloc_expression (argstr);
|
||
|
||
if (wk != 0 && wk != 1)
|
||
as_bad (_("invalid WakeOnStatus %ld"), wk);
|
||
else
|
||
SET_INSN_FIELD (WAKEONSTATUS, insn_info->insn_code, wk);
|
||
}
|
||
|
||
static void
|
||
pru_assemble_arg_x (pru_insn_infoS *insn_info, const char *argstr)
|
||
{
|
||
unsigned long wba = pru_assemble_noreloc_expression (argstr);
|
||
|
||
if (wba > 255)
|
||
as_bad (_("invalid XFR WideBus Address %ld"), wba);
|
||
else
|
||
SET_INSN_FIELD (XFR_WBA, insn_info->insn_code, wba);
|
||
}
|
||
|
||
/* The function consume_arg takes a pointer into a string
|
||
of instruction tokens (args) and a pointer into a string
|
||
representing the expected sequence of tokens and separators.
|
||
It checks whether the first argument in argstr is of the
|
||
expected type, throwing an error if it is not, and returns
|
||
the pointer argstr. */
|
||
static char *
|
||
pru_consume_arg (char *argstr, const char *parsestr)
|
||
{
|
||
char *temp;
|
||
|
||
switch (*parsestr)
|
||
{
|
||
case 'W':
|
||
if (*argstr == '%')
|
||
{
|
||
if (strprefix (argstr, "%pmem") || strprefix (argstr, "%label"))
|
||
{
|
||
/* We zap the parentheses because we don't want them confused
|
||
with separators. */
|
||
temp = strchr (argstr, '(');
|
||
if (temp != NULL)
|
||
*temp = ' ';
|
||
temp = strchr (argstr, ')');
|
||
if (temp != NULL)
|
||
*temp = ' ';
|
||
}
|
||
else
|
||
as_bad (_("badly formed expression near %s"), argstr);
|
||
}
|
||
break;
|
||
|
||
case 'j':
|
||
case 'o':
|
||
case 'O':
|
||
if (*argstr == '%')
|
||
{
|
||
/* Only 'j' really requires %label for distinguishing registers
|
||
from labels, but we include 'o' and 'O' here to avoid
|
||
confusing assembler programmers. Thus for completeness all
|
||
jump operands can be prefixed with %label. */
|
||
if (strprefix (argstr, "%label"))
|
||
{
|
||
/* We zap the parentheses because we don't want them confused
|
||
with separators. */
|
||
temp = strchr (argstr, '(');
|
||
if (temp != NULL)
|
||
*temp = ' ';
|
||
temp = strchr (argstr, ')');
|
||
if (temp != NULL)
|
||
*temp = ' ';
|
||
}
|
||
else
|
||
as_bad (_("badly formed expression near %s"), argstr);
|
||
}
|
||
break;
|
||
|
||
case 'b':
|
||
case 'B':
|
||
case 'c':
|
||
case 'd':
|
||
case 'D':
|
||
case 'E':
|
||
case 'i':
|
||
case 's':
|
||
case 'S':
|
||
case 'l':
|
||
case 'n':
|
||
case 'R':
|
||
case 'w':
|
||
case 'x':
|
||
/* We can't have %pmem here. */
|
||
if (*argstr == '%')
|
||
as_bad (_("badly formed expression near %s"), argstr);
|
||
break;
|
||
default:
|
||
BAD_CASE (*parsestr);
|
||
break;
|
||
}
|
||
|
||
return argstr;
|
||
}
|
||
|
||
/* The function consume_separator takes a pointer into a string
|
||
of instruction tokens (args) and a pointer into a string representing
|
||
the expected sequence of tokens and separators. It finds the first
|
||
instance of the character pointed to by separator in argstr, and
|
||
returns a pointer to the next element of argstr, which is the
|
||
following token in the sequence. */
|
||
static char *
|
||
pru_consume_separator (char *argstr, const char *separator)
|
||
{
|
||
char *p;
|
||
|
||
p = strchr (argstr, *separator);
|
||
|
||
if (p != NULL)
|
||
*p++ = 0;
|
||
else
|
||
as_bad (_("expecting %c near %s"), *separator, argstr);
|
||
return p;
|
||
}
|
||
|
||
|
||
/* The principal argument parsing function which takes a string argstr
|
||
representing the instruction arguments for insn, and extracts the argument
|
||
tokens matching parsestr into parsed_args. */
|
||
static void
|
||
pru_parse_args (pru_insn_infoS *insn ATTRIBUTE_UNUSED, char *argstr,
|
||
const char *parsestr, char **parsed_args)
|
||
{
|
||
char *p;
|
||
char *end = NULL;
|
||
int i;
|
||
p = argstr;
|
||
i = 0;
|
||
bool terminate = false;
|
||
|
||
/* This rest of this function is it too fragile and it mostly works,
|
||
therefore special case this one. */
|
||
if (*parsestr == 0 && argstr != 0)
|
||
{
|
||
as_bad (_("too many arguments"));
|
||
parsed_args[0] = NULL;
|
||
return;
|
||
}
|
||
|
||
while (p != NULL && !terminate && i < PRU_MAX_INSN_TOKENS)
|
||
{
|
||
parsed_args[i] = pru_consume_arg (p, parsestr);
|
||
++parsestr;
|
||
if (*parsestr != '\0')
|
||
{
|
||
p = pru_consume_separator (p, parsestr);
|
||
++parsestr;
|
||
}
|
||
else
|
||
{
|
||
/* Check that the argument string has no trailing arguments. */
|
||
/* If we've got a %pmem relocation, we've zapped the parens with
|
||
spaces. */
|
||
if (strprefix (p, "%pmem") || strprefix (p, "%label"))
|
||
end = strpbrk (p, ",");
|
||
else
|
||
end = strpbrk (p, " ,");
|
||
|
||
if (end != NULL)
|
||
as_bad (_("too many arguments"));
|
||
}
|
||
|
||
if (*parsestr == '\0' || (p != NULL && *p == '\0'))
|
||
terminate = true;
|
||
++i;
|
||
}
|
||
|
||
parsed_args[i] = NULL;
|
||
|
||
/* There are no instructions with optional arguments; complain. */
|
||
if (*parsestr != '\0')
|
||
as_bad (_("missing argument"));
|
||
}
|
||
|
||
|
||
/** Assembler output support. */
|
||
|
||
/* Output a normal instruction. */
|
||
static void
|
||
output_insn (pru_insn_infoS *insn)
|
||
{
|
||
char *f;
|
||
pru_insn_relocS *reloc;
|
||
|
||
f = frag_more (4);
|
||
/* This allocates enough space for the instruction
|
||
and puts it in the current frag. */
|
||
md_number_to_chars (f, insn->insn_code, 4);
|
||
/* Emit debug info. */
|
||
dwarf2_emit_insn (4);
|
||
/* Create any fixups to be acted on later. */
|
||
for (reloc = insn->insn_reloc; reloc != NULL; reloc = reloc->reloc_next)
|
||
fix_new_exp (frag_now, f - frag_now->fr_literal, 4,
|
||
&reloc->reloc_expression, reloc->reloc_pcrel,
|
||
reloc->reloc_type);
|
||
}
|
||
|
||
/* Output two LDI instructions from LDI32 macro */
|
||
static void
|
||
output_insn_ldi32 (pru_insn_infoS *insn)
|
||
{
|
||
char *f;
|
||
pru_insn_relocS *reloc;
|
||
unsigned long insn2;
|
||
|
||
f = frag_more (8);
|
||
SET_INSN_FIELD (IMM16, insn->insn_code, insn->ldi32_imm32 >> 16);
|
||
SET_INSN_FIELD (RDSEL, insn->insn_code, RSEL_31_16);
|
||
md_number_to_chars (f, insn->insn_code, 4);
|
||
|
||
insn2 = insn->insn_code;
|
||
SET_INSN_FIELD (IMM16, insn2, insn->ldi32_imm32 & 0xffff);
|
||
SET_INSN_FIELD (RDSEL, insn2, RSEL_15_0);
|
||
md_number_to_chars (f + 4, insn2, 4);
|
||
|
||
/* Emit debug info. */
|
||
dwarf2_emit_insn (8);
|
||
|
||
/* Create any fixups to be acted on later. */
|
||
for (reloc = insn->insn_reloc; reloc != NULL; reloc = reloc->reloc_next)
|
||
fix_new_exp (frag_now, f - frag_now->fr_literal, 4,
|
||
&reloc->reloc_expression, reloc->reloc_pcrel,
|
||
reloc->reloc_type);
|
||
}
|
||
|
||
|
||
/** External interfaces. */
|
||
|
||
/* The following functions are called by machine-independent parts of
|
||
the assembler. */
|
||
int
|
||
md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED)
|
||
{
|
||
switch (c)
|
||
{
|
||
case 'r':
|
||
/* Hidden option for self-test mode. */
|
||
pru_mode = PRU_MODE_TEST;
|
||
break;
|
||
case OPTION_LINK_RELAX:
|
||
pru_opt.link_relax = true;
|
||
break;
|
||
case OPTION_NO_LINK_RELAX:
|
||
pru_opt.link_relax = false;
|
||
break;
|
||
case OPTION_NO_WARN_REGNAME_LABEL:
|
||
pru_opt.warn_regname_label = false;
|
||
break;
|
||
default:
|
||
return 0;
|
||
break;
|
||
}
|
||
|
||
return 1;
|
||
}
|
||
|
||
const char *
|
||
pru_target_format (void)
|
||
{
|
||
return "elf32-pru";
|
||
}
|
||
|
||
/* Machine-dependent usage message. */
|
||
void
|
||
md_show_usage (FILE *stream)
|
||
{
|
||
fprintf (stream,
|
||
_("PRU options:\n"
|
||
" -mlink-relax generate relocations for linker relaxation (default).\n"
|
||
" -mno-link-relax don't generate relocations for linker relaxation.\n"
|
||
));
|
||
|
||
}
|
||
|
||
/* This function is called once, at assembler startup time.
|
||
It should set up all the tables, etc. that the MD part of the
|
||
assembler will need. */
|
||
void
|
||
md_begin (void)
|
||
{
|
||
int i;
|
||
|
||
/* Create and fill a hashtable for the PRU opcodes, registers and
|
||
arguments. */
|
||
pru_opcode_hash = str_htab_create ();
|
||
pru_reg_hash = str_htab_create ();
|
||
|
||
for (i = 0; i < NUMOPCODES; ++i)
|
||
if (str_hash_insert (pru_opcode_hash, pru_opcodes[i].name,
|
||
&pru_opcodes[i], 0) != NULL)
|
||
as_fatal (_("duplicate %s"), pru_opcodes[i].name);
|
||
|
||
for (i = 0; i < pru_num_regs; ++i)
|
||
if (str_hash_insert (pru_reg_hash, pru_regs[i].name, &pru_regs[i], 0))
|
||
as_fatal (_("duplicate %s"), pru_regs[i].name);
|
||
|
||
linkrelax = pru_opt.link_relax;
|
||
/* Initialize the alignment data. */
|
||
pru_current_align_seg = now_seg;
|
||
pru_last_label = NULL;
|
||
pru_current_align = 0;
|
||
}
|
||
|
||
|
||
/* Assembles a single line of PRU assembly language. */
|
||
void
|
||
md_assemble (char *op_str)
|
||
{
|
||
char *argstr;
|
||
char *op_strdup = NULL;
|
||
pru_insn_infoS thisinsn;
|
||
pru_insn_infoS *insn = &thisinsn;
|
||
|
||
/* Make sure we are aligned on a 4-byte boundary. */
|
||
if (pru_current_align < 2)
|
||
pru_align (2, NULL, pru_last_label);
|
||
else if (pru_current_align > 2)
|
||
pru_current_align = 2;
|
||
pru_last_label = NULL;
|
||
|
||
/* We don't want to clobber to op_str
|
||
because we want to be able to use it in messages. */
|
||
op_strdup = strdup (op_str);
|
||
insn->insn_tokens[0] = strtok (op_strdup, " ");
|
||
argstr = strtok (NULL, "");
|
||
|
||
/* Assemble the opcode. */
|
||
insn->insn_pru_opcode = pru_opcode_lookup (insn->insn_tokens[0]);
|
||
insn->insn_reloc = NULL;
|
||
|
||
if (insn->insn_pru_opcode != NULL)
|
||
{
|
||
const char *argsfmt = insn->insn_pru_opcode->args;
|
||
const char **argtk = &insn->insn_tokens[1];
|
||
const char *argp;
|
||
|
||
/* Set the opcode for the instruction. */
|
||
insn->insn_code = insn->insn_pru_opcode->match;
|
||
|
||
if (pru_mode == PRU_MODE_TEST)
|
||
{
|
||
/* Add the "expected" instruction parameter used for validation. */
|
||
argsfmt = malloc (strlen (argsfmt) + 3);
|
||
sprintf ((char *)argsfmt, "%s,E", insn->insn_pru_opcode->args);
|
||
}
|
||
pru_parse_args (insn, argstr, argsfmt,
|
||
(char **) &insn->insn_tokens[1]);
|
||
|
||
for (argp = argsfmt; !had_errors () && *argp && *argtk; ++argp)
|
||
{
|
||
gas_assert (argtk <= &insn->insn_tokens[PRU_MAX_INSN_TOKENS]);
|
||
|
||
switch (*argp)
|
||
{
|
||
case ',':
|
||
continue;
|
||
|
||
case 'd':
|
||
pru_assemble_arg_d (insn, *argtk++);
|
||
continue;
|
||
case 'D':
|
||
pru_assemble_arg_D (insn, *argtk++);
|
||
continue;
|
||
case 'R':
|
||
pru_assemble_arg_R (insn, *argtk++);
|
||
continue;
|
||
case 's':
|
||
pru_assemble_arg_s (insn, *argtk++);
|
||
continue;
|
||
case 'S':
|
||
pru_assemble_arg_S (insn, *argtk++);
|
||
continue;
|
||
case 'b':
|
||
pru_assemble_arg_b (insn, *argtk++);
|
||
continue;
|
||
case 'B':
|
||
pru_assemble_arg_B (insn, *argtk++);
|
||
continue;
|
||
case 'i':
|
||
pru_assemble_arg_i (insn, *argtk++);
|
||
continue;
|
||
case 'j':
|
||
pru_assemble_arg_j (insn, *argtk++);
|
||
continue;
|
||
case 'W':
|
||
pru_assemble_arg_W (insn, *argtk++);
|
||
continue;
|
||
case 'o':
|
||
pru_assemble_arg_o (insn, *argtk++);
|
||
continue;
|
||
case 'O':
|
||
pru_assemble_arg_O (insn, *argtk++);
|
||
continue;
|
||
case 'l':
|
||
pru_assemble_arg_l (insn, *argtk++);
|
||
continue;
|
||
case 'n':
|
||
pru_assemble_arg_n (insn, *argtk++);
|
||
continue;
|
||
case 'c':
|
||
pru_assemble_arg_c (insn, *argtk++);
|
||
continue;
|
||
case 'w':
|
||
pru_assemble_arg_w (insn, *argtk++);
|
||
continue;
|
||
case 'x':
|
||
pru_assemble_arg_x (insn, *argtk++);
|
||
continue;
|
||
|
||
case 'E':
|
||
pru_check_assembly (insn->insn_code, *argtk++);
|
||
continue;
|
||
|
||
default:
|
||
BAD_CASE (*argp);
|
||
}
|
||
}
|
||
|
||
if (*argp && !had_errors ())
|
||
as_bad (_("missing argument"));
|
||
|
||
if (!had_errors ())
|
||
{
|
||
if (insn->insn_pru_opcode->pinfo & PRU_INSN_LDI32)
|
||
{
|
||
output_insn_ldi32 (insn);
|
||
}
|
||
else
|
||
{
|
||
output_insn (insn);
|
||
}
|
||
}
|
||
|
||
if (pru_mode == PRU_MODE_TEST)
|
||
free ((char *)argsfmt);
|
||
}
|
||
else
|
||
/* Unrecognised instruction - error. */
|
||
as_bad (_("unrecognised instruction %s"), insn->insn_tokens[0]);
|
||
|
||
/* Don't leak memory. */
|
||
pru_insn_reloc_destroy (insn->insn_reloc);
|
||
free (op_strdup);
|
||
}
|
||
|
||
/* Round up section size. */
|
||
valueT
|
||
md_section_align (asection *seg, valueT addr)
|
||
{
|
||
int align = bfd_section_alignment (seg);
|
||
return ((addr + (1 << align) - 1) & (-((valueT) 1 << align)));
|
||
}
|
||
|
||
/* Implement tc_fix_adjustable. */
|
||
int
|
||
pru_fix_adjustable (fixS *fixp)
|
||
{
|
||
if (fixp->fx_addsy == NULL)
|
||
return 1;
|
||
|
||
/* Prevent all adjustments to global symbols. */
|
||
if (OUTPUT_FLAVOR == bfd_target_elf_flavour
|
||
&& (S_IS_EXTERNAL (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy)))
|
||
return 0;
|
||
|
||
if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
|
||
|| fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
|
||
return 0;
|
||
|
||
/* Preserve relocations against symbols with function type. */
|
||
if (symbol_get_bfdsym (fixp->fx_addsy)->flags & BSF_FUNCTION)
|
||
return 0;
|
||
|
||
return 1;
|
||
}
|
||
|
||
/* The function tc_gen_reloc creates a relocation structure for the
|
||
fixup fixp, and returns a pointer to it. This structure is passed
|
||
to bfd_install_relocation so that it can be written to the object
|
||
file for linking. */
|
||
arelent *
|
||
tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
|
||
{
|
||
arelent *reloc = XNEW (arelent);
|
||
reloc->sym_ptr_ptr = XNEW (asymbol *);
|
||
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
|
||
|
||
reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
|
||
reloc->addend = fixp->fx_offset; /* fixp->fx_addnumber; */
|
||
|
||
reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
|
||
if (reloc->howto == NULL)
|
||
{
|
||
as_bad_where (fixp->fx_file, fixp->fx_line,
|
||
_("can't represent relocation type %s"),
|
||
bfd_get_reloc_code_name (fixp->fx_r_type));
|
||
|
||
/* Set howto to a garbage value so that we can keep going. */
|
||
reloc->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
|
||
gas_assert (reloc->howto != NULL);
|
||
}
|
||
return reloc;
|
||
}
|
||
|
||
long
|
||
md_pcrel_from (fixS *fixP ATTRIBUTE_UNUSED)
|
||
{
|
||
return fixP->fx_where + fixP->fx_frag->fr_address;
|
||
}
|
||
|
||
/* Called just before the assembler exits. */
|
||
void
|
||
pru_md_end (void)
|
||
{
|
||
htab_delete (pru_opcode_hash);
|
||
htab_delete (pru_reg_hash);
|
||
}
|
||
|
||
symbolS *
|
||
md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
|
||
{
|
||
return NULL;
|
||
}
|
||
|
||
/* Implement tc_frob_label. */
|
||
void
|
||
pru_frob_label (symbolS *lab)
|
||
{
|
||
/* Emit dwarf information. */
|
||
dwarf2_emit_label (lab);
|
||
|
||
/* Update the label's address with the current output pointer. */
|
||
symbol_set_frag (lab, frag_now);
|
||
S_SET_VALUE (lab, (valueT) frag_now_fix ());
|
||
|
||
/* Record this label for future adjustment after we find out what
|
||
kind of data it references, and the required alignment therewith. */
|
||
pru_last_label = lab;
|
||
|
||
if (pru_opt.warn_regname_label && pru_reg_lookup (S_GET_NAME (lab)))
|
||
as_warn (_("Label \"%s\" matches a CPU register name"), S_GET_NAME (lab));
|
||
}
|
||
|
||
static inline char *
|
||
skip_space (char *s)
|
||
{
|
||
while (*s == ' ' || *s == '\t')
|
||
++s;
|
||
return s;
|
||
}
|
||
|
||
/* Parse special CONS expression: pmem (expression). Idea from AVR.
|
||
|
||
Used to catch and mark code (program memory) in constant expression
|
||
relocations. Return non-zero for program memory. */
|
||
|
||
int
|
||
pru_parse_cons_expression (expressionS *exp, int nbytes)
|
||
{
|
||
int is_pmem = false;
|
||
char *tmp;
|
||
|
||
tmp = input_line_pointer = skip_space (input_line_pointer);
|
||
|
||
if (nbytes == 4 || nbytes == 2)
|
||
{
|
||
const char *pmem_str = "%pmem";
|
||
int len = strlen (pmem_str);
|
||
|
||
if (strncasecmp (input_line_pointer, pmem_str, len) == 0)
|
||
{
|
||
input_line_pointer = skip_space (input_line_pointer + len);
|
||
|
||
if (*input_line_pointer == '(')
|
||
{
|
||
input_line_pointer = skip_space (input_line_pointer + 1);
|
||
is_pmem = true;
|
||
expression (exp);
|
||
|
||
if (*input_line_pointer == ')')
|
||
++input_line_pointer;
|
||
else
|
||
{
|
||
as_bad (_("`)' required"));
|
||
is_pmem = false;
|
||
}
|
||
|
||
return is_pmem;
|
||
}
|
||
|
||
input_line_pointer = tmp;
|
||
}
|
||
}
|
||
|
||
expression (exp);
|
||
|
||
return is_pmem;
|
||
}
|
||
|
||
/* Implement TC_CONS_FIX_NEW. */
|
||
void
|
||
pru_cons_fix_new (fragS *frag, int where, unsigned int nbytes,
|
||
expressionS *exp, const int is_pmem)
|
||
{
|
||
bfd_reloc_code_real_type r;
|
||
|
||
switch (nbytes | (!!is_pmem << 8))
|
||
{
|
||
case 1 | (0 << 8): r = BFD_RELOC_8; break;
|
||
case 2 | (0 << 8): r = BFD_RELOC_16; break;
|
||
case 4 | (0 << 8): r = BFD_RELOC_32; break;
|
||
case 8 | (0 << 8): r = BFD_RELOC_64; break;
|
||
case 2 | (1 << 8): r = BFD_RELOC_PRU_16_PMEM; break;
|
||
case 4 | (1 << 8): r = BFD_RELOC_PRU_32_PMEM; break;
|
||
default:
|
||
as_bad (_("illegal %s relocation size: %d"),
|
||
is_pmem ? "text" : "data", nbytes);
|
||
return;
|
||
}
|
||
|
||
fix_new_exp (frag, where, (int) nbytes, exp, 0, r);
|
||
}
|
||
|
||
/* Implement tc_regname_to_dw2regnum, to convert REGNAME to a DWARF-2
|
||
register number. Return the starting HW byte-register number. */
|
||
|
||
int
|
||
pru_regname_to_dw2regnum (char *regname)
|
||
{
|
||
static const unsigned int regstart[RSEL_NUM_ITEMS] =
|
||
{
|
||
[RSEL_7_0] = 0,
|
||
[RSEL_15_8] = 1,
|
||
[RSEL_23_16] = 2,
|
||
[RSEL_31_24] = 3,
|
||
[RSEL_15_0] = 0,
|
||
[RSEL_23_8] = 1,
|
||
[RSEL_31_16] = 2,
|
||
[RSEL_31_0] = 0,
|
||
};
|
||
|
||
struct pru_reg *r = pru_reg_lookup (regname);
|
||
|
||
if (r == NULL || r->regsel >= RSEL_NUM_ITEMS)
|
||
return -1;
|
||
return r->index * 4 + regstart[r->regsel];
|
||
}
|
||
|
||
/* Implement tc_cfi_frame_initial_instructions, to initialize the DWARF-2
|
||
unwind information for this procedure. */
|
||
void
|
||
pru_frame_initial_instructions (void)
|
||
{
|
||
const unsigned fp_regno = 4 * 4;
|
||
cfi_add_CFA_def_cfa (fp_regno, 0);
|
||
}
|
||
|
||
bool
|
||
pru_allow_local_subtract (expressionS * left,
|
||
expressionS * right,
|
||
segT section)
|
||
{
|
||
/* If we are not in relaxation mode, subtraction is OK. */
|
||
if (!linkrelax)
|
||
return true;
|
||
|
||
/* If the symbols are not in a code section then they are OK. */
|
||
if ((section->flags & SEC_CODE) == 0)
|
||
return true;
|
||
|
||
if (left->X_add_symbol == right->X_add_symbol)
|
||
return true;
|
||
|
||
/* We have to assume that there may be instructions between the
|
||
two symbols and that relaxation may increase the distance between
|
||
them. */
|
||
return false;
|
||
}
|