mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-21 04:42:53 +08:00
74541ad4c0
* elf-bfd.h (struct elf_link_hash_table): Reorder. Add
text_index_section and data_index_section.
(struct elf_backend_data): Add elf_backend_init_index_section.
(_bfd_elf_init_1_index_section): Declare.
(_bfd_elf_init_2_index_sections): Declare.
* elfxx-target.h (elf_backend_init_index_section): Define.
(elfNN_bed): Init new field.
* elflink.c (_bfd_elf_link_omit_section_dynsym): Keep first tls
section and text_index_section plus data_index_section.
(_bfd_elf_link_renumber_dynsyms): Clear dynindx on omitted sections.
(_bfd_elf_init_1_index_section): New function.
(_bfd_elf_init_2_index_sections): New function.
(bfd_elf_size_dynsym_hash_dynstr): Call elf_backend_init_index_section.
(elf_link_input_bfd): When emitting relocs, use text_index_section
and data_index_section for removed sections.
* elf-m10300.c (elf_backend_omit_section_dynsym): Define.
* elf32-i386.c: Likewise.
* elf32-m32r.c: Likewise.
* elf32-sh.c: Likewise.
* elf32-xstormy16.c: Likewise.
* elf32-xtensa.c: Likewise.
* elf64-alpha.c: Likewise.
* elf64-hppa.c: Likewise.
* elf64-mmix.c: Likewise.
* elf64-sh64.c: Likewise.
* elfxx-ia64.c: Likewise.
* elf32-arm.c (elf32_arm_final_link_relocate): Use text_index_section
and data_index_section sym for relocs against sections with no dynamic
section sym.
(elf_backend_init_index_section): Define.
* elf32-cris.c: Similarly.
* elf32-hppa.c: Similarly.
* elf32-i370.c: Similarly.
* elf32-m68k.c: Similarly.
* elf32-mips.c: Similarly.
* elf32-ppc.c: Similarly.
* elf32-s390.c: Similarly.
* elf32-sparc.c: Similarly.
* elf32-vax.c: Similarly.
* elf64-mips.c: Similarly.
* elf64-ppc.c: Similarly.
* elf64-s390.c: Similarly.
* elf64-sparc.c: Similarly.
* elf64-x86-64.c: Similarly.
* elfn32-mips.c: Similarly.
* elfxx-mips.c: Similarly.
* elfxx-sparc.c: Similarly.
* linker.c (fix_syms): Base symbols in removed sections on
previous section in preference to using absolute section.
ld/
* ldlang.c (strip_excluded_output_sections): Do strip sections
that define syms, but don't ignore them.
* ld.texinfo (Output Section Discarding): Revise.
* emultempl/armcoff.em (gld${EMULATION_NAME}_finish): Always call
finish_default.
ld/testsuite/
Update for section sym changes.
410 lines
8.0 KiB
Makefile
410 lines
8.0 KiB
Makefile
#name: MIPS eh-frame 2, n64
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#source: eh-frame1.s
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#source: eh-frame1.s
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#as: -EB -64 --defsym alignment=3 --defsym fill=0
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#readelf: --relocs -wf
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#ld: -shared -melf64btsmip -Teh-frame1.ld
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Relocation section '\.rel\.dyn' .*:
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*Offset .*
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000000000000 [0-9a-f]+ R_MIPS_NONE *
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*Type2: R_MIPS_NONE *
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*Type3: R_MIPS_NONE *
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# Initial PCs for the FDEs attached to CIE 0x118
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000000030140 [0-9a-f]+ R_MIPS_REL32 *
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*Type2: R_MIPS_64 *
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*Type3: R_MIPS_NONE *
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000000030160 [0-9a-f]+ R_MIPS_REL32 *
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*Type2: R_MIPS_64 *
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*Type3: R_MIPS_NONE *
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# Likewise CIE 0x330
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000000030358 [0-9a-f]+ R_MIPS_REL32 *
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*Type2: R_MIPS_64 *
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*Type3: R_MIPS_NONE *
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000000030378 [0-9a-f]+ R_MIPS_REL32 *
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*Type2: R_MIPS_64 *
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*Type3: R_MIPS_NONE *
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0000000300cb [0-9a-f]+ R_MIPS_REL32 0000000000000000 foo
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*Type2: R_MIPS_64 *
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*Type3: R_MIPS_NONE *
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000000030130 [0-9a-f]+ R_MIPS_REL32 0000000000000000 foo
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*Type2: R_MIPS_64 *
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*Type3: R_MIPS_NONE *
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00000003018a [0-9a-f]+ R_MIPS_REL32 0000000000000000 foo
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*Type2: R_MIPS_64 *
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*Type3: R_MIPS_NONE *
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0000000302e3 [0-9a-f]+ R_MIPS_REL32 0000000000000000 foo
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*Type2: R_MIPS_64 *
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*Type3: R_MIPS_NONE *
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000000030348 [0-9a-f]+ R_MIPS_REL32 0000000000000000 foo
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*Type2: R_MIPS_64 *
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*Type3: R_MIPS_NONE *
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0000000303a2 [0-9a-f]+ R_MIPS_REL32 0000000000000000 foo
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*Type2: R_MIPS_64 *
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*Type3: R_MIPS_NONE *
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#...
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The section \.eh_frame contains:
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00000000 00000014 00000000 CIE
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Version: 1
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Augmentation: "zR"
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Code alignment factor: 1
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Data alignment factor: 4
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Return address column: 31
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Augmentation data: 10
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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00000018 0000001c 0000001c FDE cie=00000000 pc=00020000..00020010
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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00000038 0000001c 0000003c FDE cie=00000000 pc=00020010..00020030
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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# basic2 removed
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00000058 0000001c 0000005c FDE cie=00000000 pc=00020030..00020060
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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# basic3 removed
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00000078 0000001c 0000007c FDE cie=00000000 pc=00020060..000200a0
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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# basic4 removed
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00000098 0000001c 0000009c FDE cie=00000000 pc=000200a0..000200f0
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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000000b8 0000001c 00000000 CIE
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Version: 1
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Augmentation: "zRP"
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Code alignment factor: 1
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Data alignment factor: 4
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Return address column: 31
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Augmentation data: 10 00 00 00 00 00 00 00 00 00
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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000000d8 0000001c 00000024 FDE cie=000000b8 pc=000200f0..00020100
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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000000f8 0000001c 00000044 FDE cie=000000b8 pc=00020100..00020120
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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00000118 0000001c 00000000 CIE
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Version: 1
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Augmentation: "zP"
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Code alignment factor: 1
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Data alignment factor: 4
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Return address column: 31
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Augmentation data: 50 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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00000138 0000001c 00000024 FDE cie=00000118 pc=00020120..00020130
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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00000158 0000001c 00000044 FDE cie=00000118 pc=00020130..00020150
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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00000178 0000001c 00000000 CIE
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Version: 1
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Augmentation: "zPR"
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Code alignment factor: 1
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Data alignment factor: 4
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Return address column: 31
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Augmentation data: 00 00 00 00 00 00 00 00 00 10
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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00000198 0000001c 00000024 FDE cie=00000178 pc=00020150..00020160
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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# FDE for .discard removed
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# zPR2 removed
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000001b8 0000001c 00000044 FDE cie=00000178 pc=00020160..00020190
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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000001d8 0000001c 00000064 FDE cie=00000178 pc=00020190..000201d0
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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000001f8 00000014 00000000 CIE
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Version: 1
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Augmentation: "zR"
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Code alignment factor: 1
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Data alignment factor: 4
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Return address column: 31
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Augmentation data: 10
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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00000210 0000001c 0000001c FDE cie=000001f8 pc=000201d0..000201e0
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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# basic1 removed, followed by repeat of above
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00000230 0000001c 0000003c FDE cie=000001f8 pc=000201e0..000201f0
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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00000250 0000001c 0000005c FDE cie=000001f8 pc=000201f0..00020210
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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00000270 0000001c 0000007c FDE cie=000001f8 pc=00020210..00020240
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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00000290 0000001c 0000009c FDE cie=000001f8 pc=00020240..00020280
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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000002b0 0000001c 000000bc FDE cie=000001f8 pc=00020280..000202d0
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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000002d0 0000001c 00000000 CIE
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Version: 1
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Augmentation: "zRP"
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Code alignment factor: 1
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Data alignment factor: 4
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Return address column: 31
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Augmentation data: 10 00 00 00 00 00 00 00 00 00
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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000002f0 0000001c 00000024 FDE cie=000002d0 pc=000202d0..000202e0
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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00000310 0000001c 00000044 FDE cie=000002d0 pc=000202e0..00020300
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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00000330 0000001c 00000000 CIE
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Version: 1
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Augmentation: "zP"
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Code alignment factor: 1
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Data alignment factor: 4
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Return address column: 31
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Augmentation data: 50 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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00000350 0000001c 00000024 FDE cie=00000330 pc=00020300..00020310
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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00000370 0000001c 00000044 FDE cie=00000330 pc=00020310..00020330
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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00000390 0000001c 00000000 CIE
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Version: 1
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Augmentation: "zPR"
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Code alignment factor: 1
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Data alignment factor: 4
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Return address column: 31
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Augmentation data: 00 00 00 00 00 00 00 00 00 10
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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000003b0 0000001c 00000024 FDE cie=00000390 pc=00020330..00020340
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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000003d0 0000001c 00000044 FDE cie=00000390 pc=00020340..00020370
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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000003f0 0000001c 00000064 FDE cie=00000390 pc=00020370..000203b0
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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00000410 00000014 00000000 CIE
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Version: 1
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Augmentation: "zR"
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Code alignment factor: 1
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Data alignment factor: 4
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Return address column: 31
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Augmentation data: 10
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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00000428 0000001c 0000001c FDE cie=00000410 pc=000203b0..000203c0
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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DW_CFA_nop
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