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bfd/ 2011-08-01 H.J. Lu <hongjiu.lu@intel.com> PR ld/13048 * archures.c (bfd_mach_i386_intel_syntax): New. (bfd_mach_i386_i8086): Updated. (bfd_mach_i386_i386): Likewise. (bfd_mach_x86_64): Likewise. (bfd_mach_x64_32): Likewise. (bfd_mach_i386_i386_intel_syntax): Likewise. (bfd_mach_x86_64_intel_syntax): Likewise. (bfd_mach_x64_32_intel_syntax): Likewise. (bfd_mach_l1om): Likewise. (bfd_mach_l1om_intel_syntax): Likewise. (bfd_mach_k1om): Likewise. (bfd_mach_k1om_intel_syntax): Likewise. * bfd-in2.h: Regenerated. * cpu-i386.c (bfd_i386_compatible): Check mach instead of bits_per_address. (bfd_x64_32_arch_intel_syntax): Set bits_per_address to 64. (bfd_x64_32_arch): Likewise. * elf64-x86-64.c: Include "libiberty.h". (x86_64_elf_howto_table): Append x32 R_X86_64_32. (elf_x86_64_rtype_to_howto): Support x32 R_X86_64_32. (elf_x86_64_reloc_type_lookup): Likewise. (elf_x86_64_reloc_name_lookup): Likewise. (elf_x86_64_relocate_section): Likewise. (elf_x86_64_check_relocs): Allow R_X86_64_64 relocations for x32. gas/ 2011-08-01 H.J. Lu <hongjiu.lu@intel.com> PR ld/13048 * config/tc-i386.c (handle_quad): Removed. (md_pseudo_table): Remove "quad". (tc_gen_reloc): Don't check BFD_RELOC_64 for disallow_64bit_reloc. (x86_dwarf2_addr_size): New. * config/tc-i386.h (x86_dwarf2_addr_size): New. (DWARF2_ADDR_SIZE): Likewise. gas/testsuite/ 2011-08-01 H.J. Lu <hongjiu.lu@intel.com> PR ld/13048 * gas/i386/ilp32/ilp32.exp: Don't run inval. * gas/i386/ilp32/inval.l: Removed. * gas/i386/ilp32/inval.s: Likewise. * gas/i386/ilp32/quad.d: Expect R_X86_64_64 instead of R_X86_64_32. * gas/i386/ilp32/x86-64-pcrel.s: Add tests for movabs. * gas/i386/ilp32/x86-64-pcrel.d: Updated. ld/testsuite/ 2011-08-01 H.J. Lu <hongjiu.lu@intel.com> PR ld/13048 * ld-x86-64/ilp32-6.d: New. * ld-x86-64/ilp32-6.s: Likewise. * ld-x86-64/ilp32-7.d: Likewise. * ld-x86-64/ilp32-7.s: Likewise. * ld-x86-64/ilp32-8.d: Likewise. * ld-x86-64/ilp32-8.s: Likewise. * ld-x86-64/ilp32-9.d: Likewise. * ld-x86-64/ilp32-9.s: Likewise. * ld-x86-64/x86-64.exp: Run ilp32-6, ilp32-7, ilp32-8 and ilp32-9. opcodes/ 2011-08-01 H.J. Lu <hongjiu.lu@intel.com> PR ld/13048 * i386-dis.c (print_insn): Optimize info->mach check.
152 lines
3.4 KiB
C
152 lines
3.4 KiB
C
/* BFD support for the Intel 386 architecture.
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Copyright 1992, 1994, 1995, 1996, 1998, 2000, 2001, 2002, 2004, 2005,
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2007, 2009, 2010, 2011
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Free Software Foundation, Inc.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "bfd.h"
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#include "libbfd.h"
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static const bfd_arch_info_type *
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bfd_i386_compatible (const bfd_arch_info_type *a,
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const bfd_arch_info_type *b)
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{
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const bfd_arch_info_type *compat = bfd_default_compatible (a, b);
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/* Don't allow mixing x64_32 with x86_64. */
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if (compat
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&& (a->mach & bfd_mach_x64_32) != (b->mach & bfd_mach_x64_32))
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compat = NULL;
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return compat;
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}
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static const bfd_arch_info_type bfd_x64_32_arch_intel_syntax =
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{
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64, /* 64 bits in a word */
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64, /* 64 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_i386,
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bfd_mach_x64_32_intel_syntax,
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"i386:intel",
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"i386:x64-32:intel",
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3,
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FALSE,
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bfd_i386_compatible,
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bfd_default_scan,
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0
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};
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static const bfd_arch_info_type bfd_x86_64_arch_intel_syntax =
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{
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64, /* 64 bits in a word */
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64, /* 64 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_i386,
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bfd_mach_x86_64_intel_syntax,
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"i386:intel",
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"i386:x86-64:intel",
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3,
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FALSE,
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bfd_i386_compatible,
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bfd_default_scan,
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&bfd_x64_32_arch_intel_syntax,
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};
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static const bfd_arch_info_type bfd_i386_arch_intel_syntax =
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{
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32, /* 32 bits in a word */
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32, /* 32 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_i386,
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bfd_mach_i386_i386_intel_syntax,
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"i386:intel",
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"i386:intel",
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3,
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TRUE,
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bfd_i386_compatible,
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bfd_default_scan,
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&bfd_x86_64_arch_intel_syntax
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};
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static const bfd_arch_info_type i8086_arch =
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{
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32, /* 32 bits in a word */
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32, /* 32 bits in an address (well, not really) */
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8, /* 8 bits in a byte */
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bfd_arch_i386,
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bfd_mach_i386_i8086,
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"i8086",
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"i8086",
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3,
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FALSE,
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bfd_i386_compatible,
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bfd_default_scan,
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&bfd_i386_arch_intel_syntax
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};
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static const bfd_arch_info_type bfd_x64_32_arch =
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{
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64, /* 64 bits in a word */
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64, /* 64 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_i386,
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bfd_mach_x64_32,
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"i386",
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"i386:x64-32",
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3,
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FALSE,
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bfd_i386_compatible,
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bfd_default_scan,
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&i8086_arch
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};
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static const bfd_arch_info_type bfd_x86_64_arch =
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{
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64, /* 64 bits in a word */
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64, /* 64 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_i386,
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bfd_mach_x86_64,
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"i386",
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"i386:x86-64",
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3,
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FALSE,
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bfd_i386_compatible,
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bfd_default_scan,
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&bfd_x64_32_arch
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};
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const bfd_arch_info_type bfd_i386_arch =
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{
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32, /* 32 bits in a word */
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32, /* 32 bits in an address */
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8, /* 8 bits in a byte */
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bfd_arch_i386,
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bfd_mach_i386_i386,
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"i386",
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"i386",
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3,
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TRUE,
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bfd_i386_compatible,
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bfd_default_scan,
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&bfd_x86_64_arch
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};
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