binutils-gdb/sim/riscv
Bernd Edlinger d8e753b791 sim: riscv: Fix confusion with c.jal vs. c.addiw
There was apparently a confusion which cpu model uses
compressed JAL and which ADDIW.  Fixed that in execute_c,
case MATCH_C_JAL | MATCH_C_ADDIW.

Fixes 3224e32fb8 ("sim: riscv: Add support for compressed integer instructions")

Approved-By: Andrew Burgess <aburgess@redhat.com>
2024-04-15 11:04:07 +02:00
..
acinclude.m4
ChangeLog-2021
interp.c
local.mk
machs.c
machs.h
model_list.def sim: riscv: Add support for compressed integer instructions 2024-02-13 11:04:04 +00:00
riscv-sim.h
sim-main.c sim: riscv: Fix confusion with c.jal vs. c.addiw 2024-04-15 11:04:07 +02:00
sim-main.h