mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-21 04:42:53 +08:00
1d506c26d9
This commit is the result of the following actions:
- Running gdb/copyright.py to update all of the copyright headers to
include 2024,
- Manually updating a few files the copyright.py script told me to
update, these files had copyright headers embedded within the
file,
- Regenerating gdbsupport/Makefile.in to refresh it's copyright
date,
- Using grep to find other files that still mentioned 2023. If
these files were updated last year from 2022 to 2023 then I've
updated them this year to 2024.
I'm sure I've probably missed some dates. Feel free to fix them up as
you spot them.
355 lines
9.0 KiB
C++
355 lines
9.0 KiB
C++
/* Low level interface to ptrace, for the remote server for GDB.
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Copyright (C) 1995-2024 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "server.h"
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#include "linux-low.h"
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#include "nat/gdb_ptrace.h"
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#include "gdb_proc_service.h"
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/* The stack pointer is offset from the stack frame by a BIAS of 2047
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(0x7ff) for 64-bit code. BIAS is likely to be defined on SPARC
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hosts, so undefine it first. */
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#undef BIAS
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#define BIAS 2047
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#ifdef HAVE_SYS_REG_H
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#include <sys/reg.h>
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#endif
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#define INSN_SIZE 4
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#define SPARC_R_REGS_NUM 32
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#define SPARC_F_REGS_NUM 48
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#define SPARC_CONTROL_REGS_NUM 6
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#define sparc_num_regs \
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(SPARC_R_REGS_NUM + SPARC_F_REGS_NUM + SPARC_CONTROL_REGS_NUM)
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/* Linux target op definitions for the SPARC architecture. */
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class sparc_target : public linux_process_target
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{
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public:
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const regs_info *get_regs_info () override;
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const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override;
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protected:
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void low_arch_setup () override;
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bool low_cannot_fetch_register (int regno) override;
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bool low_cannot_store_register (int regno) override;
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bool low_supports_breakpoints () override;
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CORE_ADDR low_get_pc (regcache *regcache) override;
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/* No low_set_pc is needed. */
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bool low_breakpoint_at (CORE_ADDR pc) override;
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};
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/* The singleton target ops object. */
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static sparc_target the_sparc_target;
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bool
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sparc_target::low_supports_breakpoints ()
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{
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return true;
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}
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CORE_ADDR
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sparc_target::low_get_pc (regcache *regcache)
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{
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return linux_get_pc_64bit (regcache);
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}
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/* Each offset is multiplied by 8, because of the register size.
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These offsets apply to the buffer sent/filled by ptrace.
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Additionally, the array elements order corresponds to the .dat file, and the
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gdb's registers enumeration order. */
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static int sparc_regmap[] = {
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/* These offsets correspond to GET/SETREGSET. */
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-1, 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, /* g0 .. g7 */
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7*8, 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, /* o0 .. o5, sp, o7 */
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-1, -1, -1, -1, -1, -1, -1, -1, /* l0 .. l7 */
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-1, -1, -1, -1, -1, -1, -1, -1, /* i0 .. i5, fp, i7 */
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/* Floating point registers offsets correspond to GET/SETFPREGSET. */
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0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4, /* f0 .. f7 */
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8*4, 9*4, 10*4, 11*4, 12*4, 13*4, 14*4, 15*4, /* f8 .. f15 */
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16*4, 17*4, 18*4, 19*4, 20*4, 21*4, 22*4, 23*4, /* f16 .. f23 */
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24*4, 25*4, 26*4, 27*4, 28*4, 29*4, 30*4, 31*4, /* f24 .. f31 */
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/* F32 offset starts next to f31: 31*4+4 = 16 * 8. */
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16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8, /* f32 .. f46 */
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24*8, 25*8, 26*8, 27*8, 28*8, 29*8, 30*8, 31*8, /* f48 .. f62 */
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17 *8, /* pc */
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18 *8, /* npc */
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16 *8, /* state */
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/* FSR offset also corresponds to GET/SETFPREGSET, ans is placed
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next to f62. */
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32 *8, /* fsr */
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-1, /* fprs */
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/* Y register is 32-bits length, but gdb takes care of that. */
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19 *8, /* y */
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};
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struct regs_range_t
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{
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int regno_start;
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int regno_end;
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};
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static const struct regs_range_t gregs_ranges[] = {
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{ 0, 31 }, /* g0 .. i7 */
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{ 80, 82 }, /* pc .. state */
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{ 84, 85 } /* fprs .. y */
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};
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#define N_GREGS_RANGES (sizeof (gregs_ranges) / sizeof (struct regs_range_t))
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static const struct regs_range_t fpregs_ranges[] = {
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{ 32, 79 }, /* f0 .. f62 */
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{ 83, 83 } /* fsr */
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};
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#define N_FPREGS_RANGES (sizeof (fpregs_ranges) / sizeof (struct regs_range_t))
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/* Defined in auto-generated file reg-sparc64.c. */
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void init_registers_sparc64 (void);
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extern const struct target_desc *tdesc_sparc64;
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bool
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sparc_target::low_cannot_store_register (int regno)
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{
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return (regno >= sparc_num_regs || sparc_regmap[regno] == -1);
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}
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bool
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sparc_target::low_cannot_fetch_register (int regno)
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{
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return (regno >= sparc_num_regs || sparc_regmap[regno] == -1);
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}
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static void
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sparc_fill_gregset_to_stack (struct regcache *regcache, const void *buf)
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{
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int i;
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CORE_ADDR addr = 0;
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unsigned char tmp_reg_buf[8];
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const int l0_regno = find_regno (regcache->tdesc, "l0");
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const int i7_regno = l0_regno + 15;
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/* These registers have to be stored in the stack. */
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memcpy (&addr,
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((char *) buf) + sparc_regmap[find_regno (regcache->tdesc, "sp")],
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sizeof (addr));
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addr += BIAS;
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for (i = l0_regno; i <= i7_regno; i++)
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{
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collect_register (regcache, i, tmp_reg_buf);
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the_target->write_memory (addr, tmp_reg_buf, sizeof (tmp_reg_buf));
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addr += sizeof (tmp_reg_buf);
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}
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}
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static void
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sparc_fill_gregset (struct regcache *regcache, void *buf)
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{
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int i;
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int range;
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for (range = 0; range < N_GREGS_RANGES; range++)
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for (i = gregs_ranges[range].regno_start;
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i <= gregs_ranges[range].regno_end; i++)
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if (sparc_regmap[i] != -1)
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collect_register (regcache, i, ((char *) buf) + sparc_regmap[i]);
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sparc_fill_gregset_to_stack (regcache, buf);
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}
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static void
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sparc_fill_fpregset (struct regcache *regcache, void *buf)
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{
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int i;
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int range;
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for (range = 0; range < N_FPREGS_RANGES; range++)
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for (i = fpregs_ranges[range].regno_start;
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i <= fpregs_ranges[range].regno_end; i++)
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collect_register (regcache, i, ((char *) buf) + sparc_regmap[i]);
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}
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static void
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sparc_store_gregset_from_stack (struct regcache *regcache, const void *buf)
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{
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int i;
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CORE_ADDR addr = 0;
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unsigned char tmp_reg_buf[8];
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const int l0_regno = find_regno (regcache->tdesc, "l0");
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const int i7_regno = l0_regno + 15;
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/* These registers have to be obtained from the stack. */
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memcpy (&addr,
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((char *) buf) + sparc_regmap[find_regno (regcache->tdesc, "sp")],
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sizeof (addr));
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addr += BIAS;
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for (i = l0_regno; i <= i7_regno; i++)
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{
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the_target->read_memory (addr, tmp_reg_buf, sizeof (tmp_reg_buf));
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supply_register (regcache, i, tmp_reg_buf);
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addr += sizeof (tmp_reg_buf);
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}
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}
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static void
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sparc_store_gregset (struct regcache *regcache, const void *buf)
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{
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int i;
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char zerobuf[8];
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int range;
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memset (zerobuf, 0, sizeof (zerobuf));
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for (range = 0; range < N_GREGS_RANGES; range++)
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for (i = gregs_ranges[range].regno_start;
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i <= gregs_ranges[range].regno_end; i++)
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if (sparc_regmap[i] != -1)
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supply_register (regcache, i, ((char *) buf) + sparc_regmap[i]);
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else
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supply_register (regcache, i, zerobuf);
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sparc_store_gregset_from_stack (regcache, buf);
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}
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static void
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sparc_store_fpregset (struct regcache *regcache, const void *buf)
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{
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int i;
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int range;
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for (range = 0; range < N_FPREGS_RANGES; range++)
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for (i = fpregs_ranges[range].regno_start;
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i <= fpregs_ranges[range].regno_end;
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i++)
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supply_register (regcache, i, ((char *) buf) + sparc_regmap[i]);
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}
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static const gdb_byte sparc_breakpoint[INSN_SIZE] = {
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0x91, 0xd0, 0x20, 0x01
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};
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#define sparc_breakpoint_len INSN_SIZE
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/* Implementation of target ops method "sw_breakpoint_from_kind". */
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const gdb_byte *
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sparc_target::sw_breakpoint_from_kind (int kind, int *size)
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{
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*size = sparc_breakpoint_len;
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return sparc_breakpoint;
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}
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bool
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sparc_target::low_breakpoint_at (CORE_ADDR where)
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{
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unsigned char insn[INSN_SIZE];
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read_memory (where, (unsigned char *) insn, sizeof (insn));
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if (memcmp (sparc_breakpoint, insn, sizeof (insn)) == 0)
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return true;
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/* If necessary, recognize more trap instructions here. GDB only
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uses TRAP Always. */
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return false;
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}
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void
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sparc_target::low_arch_setup ()
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{
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current_process ()->tdesc = tdesc_sparc64;
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}
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static struct regset_info sparc_regsets[] = {
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{ PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t),
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GENERAL_REGS,
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sparc_fill_gregset, sparc_store_gregset },
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{ PTRACE_GETFPREGS, PTRACE_SETFPREGS, 0, sizeof (fpregset_t),
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FP_REGS,
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sparc_fill_fpregset, sparc_store_fpregset },
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NULL_REGSET
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};
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static struct regsets_info sparc_regsets_info =
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{
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sparc_regsets, /* regsets */
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0, /* num_regsets */
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NULL, /* disabled_regsets */
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};
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static struct usrregs_info sparc_usrregs_info =
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{
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sparc_num_regs,
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/* No regmap needs to be provided since this impl. doesn't use
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USRREGS. */
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NULL
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};
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static struct regs_info myregs_info =
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{
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NULL, /* regset_bitmap */
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&sparc_usrregs_info,
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&sparc_regsets_info
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};
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const regs_info *
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sparc_target::get_regs_info ()
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{
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return &myregs_info;
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}
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/* The linux target ops object. */
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linux_process_target *the_linux_target = &the_sparc_target;
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void
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initialize_low_arch (void)
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{
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/* Initialize the Linux target descriptions. */
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init_registers_sparc64 ();
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initialize_regsets_info (&sparc_regsets_info);
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}
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