binutils-gdb/ld/testsuite/ld-x86-64/load1d.d
H.J. Lu f2e37a5c7f elf: Support DT_RELR in linker tests
Allow eabling and disabling DT_RELR in linker tests.  Disable DT_RELR in
linker tests which don't expect DT_RELR in linker outputs.

binutils/

	* testsuite/lib/binutils-common.exp (run_dump_test): Make
	DT_RELR_LDFLAGS and NO_DT_RELR_LDFLAGS global.

ld/

	* testsuite/config/default.exp (DT_RELR_LDFLAGS): New.
	(DT_RELR_CC_LDFLAGS): Likewise.
	(NO_DT_RELR_LDFLAGS): Likewise.
	(NO_DT_RELR_CC_LDFLAGS): Likewise.
	* testsuite/ld-elf/shared.exp: Pass $NO_DT_RELR_LDFLAGS to
	linker for some tests.
	* testsuite/ld-i386/export-class.exp: Likewise.
	* testsuite/ld-i386/i386.exp: Likewise.
	* testsuite/ld-i386/ibt-plt-2a.d: Pass $NO_DT_RELR_LDFLAGS to
	linker.
	* testsuite/ld-i386/ibt-plt-3a.d: Likewise.
	* testsuite/ld-i386/ibt-plt-3c.d: Likewise.
	* testsuite/ld-i386/pr26869.d: Likewise.
	* testsuite/ld-i386/report-reloc-1.d: Likewise.
	* testsuite/ld-ifunc/ifunc-2-i386-now.d: Likewise.
	* testsuite/ld-ifunc/ifunc-2-local-i386-now.d: Likewise.
	* testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d: Likewise.
	* testsuite/ld-ifunc/ifunc-2-x86-64-now.d: Likewise.
	* testsuite/ld-ifunc/pr17154-x86-64.d: Likewise.
	* testsuite/ld-x86-64/bnd-branch-1-now.d: Likewise.
	* testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise.
	* testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise.
	* testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise.
	* testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise.
	* testsuite/ld-x86-64/bnd-plt-1.d: Likewise.
	* testsuite/ld-x86-64/ibt-plt-2a-x32.d: Likewise.
	* testsuite/ld-x86-64/ibt-plt-2a.d: Likewise.
	* testsuite/ld-x86-64/ibt-plt-3a-x32.d: Likewise.
	* testsuite/ld-x86-64/ibt-plt-3a.d: Likewise.
	* testsuite/ld-x86-64/ilp32-4.d: Likewise.
	* testsuite/ld-x86-64/load1c.d: Likewise.
	* testsuite/ld-x86-64/load1d.d: Likewise.
	* testsuite/ld-x86-64/pr13082-2b.d: Likewise.
	* testsuite/ld-x86-64/pr14207.d: Likewise.
	* testsuite/ld-x86-64/pr18176.d: Likewise.
	* testsuite/ld-x86-64/pr19162.d: Likewise.
	* testsuite/ld-x86-64/pr19636-2d.d: Likewise.
	* testsuite/ld-x86-64/pr19636-2l.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1d.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1f.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1j.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1l.d: Likewise.
	* testsuite/ld-x86-64/report-reloc-1-x32.d: Likewise.
	* testsuite/ld-x86-64/report-reloc-1.d: Likewise.
	* testsuite/ld-x86-64/export-class.exp (x86_64_export_class_test):
	Pass $NO_DT_RELR_LDFLAGS to linker.
	* testsuite/ld-x86-64/x86-64.exp: Pass $NO_DT_RELR_LDFLAGS to
	linker for some tests.
2022-01-12 06:04:51 -08:00

48 lines
3.3 KiB
Makefile

#source: load1.s
#as: --x32
#ld: -shared -melf32_x86_64 --hash-style=sysv -z max-page-size=0x200000 -z noseparate-code $NO_DT_RELR_LDFLAGS
#objdump: -dw
.*: +file format .*
Disassembly of section .text:
0+[a-f0-9]+ <_start>:
[ ]*[a-f0-9]+: 13 05 5a 01 20 00 adc 0x20015a\(%rip\),%eax # 200260 <.*>
[ ]*[a-f0-9]+: 03 1d 54 01 20 00 add 0x200154\(%rip\),%ebx # 200260 <.*>
[ ]*[a-f0-9]+: 23 0d 4e 01 20 00 and 0x20014e\(%rip\),%ecx # 200260 <.*>
[ ]*[a-f0-9]+: 3b 15 48 01 20 00 cmp 0x200148\(%rip\),%edx # 200260 <.*>
[ ]*[a-f0-9]+: 0b 35 42 01 20 00 or 0x200142\(%rip\),%esi # 200260 <.*>
[ ]*[a-f0-9]+: 1b 3d 3c 01 20 00 sbb 0x20013c\(%rip\),%edi # 200260 <.*>
[ ]*[a-f0-9]+: 2b 2d 36 01 20 00 sub 0x200136\(%rip\),%ebp # 200260 <.*>
[ ]*[a-f0-9]+: 44 33 05 2f 01 20 00 xor 0x20012f\(%rip\),%r8d # 200260 <.*>
[ ]*[a-f0-9]+: 44 85 3d 28 01 20 00 test %r15d,0x200128\(%rip\) # 200260 <.*>
[ ]*[a-f0-9]+: 48 13 05 21 01 20 00 adc 0x200121\(%rip\),%rax # 200260 <.*>
[ ]*[a-f0-9]+: 48 03 1d 1a 01 20 00 add 0x20011a\(%rip\),%rbx # 200260 <.*>
[ ]*[a-f0-9]+: 48 23 0d 13 01 20 00 and 0x200113\(%rip\),%rcx # 200260 <.*>
[ ]*[a-f0-9]+: 48 3b 15 0c 01 20 00 cmp 0x20010c\(%rip\),%rdx # 200260 <.*>
[ ]*[a-f0-9]+: 48 0b 3d 05 01 20 00 or 0x200105\(%rip\),%rdi # 200260 <.*>
[ ]*[a-f0-9]+: 48 1b 35 fe 00 20 00 sbb 0x2000fe\(%rip\),%rsi # 200260 <.*>
[ ]*[a-f0-9]+: 48 2b 2d f7 00 20 00 sub 0x2000f7\(%rip\),%rbp # 200260 <.*>
[ ]*[a-f0-9]+: 4c 33 05 f0 00 20 00 xor 0x2000f0\(%rip\),%r8 # 200260 <.*>
[ ]*[a-f0-9]+: 4c 85 3d e9 00 20 00 test %r15,0x2000e9\(%rip\) # 200260 <.*>
[ ]*[a-f0-9]+: 13 05 eb 00 20 00 adc 0x2000eb\(%rip\),%eax # 200268 <.*>
[ ]*[a-f0-9]+: 03 1d e5 00 20 00 add 0x2000e5\(%rip\),%ebx # 200268 <.*>
[ ]*[a-f0-9]+: 23 0d df 00 20 00 and 0x2000df\(%rip\),%ecx # 200268 <.*>
[ ]*[a-f0-9]+: 3b 15 d9 00 20 00 cmp 0x2000d9\(%rip\),%edx # 200268 <.*>
[ ]*[a-f0-9]+: 0b 35 d3 00 20 00 or 0x2000d3\(%rip\),%esi # 200268 <.*>
[ ]*[a-f0-9]+: 1b 3d cd 00 20 00 sbb 0x2000cd\(%rip\),%edi # 200268 <.*>
[ ]*[a-f0-9]+: 2b 2d c7 00 20 00 sub 0x2000c7\(%rip\),%ebp # 200268 <.*>
[ ]*[a-f0-9]+: 44 33 05 c0 00 20 00 xor 0x2000c0\(%rip\),%r8d # 200268 <.*>
[ ]*[a-f0-9]+: 44 85 3d b9 00 20 00 test %r15d,0x2000b9\(%rip\) # 200268 <.*>
[ ]*[a-f0-9]+: 48 13 05 b2 00 20 00 adc 0x2000b2\(%rip\),%rax # 200268 <.*>
[ ]*[a-f0-9]+: 48 03 1d ab 00 20 00 add 0x2000ab\(%rip\),%rbx # 200268 <.*>
[ ]*[a-f0-9]+: 48 23 0d a4 00 20 00 and 0x2000a4\(%rip\),%rcx # 200268 <.*>
[ ]*[a-f0-9]+: 48 3b 15 9d 00 20 00 cmp 0x20009d\(%rip\),%rdx # 200268 <.*>
[ ]*[a-f0-9]+: 48 0b 3d 96 00 20 00 or 0x200096\(%rip\),%rdi # 200268 <.*>
[ ]*[a-f0-9]+: 48 1b 35 8f 00 20 00 sbb 0x20008f\(%rip\),%rsi # 200268 <.*>
[ ]*[a-f0-9]+: 48 2b 2d 88 00 20 00 sub 0x200088\(%rip\),%rbp # 200268 <.*>
[ ]*[a-f0-9]+: 4c 33 05 81 00 20 00 xor 0x200081\(%rip\),%r8 # 200268 <.*>
[ ]*[a-f0-9]+: 4c 85 3d 7a 00 20 00 test %r15,0x20007a\(%rip\) # 200268 <.*>
#pass