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3e888977f1
Regenerating BPF target using the maintainer mode emits:
.../opcodes/bpf-opc.c:57:11: error: conversion from ‘long unsigned int’ to ‘unsigned int’ changes value from ‘18446744073709486335’ to ‘4294902015’ [-Werror=overflow]
57 | 64, 64, 0xffffffffffff00ff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
The use of a narrow size to handle the mask CGEN in instruction format
is causing this error. Additionally eBPF `call' instructions
constructed by expressions using symbols (BPF_PSEUDO_CALL) emits
annotations in `src' field of the instruction, used to identify BPF
target endianness.
cpu/
* bpf.cpu (define-call-insn): Remove `src' field from
instruction mask.
include/
*opcode/cge.h (CGEN_IFMT): Adjust mask bit width.
opcodes/
* bpf-opc.c: Regenerate.
(cherry picked from commit
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.. | ||
bpf.cpu | ||
bpf.opc | ||
ChangeLog | ||
cris.cpu | ||
epiphany.cpu | ||
epiphany.opc | ||
fr30.cpu | ||
fr30.opc | ||
frv.cpu | ||
frv.opc | ||
ip2k.cpu | ||
ip2k.opc | ||
iq10.cpu | ||
iq2000.cpu | ||
iq2000.opc | ||
iq2000m.cpu | ||
lm32.cpu | ||
lm32.opc | ||
m32c.cpu | ||
m32c.opc | ||
m32r.cpu | ||
m32r.opc | ||
mep-avc2.cpu | ||
mep-avc.cpu | ||
mep-c5.cpu | ||
mep-core.cpu | ||
mep-default.cpu | ||
mep-ext-cop.cpu | ||
mep-fmax.cpu | ||
mep-h1.cpu | ||
mep-ivc2.cpu | ||
mep-rhcop.cpu | ||
mep-sample-ucidsp.cpu | ||
mep.cpu | ||
mep.opc | ||
mt.cpu | ||
mt.opc | ||
or1k.cpu | ||
or1k.opc | ||
or1kcommon.cpu | ||
or1korbis.cpu | ||
or1korfpx.cpu | ||
sh64-compact.cpu | ||
sh64-media.cpu | ||
sh.cpu | ||
sh.opc | ||
simplify.inc | ||
xstormy16.cpu | ||
xstormy16.opc |