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1401d2fe67
Mixing MIPS16 and microMIPS code in a single binary isn't usually supported but GAS happily produces such code if requested. However it is not correctly disassembled even if a symbol table is available and function symbols are correctly anotated with the ISA mode. This is because the ELF-header global microMIPS ASE flag takes precedence over MIPS16 function annotation, causing them to be treated as regular MIPS code. Correct the problem by respecting function symbol anotation regardless of the ELF-header flag. binutils/ * testsuite/binutils-all/mips/mixed-mips16-micromips.d: New test. * testsuite/binutils-all/mips/mixed-mips16-micromips.s: New test source. * testsuite/binutils-all/mips/mips.exp: Run the new test. opcodes/ * mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand, replacing references to `micromips_ase' throughout. (_print_insn_mips): Don't use file-level microMIPS annotation to determine the disassembly mode with the symbol table.
31 lines
705 B
Makefile
31 lines
705 B
Makefile
#PROG: objcopy
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#objdump: -drt
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#name: Mixed MIPS16 and microMIPS disassembly
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# Test mixed-mode compressed disassembly.
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.*: +file format .*mips.*
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SYMBOL TABLE:
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#...
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[0-9a-f]+ g +F +\.text 0+00000c 0xf0 foo
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#...
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[0-9a-f]+ g +F +\.text 0+00000c 0x80 bar
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Disassembly of section \.text:
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[0-9a-f]+ <foo>:
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+[0-9a-f]+: b202 lw v0,8 <\.foo\.data>
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+[0-9a-f]+: 9a60 lw v1,0\(v0\)
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+[0-9a-f]+: eb00 jr v1
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+[0-9a-f]+: 653b move t9,v1
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[0-9a-f]+ <\.foo\.data>:
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+[0-9a-f]+: 4040 4040 0000 0000 @@@@\.\.\.\.
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[0-9a-f]+ <bar>:
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+[0-9a-f]+: 41a3 0000 lui v1,0x0
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+[0-9a-f]+: ff23 0000 lw t9,0\(v1\)
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+[0-9a-f]+: 45b9 jrc t9
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+[0-9a-f]+: 0c00 nop
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\.\.\.
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