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https://sourceware.org/git/binutils-gdb.git
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f3aa142b8b
ARMv8.2 adds 16-bit floating point operations as an optional extension to the floating point and Adv.SIMD support. This patch adds FP16 instructions to the group Vector Two Register Misc, making them available when +simd+fp16 is enabled. The instructions added are: FCMGT, FCMGE, FCMEQ, FCMLE, FCMLT, FABS, FNEG, FRINTN, FRINTA, FRINTP, FRINTM, FRINTX, FRINTZ, FRINTI, FCVTNS, FCVTNU, FCVTPS, FCVTPU, FCVTMS, FCVTMU, FCVTZS, FCVTZU, FCVTAS, FCVTAU, SCVTF, UCVTF, FRECPE, FRSQRTE and FSQRT. The general form for these instructions is <OP> <Vd>.<T>, <Vs>.<T> where T is 4h or 8h. gas/testsuite/ 2015-12-14 Matthew Wahab <matthew.wahab@arm.com> * gas/aarch64/advsimd-fp16.d: Update expected output. * gas/aarch64/advsimd-fp16.s: Add tests for vector two register misc. instructions. opcodes/ 2015-12-14 Matthew Wahab <matthew.wahab@arm.com> * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Regenerate. * aarch64-opc-2.c: Regenerate. * aarch64-tbl.h (QL_V2SAMEH): New. (aarch64_opcode_table): Add fp16 versions of frintn, frintm, fcvtns, fcvtms, fcvtas, scvtf, fcmgt, fcmeq, fcmlt, fabs, frintp, frintz, fcvtps, fcvtzs, frecpe, frinta, frintx, fcvtnu, fcvtmu, fcvtau, ucvtf, fcmge, fcmle, fneg, frinti, fcvtpu, fcvtzu, frsqrte and fsqrt to the vector register misc. group. Change-Id: I0267511a7f7ea14247504d29fe4752e84c9af9ad
571 lines
14 KiB
C
571 lines
14 KiB
C
/* This file is automatically generated by aarch64-gen. Do not edit! */
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/* Copyright (C) 2012-2015 Free Software Foundation, Inc.
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Contributed by ARM Ltd.
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING3. If not,
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see <http://www.gnu.org/licenses/>. */
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#include "sysdep.h"
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#include "aarch64-asm.h"
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const aarch64_opcode *
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aarch64_find_real_opcode (const aarch64_opcode *opcode)
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{
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/* Use the index as the key to locate the real opcode. */
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int key = opcode - aarch64_opcode_table;
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int value;
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switch (key)
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{
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case 3: /* ngc */
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case 2: /* sbc */
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value = 2; /* --> sbc. */
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break;
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case 5: /* ngcs */
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case 4: /* sbcs */
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value = 4; /* --> sbcs. */
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break;
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case 8: /* cmn */
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case 7: /* adds */
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value = 7; /* --> adds. */
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break;
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case 11: /* cmp */
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case 10: /* subs */
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value = 10; /* --> subs. */
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break;
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case 13: /* mov */
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case 12: /* add */
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value = 12; /* --> add. */
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break;
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case 15: /* cmn */
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case 14: /* adds */
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value = 14; /* --> adds. */
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break;
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case 18: /* cmp */
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case 17: /* subs */
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value = 17; /* --> subs. */
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break;
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case 21: /* cmn */
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case 20: /* adds */
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value = 20; /* --> adds. */
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break;
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case 23: /* neg */
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case 22: /* sub */
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value = 22; /* --> sub. */
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break;
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case 26: /* negs */
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case 25: /* cmp */
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case 24: /* subs */
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value = 24; /* --> subs. */
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break;
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case 141: /* mov */
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case 140: /* umov */
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value = 140; /* --> umov. */
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break;
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case 143: /* mov */
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case 142: /* ins */
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value = 142; /* --> ins. */
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break;
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case 145: /* mov */
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case 144: /* ins */
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value = 144; /* --> ins. */
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break;
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case 227: /* mvn */
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case 226: /* not */
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value = 226; /* --> not. */
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break;
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case 302: /* mov */
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case 301: /* orr */
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value = 301; /* --> orr. */
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break;
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case 371: /* sxtl */
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case 370: /* sshll */
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value = 370; /* --> sshll. */
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break;
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case 373: /* sxtl2 */
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case 372: /* sshll2 */
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value = 372; /* --> sshll2. */
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break;
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case 393: /* uxtl */
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case 392: /* ushll */
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value = 392; /* --> ushll. */
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break;
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case 395: /* uxtl2 */
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case 394: /* ushll2 */
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value = 394; /* --> ushll2. */
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break;
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case 490: /* mov */
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case 489: /* dup */
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value = 489; /* --> dup. */
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break;
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case 568: /* sxtw */
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case 567: /* sxth */
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case 566: /* sxtb */
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case 569: /* asr */
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case 565: /* sbfx */
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case 564: /* sbfiz */
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case 563: /* sbfm */
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value = 563; /* --> sbfm. */
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break;
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case 572: /* bfc */
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case 573: /* bfxil */
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case 571: /* bfi */
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case 570: /* bfm */
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value = 570; /* --> bfm. */
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break;
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case 578: /* uxth */
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case 577: /* uxtb */
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case 580: /* lsr */
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case 579: /* lsl */
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case 576: /* ubfx */
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case 575: /* ubfiz */
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case 574: /* ubfm */
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value = 574; /* --> ubfm. */
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break;
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case 598: /* cset */
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case 597: /* cinc */
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case 596: /* csinc */
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value = 596; /* --> csinc. */
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break;
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case 601: /* csetm */
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case 600: /* cinv */
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case 599: /* csinv */
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value = 599; /* --> csinv. */
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break;
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case 603: /* cneg */
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case 602: /* csneg */
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value = 602; /* --> csneg. */
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break;
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case 621: /* rev */
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case 622: /* rev64 */
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value = 621; /* --> rev. */
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break;
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case 629: /* lsl */
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case 628: /* lslv */
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value = 628; /* --> lslv. */
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break;
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case 631: /* lsr */
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case 630: /* lsrv */
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value = 630; /* --> lsrv. */
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break;
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case 633: /* asr */
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case 632: /* asrv */
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value = 632; /* --> asrv. */
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break;
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case 635: /* ror */
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case 634: /* rorv */
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value = 634; /* --> rorv. */
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break;
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case 645: /* mul */
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case 644: /* madd */
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value = 644; /* --> madd. */
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break;
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case 647: /* mneg */
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case 646: /* msub */
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value = 646; /* --> msub. */
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break;
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case 649: /* smull */
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case 648: /* smaddl */
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value = 648; /* --> smaddl. */
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break;
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case 651: /* smnegl */
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case 650: /* smsubl */
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value = 650; /* --> smsubl. */
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break;
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case 654: /* umull */
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case 653: /* umaddl */
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value = 653; /* --> umaddl. */
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break;
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case 656: /* umnegl */
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case 655: /* umsubl */
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value = 655; /* --> umsubl. */
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break;
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case 667: /* ror */
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case 666: /* extr */
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value = 666; /* --> extr. */
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break;
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case 874: /* bic */
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case 873: /* and */
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value = 873; /* --> and. */
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break;
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case 876: /* mov */
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case 875: /* orr */
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value = 875; /* --> orr. */
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break;
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case 879: /* tst */
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case 878: /* ands */
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value = 878; /* --> ands. */
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break;
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case 884: /* uxtw */
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case 883: /* mov */
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case 882: /* orr */
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value = 882; /* --> orr. */
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break;
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case 886: /* mvn */
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case 885: /* orn */
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value = 885; /* --> orn. */
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break;
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case 890: /* tst */
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case 889: /* ands */
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value = 889; /* --> ands. */
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break;
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case 1016: /* staddb */
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case 920: /* ldaddb */
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value = 920; /* --> ldaddb. */
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break;
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case 1017: /* staddh */
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case 921: /* ldaddh */
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value = 921; /* --> ldaddh. */
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break;
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case 1018: /* stadd */
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case 922: /* ldadd */
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value = 922; /* --> ldadd. */
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break;
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case 1019: /* staddlb */
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case 924: /* ldaddlb */
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value = 924; /* --> ldaddlb. */
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break;
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case 1020: /* staddlh */
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case 927: /* ldaddlh */
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value = 927; /* --> ldaddlh. */
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break;
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case 1021: /* staddl */
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case 930: /* ldaddl */
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value = 930; /* --> ldaddl. */
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break;
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case 1022: /* stclrb */
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case 932: /* ldclrb */
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value = 932; /* --> ldclrb. */
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break;
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case 1023: /* stclrh */
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case 933: /* ldclrh */
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value = 933; /* --> ldclrh. */
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break;
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case 1024: /* stclr */
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case 934: /* ldclr */
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value = 934; /* --> ldclr. */
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break;
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case 1025: /* stclrlb */
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case 936: /* ldclrlb */
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value = 936; /* --> ldclrlb. */
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break;
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case 1026: /* stclrlh */
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case 939: /* ldclrlh */
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value = 939; /* --> ldclrlh. */
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break;
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case 1027: /* stclrl */
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case 942: /* ldclrl */
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value = 942; /* --> ldclrl. */
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break;
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case 1028: /* steorb */
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case 944: /* ldeorb */
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value = 944; /* --> ldeorb. */
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break;
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case 1029: /* steorh */
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case 945: /* ldeorh */
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value = 945; /* --> ldeorh. */
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break;
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case 1030: /* steor */
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case 946: /* ldeor */
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value = 946; /* --> ldeor. */
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break;
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case 1031: /* steorlb */
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case 948: /* ldeorlb */
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value = 948; /* --> ldeorlb. */
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break;
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case 1032: /* steorlh */
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case 951: /* ldeorlh */
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value = 951; /* --> ldeorlh. */
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break;
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case 1033: /* steorl */
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case 954: /* ldeorl */
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value = 954; /* --> ldeorl. */
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break;
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case 1034: /* stsetb */
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case 956: /* ldsetb */
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value = 956; /* --> ldsetb. */
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break;
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case 1035: /* stseth */
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case 957: /* ldseth */
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value = 957; /* --> ldseth. */
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break;
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case 1036: /* stset */
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case 958: /* ldset */
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value = 958; /* --> ldset. */
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break;
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case 1037: /* stsetlb */
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case 960: /* ldsetlb */
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value = 960; /* --> ldsetlb. */
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break;
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case 1038: /* stsetlh */
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case 963: /* ldsetlh */
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value = 963; /* --> ldsetlh. */
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break;
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case 1039: /* stsetl */
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case 966: /* ldsetl */
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value = 966; /* --> ldsetl. */
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break;
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case 1040: /* stsmaxb */
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case 968: /* ldsmaxb */
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value = 968; /* --> ldsmaxb. */
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break;
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case 1041: /* stsmaxh */
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case 969: /* ldsmaxh */
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value = 969; /* --> ldsmaxh. */
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break;
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case 1042: /* stsmax */
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case 970: /* ldsmax */
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value = 970; /* --> ldsmax. */
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break;
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case 1043: /* stsmaxlb */
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case 972: /* ldsmaxlb */
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value = 972; /* --> ldsmaxlb. */
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break;
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case 1044: /* stsmaxlh */
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case 975: /* ldsmaxlh */
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value = 975; /* --> ldsmaxlh. */
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break;
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case 1045: /* stsmaxl */
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case 978: /* ldsmaxl */
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value = 978; /* --> ldsmaxl. */
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break;
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case 1046: /* stsminb */
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case 980: /* ldsminb */
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value = 980; /* --> ldsminb. */
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break;
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case 1047: /* stsminh */
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case 981: /* ldsminh */
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value = 981; /* --> ldsminh. */
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break;
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case 1048: /* stsmin */
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case 982: /* ldsmin */
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value = 982; /* --> ldsmin. */
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break;
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case 1049: /* stsminlb */
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case 984: /* ldsminlb */
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value = 984; /* --> ldsminlb. */
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break;
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case 1050: /* stsminlh */
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case 987: /* ldsminlh */
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value = 987; /* --> ldsminlh. */
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break;
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case 1051: /* stsminl */
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case 990: /* ldsminl */
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value = 990; /* --> ldsminl. */
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break;
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case 1052: /* stumaxb */
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case 992: /* ldumaxb */
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value = 992; /* --> ldumaxb. */
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break;
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case 1053: /* stumaxh */
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case 993: /* ldumaxh */
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value = 993; /* --> ldumaxh. */
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break;
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case 1054: /* stumax */
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case 994: /* ldumax */
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value = 994; /* --> ldumax. */
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break;
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case 1055: /* stumaxlb */
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case 996: /* ldumaxlb */
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value = 996; /* --> ldumaxlb. */
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break;
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case 1056: /* stumaxlh */
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case 999: /* ldumaxlh */
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value = 999; /* --> ldumaxlh. */
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break;
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case 1057: /* stumaxl */
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case 1002: /* ldumaxl */
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value = 1002; /* --> ldumaxl. */
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break;
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case 1058: /* stuminb */
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case 1004: /* lduminb */
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value = 1004; /* --> lduminb. */
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break;
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case 1059: /* stuminh */
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case 1005: /* lduminh */
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value = 1005; /* --> lduminh. */
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break;
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case 1060: /* stumin */
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case 1006: /* ldumin */
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value = 1006; /* --> ldumin. */
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break;
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case 1061: /* stuminlb */
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case 1008: /* lduminlb */
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value = 1008; /* --> lduminlb. */
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break;
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case 1062: /* stuminlh */
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case 1011: /* lduminlh */
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value = 1011; /* --> lduminlh. */
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break;
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case 1063: /* stuminl */
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case 1014: /* lduminl */
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value = 1014; /* --> lduminl. */
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break;
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case 1065: /* mov */
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case 1064: /* movn */
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value = 1064; /* --> movn. */
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break;
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case 1067: /* mov */
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case 1066: /* movz */
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value = 1066; /* --> movz. */
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break;
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case 1080: /* psb */
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case 1079: /* esb */
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case 1078: /* sevl */
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case 1077: /* sev */
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case 1076: /* wfi */
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case 1075: /* wfe */
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case 1074: /* yield */
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case 1073: /* nop */
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case 1072: /* hint */
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value = 1072; /* --> hint. */
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break;
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case 1089: /* tlbi */
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case 1088: /* ic */
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case 1087: /* dc */
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case 1086: /* at */
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case 1085: /* sys */
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value = 1085; /* --> sys. */
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break;
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default: return NULL;
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}
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return aarch64_opcode_table + value;
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}
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const char*
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aarch64_insert_operand (const aarch64_operand *self,
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const aarch64_opnd_info *info,
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aarch64_insn *code, const aarch64_inst *inst)
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{
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/* Use the index as the key. */
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int key = self - aarch64_operands;
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switch (key)
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{
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case 1:
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case 2:
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case 3:
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case 4:
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case 5:
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case 6:
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case 7:
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case 8:
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case 9:
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case 10:
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case 14:
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case 15:
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case 16:
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case 17:
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case 19:
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case 20:
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case 21:
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case 22:
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case 23:
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case 24:
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case 25:
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case 26:
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case 27:
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case 35:
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case 36:
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return aarch64_ins_regno (self, info, code, inst);
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case 12:
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return aarch64_ins_reg_extended (self, info, code, inst);
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case 13:
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return aarch64_ins_reg_shifted (self, info, code, inst);
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case 18:
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return aarch64_ins_ft (self, info, code, inst);
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case 28:
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case 29:
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case 30:
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return aarch64_ins_reglane (self, info, code, inst);
|
|
case 31:
|
|
return aarch64_ins_reglist (self, info, code, inst);
|
|
case 32:
|
|
return aarch64_ins_ldst_reglist (self, info, code, inst);
|
|
case 33:
|
|
return aarch64_ins_ldst_reglist_r (self, info, code, inst);
|
|
case 34:
|
|
return aarch64_ins_ldst_elemlist (self, info, code, inst);
|
|
case 37:
|
|
case 46:
|
|
case 47:
|
|
case 48:
|
|
case 49:
|
|
case 50:
|
|
case 51:
|
|
case 52:
|
|
case 53:
|
|
case 54:
|
|
case 55:
|
|
case 56:
|
|
case 57:
|
|
case 58:
|
|
case 67:
|
|
case 68:
|
|
case 69:
|
|
case 70:
|
|
return aarch64_ins_imm (self, info, code, inst);
|
|
case 38:
|
|
case 39:
|
|
return aarch64_ins_advsimd_imm_shift (self, info, code, inst);
|
|
case 40:
|
|
case 41:
|
|
case 42:
|
|
return aarch64_ins_advsimd_imm_modified (self, info, code, inst);
|
|
case 59:
|
|
return aarch64_ins_limm (self, info, code, inst);
|
|
case 60:
|
|
return aarch64_ins_aimm (self, info, code, inst);
|
|
case 61:
|
|
return aarch64_ins_imm_half (self, info, code, inst);
|
|
case 62:
|
|
return aarch64_ins_fbits (self, info, code, inst);
|
|
case 64:
|
|
case 65:
|
|
return aarch64_ins_cond (self, info, code, inst);
|
|
case 71:
|
|
case 77:
|
|
return aarch64_ins_addr_simple (self, info, code, inst);
|
|
case 72:
|
|
return aarch64_ins_addr_regoff (self, info, code, inst);
|
|
case 73:
|
|
case 74:
|
|
case 75:
|
|
return aarch64_ins_addr_simm (self, info, code, inst);
|
|
case 76:
|
|
return aarch64_ins_addr_uimm12 (self, info, code, inst);
|
|
case 78:
|
|
return aarch64_ins_simd_addr_post (self, info, code, inst);
|
|
case 79:
|
|
return aarch64_ins_sysreg (self, info, code, inst);
|
|
case 80:
|
|
return aarch64_ins_pstatefield (self, info, code, inst);
|
|
case 81:
|
|
case 82:
|
|
case 83:
|
|
case 84:
|
|
return aarch64_ins_sysins_op (self, info, code, inst);
|
|
case 85:
|
|
case 86:
|
|
return aarch64_ins_barrier (self, info, code, inst);
|
|
case 87:
|
|
return aarch64_ins_prfop (self, info, code, inst);
|
|
case 88:
|
|
return aarch64_ins_hint (self, info, code, inst);
|
|
default: assert (0); abort ();
|
|
}
|
|
}
|