Victor Do Nascimento f0d70d8ee6 aarch64: Add arch support for LSE128 extension ... Enable the `+lse128' feature modifier which, together with new internal feature flags, enables LSE128 instructions, which are represented via the new `_LSE128_INSN' macro. gas/ChangeLog: * config/tc-aarch64.c (aarch64_features): Add new "lse128" entry. include/ChangeLog: * include/opcode/aarch64.h (enum aarch64_feature_bit): New AARCH64_FEATURE_LSE128 feature bit. (enum aarch64_insn_class): New lse128_atomic instruction class. opcodes/ChangeLog: * opcodes/aarch64-tbl.h (aarch64_feature_lse128): New. (LSE128): Likewise. (_LSE128_INSN): Likewise.		2023-11-07 21:54:19 +00:00
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all.texi
as.texi
c-aarch64.texi	aarch64: Add arch support for LSE128 extension	2023-11-07 21:54:19 +00:00
c-alpha.texi
c-arc.texi
c-arm.texi
c-avr.texi
c-bfin.texi
c-bpf.texi
c-cr16.texi
c-cris.texi
c-csky.texi
c-d10v.texi
c-d30v.texi
c-epiphany.texi
c-h8300.texi
c-hppa.texi
c-i386.texi
c-ia64.texi
c-ip2k.texi
c-kvx.texi
c-lm32.texi
c-loongarch.texi
c-m32c.texi
c-m32r.texi
c-m68hc11.texi
c-m68k.texi
c-metag.texi
c-microblaze.texi
c-mips.texi
c-mmix.texi
c-msp430.texi
c-mt.texi
c-nds32.texi
c-nios2.texi
c-ns32k.texi
c-or1k.texi
c-pdp11.texi
c-pj.texi
c-ppc.texi
c-pru.texi
c-riscv.texi	RISC-V: Add support for XCValu extension in CV32E40P	2023-11-07 12:06:32 +08:00
c-rl78.texi
c-rx.texi
c-s12z.texi
c-s390.texi
c-score.texi
c-sh.texi
c-sparc.texi
c-tic6x.texi
c-tic54x.texi
c-tilegx.texi
c-tilepro.texi
c-v850.texi
c-vax.texi
c-visium.texi
c-wasm32.texi
c-xgate.texi
c-xstormy16.texi
c-xtensa.texi
c-z8k.texi
c-z80.texi
fdl.texi
h8.texi
internals.texi
local.mk