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ac7936dfd0
This patches removes get_regcache_arch, and use regache->arch () instead. The motivation of this change is that I am going to move some basic stuff into a base class of regcache. I don't need to update "client" code regcache->arch (). On the other hand, this patch shortens the code a little bit. gdb: 2017-10-25 Yao Qi <yao.qi@linaro.org> * aarch32-linux-nat.c (aarch32_gp_regcache_supply): Use regcache->arch () instead get_regcache_arch. * aarch64-fbsd-nat.c (aarch64_fbsd_fetch_inferior_registers): Likewise. (aarch64_fbsd_store_inferior_registers): Likewise. * aarch64-linux-nat.c (fetch_gregs_from_thread): Likewise. (store_gregs_to_thread): Likewise. (fetch_fpregs_from_thread): Likewise. (store_fpregs_to_thread): Likewise. * aarch64-tdep.c (aarch64_extract_return_value): Likewise. (aarch64_store_return_value): Likewise. (aarch64_software_single_step): Likewise. * aix-thread.c (aix_thread_wait): Likewise. (supply_reg32): Likewise. (supply_sprs64): Likewise. (supply_sprs32): Likewise. (fill_gprs64): Likewise. (fill_gprs32): Likewise. (fill_sprs64): Likewise. (fill_sprs32): Likewise. (store_regs_user_thread): Likewise. (store_regs_kernel_thread): Likewise. * alpha-bsd-nat.c (alphabsd_fetch_inferior_registers): Likewise. (alphabsd_store_inferior_registers): Likewise. * alpha-tdep.c (alpha_extract_return_value): Likewise. (alpha_store_return_value): Likewise. (alpha_deal_with_atomic_sequence): Likewise. (alpha_next_pc): Likewise. (alpha_software_single_step): Likewise. * amd64-bsd-nat.c (amd64bsd_fetch_inferior_registers): Likewise. (amd64bsd_store_inferior_registers): Likewise. * amd64-linux-nat.c (amd64_linux_fetch_inferior_registers): Likewise. (amd64_linux_store_inferior_registers): Likewise. * amd64-nat.c (amd64_supply_native_gregset): Likewise. (amd64_collect_native_gregset): Likewise. * amd64-obsd-tdep.c (amd64obsd_supply_uthread): Likewise. (amd64obsd_collect_uthread): Likewise. * amd64-tdep.c (amd64_supply_fpregset): Likewise. (amd64_collect_fpregset): Likewise. (amd64_supply_fxsave): Likewise. (amd64_supply_xsave): Likewise. (amd64_collect_fxsave): Likewise. (amd64_collect_xsave): Likewise. * arc-tdep.c (arc_write_pc): Likewise. * arch-utils.c (default_skip_permanent_breakpoint): Likewise. * arm-fbsd-nat.c (arm_fbsd_fetch_inferior_registers): Likewise. (arm_fbsd_store_inferior_registers): Likewise. * arm-linux-nat.c (fetch_vfp_regs): Likewise. (store_vfp_regs): Likewise. (arm_linux_fetch_inferior_registers): Likewise. (arm_linux_store_inferior_registers): Likewise. * arm-linux-tdep.c (arm_linux_supply_gregset): Likewise. (arm_linux_sigreturn_next_pc): Likewise. (arm_linux_get_next_pcs_syscall_next_pc): Likewise. * arm-nbsd-nat.c (arm_supply_gregset): Likewise. (fetch_register): Likewise. (store_register): Likewise. * arm-tdep.c (arm_is_thumb): Likewise. (displaced_in_arm_mode): Likewise. (bx_write_pc): Likewise. (arm_get_next_pcs_addr_bits_remove): Likewise. (arm_software_single_step): Likewise. (arm_extract_return_value): Likewise. (arm_store_return_value): Likewise. (arm_write_pc): Likewise. * bfin-tdep.c (bfin_extract_return_value): Likewise. * bsd-uthread.c (bsd_uthread_fetch_registers): Likewise. (bsd_uthread_store_registers): Likewise. * core-regset.c (fetch_core_registers): Likewise. * corelow.c (get_core_registers): Likewise. * cris-tdep.c (cris_store_return_value): Likewise. (cris_extract_return_value): Likewise. (find_step_target): Likewise. (find_step_target): Likewise. (cris_software_single_step): Likewise. * ctf.c (ctf_fetch_registers): Likewise. * darwin-nat.c (cancel_breakpoint): Likewise. * fbsd-tdep.c (fbsd_collect_thread_registers): Likewise. * frv-tdep.c (frv_extract_return_value): Likewise. * ft32-tdep.c (ft32_store_return_value): Likewise. (ft32_extract_return_value): Likewise. * go32-nat.c (fetch_register): Likewise. (go32_fetch_registers): Likewise. (go32_store_registers): Likewise. (store_register): Likewise. * h8300-tdep.c (h8300_extract_return_value): Likewise. (h8300_store_return_value): Likewise. * hppa-linux-nat.c (fetch_register): Likewise. (store_register): Likewise. (hppa_linux_fetch_inferior_registers): Likewise. (hppa_linux_store_inferior_registers): Likewise. * i386-darwin-nat.c (i386_darwin_fetch_inferior_registers): Likewise. (i386_darwin_store_inferior_registers): Likewise. * i386-gnu-nat.c (gnu_fetch_registers): Likewise. (gnu_store_registers): Likewise. * i386-linux-nat.c (fetch_register): Likewise. (store_register): Likewise. (supply_gregset): Likewise. (fill_gregset): Likewise. (i386_linux_fetch_inferior_registers): Likewise. (i386_linux_store_inferior_registers): Likewise. (i386_linux_resume): Likewise. * i386-linux-tdep.c (i386_linux_get_syscall_number_from_regcache): Likewise. * i386-nto-tdep.c (i386nto_supply_gregset): Likewise. * i386-obsd-nat.c (i386obsd_supply_pcb): Likewise. * i386-obsd-tdep.c (i386obsd_supply_uthread): Likewise. (i386obsd_collect_uthread): Likewise. * i386-tdep.c (i386_mmx_regnum_to_fp_regnum): Likewise. (i386_supply_gregset): Likewise. (i386_collect_gregset): Likewise. (i386_supply_fpregset): Likewise. (i386_collect_fpregset): Likewise. (i386_mpx_bd_base): Likewise. * i386-v4-nat.c (supply_fpregset): Likewise. (fill_fpregset): Likewise. * i387-tdep.c (i387_supply_fsave): Likewise. (i387_collect_fsave): Likewise. (i387_supply_fxsave): Likewise. (i387_collect_fxsave): Likewise. (i387_supply_xsave): Likewise. (i387_collect_xsave): Likewise. * ia64-linux-nat.c (ia64_linux_fetch_registers): Likewise. (ia64_linux_store_registers): Likewise. * ia64-tdep.c (ia64_access_rse_reg): Likewise. (ia64_extract_return_value): Likewise. (ia64_store_return_value): Likewise. (find_func_descr): Likewise. * inf-child.c (inf_child_fetch_inferior_registers): Likewise. * inf-ptrace.c (inf_ptrace_fetch_registers): Likewise. (inf_ptrace_store_registers): Likewise. * infrun.c (use_displaced_stepping): Likewise. (displaced_step_prepare_throw): Likewise. (resume): Likewise. (proceed): Likewise. (do_target_wait): Likewise. (adjust_pc_after_break): Likewise. (handle_inferior_event_1): Likewise. (handle_signal_stop): Likewise. (save_infcall_suspend_state): Likewise. (restore_infcall_suspend_state): Likewise. * iq2000-tdep.c (iq2000_extract_return_value): Likewise. * jit.c (jit_frame_prev_register): Likewise. * linux-nat.c (save_stop_reason): Likewise. (linux_nat_wait_1): Likewise. (resume_stopped_resumed_lwps): Likewise. * linux-record.c (record_linux_sockaddr): Likewise. (record_linux_msghdr): Likewise. (record_linux_system_call): Likewise. * linux-tdep.c (linux_collect_thread_registers): Likewise. * lm32-tdep.c (lm32_extract_return_value): Likewise. (lm32_store_return_value): Likewise. * m32c-tdep.c (m32c_read_flg): Likewise. (m32c_pseudo_register_read): Likewise. (m32c_pseudo_register_write): Likewise. * m32r-linux-tdep.c (m32r_linux_supply_gregset): Likewise. (m32r_linux_collect_gregset): Likewise. * m32r-tdep.c (m32r_store_return_value): Likewise. (m32r_extract_return_value): Likewise. * m68k-bsd-nat.c (m68kbsd_supply_fpregset): Likewise. (m68kbsd_collect_fpregset): Likewise. * m68k-bsd-tdep.c (m68kbsd_supply_fpregset): Likewise. * m68k-linux-nat.c (fetch_register): Likewise. (old_fetch_inferior_registers): Likewise. (old_store_inferior_registers): Likewise. (store_regs): Likewise. * m68k-tdep.c (m68k_svr4_extract_return_value): Likewise. (m68k_svr4_store_return_value): Likewise. * m88k-tdep.c (m88k_store_arguments): Likewise. * mi/mi-main.c (mi_cmd_data_list_changed_registers): Likewise. (mi_cmd_data_write_register_values): Likewise. * mips-fbsd-nat.c (mips_fbsd_fetch_inferior_registers): Likewise. (mips_fbsd_store_inferior_registers): Likewise. * mips-fbsd-tdep.c (mips_fbsd_supply_fpregs): Likewise. (mips_fbsd_supply_gregs): Likewise. (mips_fbsd_collect_fpregs): Likewise. (mips_fbsd_collect_gregs): Likewise. (mips_fbsd_supply_fpregset): Likewise. (mips_fbsd_collect_fpregset): Likewise. (mips_fbsd_supply_gregset): Likewise. (mips_fbsd_collect_gregset): Likewise. * mips-linux-nat.c (supply_gregset): Likewise. (fill_gregset): Likewise. (supply_fpregset): Likewise. (fill_fpregset): Likewise. * mips-linux-tdep.c (mips_supply_gregset): Likewise. (mips_fill_gregset): Likewise. (mips_supply_fpregset): Likewise. (mips_fill_fpregset): Likewise. (mips64_supply_gregset): Likewise. (micromips_linux_sigframe_validate): Likewise. * mips-nbsd-nat.c (mipsnbsd_fetch_inferior_registers): Likewise. (mipsnbsd_fetch_inferior_registers): Likewise. (mipsnbsd_store_inferior_registers): Likewise. * mips-nbsd-tdep.c (mipsnbsd_supply_fpregset): Likewise. (mipsnbsd_supply_gregset): Likewise. (mipsnbsd_iterate_over_regset_sections): Likewise. (mipsnbsd_supply_reg): Likewise. (mipsnbsd_supply_fpreg): Likewise. * mips-tdep.c (mips_in_frame_stub): Likewise. (mips_dummy_id): Likewise. (is_octeon_bbit_op): Likewise. (micromips_bc1_pc): Likewise. (extended_mips16_next_pc): Likewise. (mips16_next_pc): Likewise. (deal_with_atomic_sequence): Likewise. * moxie-tdep.c (moxie_process_readu): Likewise. * nios2-tdep.c (nios2_get_next_pc): Likewise. * nto-procfs.c (procfs_store_registers): Likewise. * ppc-fbsd-nat.c (ppcfbsd_fetch_inferior_registers): Likewise. (ppcfbsd_store_inferior_registers): Likewise. * ppc-linux-nat.c (fetch_vsx_register): Likewise. (fetch_altivec_register): Likewise. (get_spe_registers): Likewise. (fetch_spe_register): Likewise. (fetch_altivec_registers): Likewise. (fetch_all_gp_regs): Likewise. (fetch_all_fp_regs): Likewise. (store_vsx_register): Likewise. (store_altivec_register): Likewise. (set_spe_registers): Likewise. (store_spe_register): Likewise. (store_altivec_registers): Likewise. (store_all_gp_regs): Likewise. (store_all_fp_regs): Likewise. * ppc-linux-tdep.c (ppc_linux_supply_gregset): Likewise. (ppc_linux_collect_gregset): Likewise. (ppc_canonicalize_syscall): Likewise. (ppc_linux_record_signal): Likewise. (ppu2spu_prev_register): Likewise. * ppc-nbsd-nat.c (ppcnbsd_supply_pcb): Likewise. * ppc-obsd-nat.c (ppcobsd_fetch_registers): Likewise. (ppcobsd_store_registers): Likewise. * ppc-ravenscar-thread.c (ppc_ravenscar_generic_fetch_registers): Likewise. (ppc_ravenscar_generic_store_registers): Likewise. * procfs.c (procfs_fetch_registers): Likewise. (procfs_store_registers): Likewise. * ravenscar-thread.c (ravenscar_fetch_registers): Likewise. (ravenscar_store_registers): Likewise. (ravenscar_prepare_to_store): Likewise. * record-btrace.c (record_btrace_fetch_registers): Likewise. * record-full.c (record_full_wait_1): Likewise. (record_full_registers_change): Likewise. (record_full_store_registers): Likewise. (record_full_core_fetch_registers): Likewise. (record_full_save): Likewise. (record_full_goto_insn): Likewise. * regcache.c (regcache_register_size): Likewise. (get_regcache_arch): Remove. (regcache_read_pc): Likewise. * regcache.h (get_regcache_arch): Remove. * remote-sim.c (gdbsim_fetch_register): Likewise. (gdbsim_store_register): Likewise. * remote.c (fetch_register_using_p): Likewise. (send_g_packet): Likewise. (remote_prepare_to_store): Likewise. (store_registers_using_G): Likewise. * reverse.c (save_bookmark_command): Likewise. (goto_bookmark_command): Likewise. * rs6000-aix-tdep.c (branch_dest): Likewise. * rs6000-nat.c (rs6000_ptrace64): Likewise. (fetch_register): Likewise. * rs6000-tdep.c (ppc_supply_reg): Likewise. (ppc_collect_reg): Likewise. (ppc_collect_gregset): Likewise. (ppc_collect_fpregset): Likewise. (ppc_collect_vsxregset): Likewise. (ppc_collect_vrregset): Likewise. (ppc_displaced_step_hw_singlestep): Likewise. (rs6000_pseudo_register_read): Likewise. (rs6000_pseudo_register_write): Likewise. * s390-linux-nat.c (supply_gregset): Likewise. (fill_gregset): Likewise. (s390_linux_fetch_inferior_registers): Likewise. * s390-linux-tdep.c (s390_write_pc): Likewise. (s390_software_single_step): Likewise. (s390_all_but_pc_registers_record): Likewise. (s390_linux_syscall_record): Likewise. * sentinel-frame.c (sentinel_frame_prev_arch): Likewise. * sh-nbsd-nat.c (shnbsd_fetch_inferior_registers): Likewise. (shnbsd_store_inferior_registers): Likewise. * sh-tdep.c (sh_extract_return_value_nofpu): Likewise. (sh_extract_return_value_fpu): Likewise. (sh_store_return_value_nofpu): Likewise. (sh_corefile_supply_regset): Likewise. (sh_corefile_collect_regset): Likewise. * sh64-tdep.c (sh64_extract_return_value): Likewise. (sh64_store_return_value): Likewise. * sparc-linux-tdep.c (sparc32_linux_collect_core_fpregset): Likewise. * sparc-nat.c (sparc_fetch_inferior_registers): Likewise. (sparc_store_inferior_registers): Likewise. * sparc-ravenscar-thread.c (register_in_thread_descriptor_p): Likewise. (sparc_ravenscar_prepare_to_store): Likewise. * sparc-tdep.c (sparc32_store_arguments): Likewise. (sparc_analyze_control_transfer): Likewise. (sparc_step_trap): Likewise. (sparc_software_single_step): Likewise. (sparc32_gdbarch_init): Likewise. (sparc_supply_rwindow): Likewise. (sparc_collect_rwindow): Likewise. * sparc64-linux-tdep.c (sparc64_linux_collect_core_fpregset): Likewise. * sparc64-nbsd-nat.c (sparc64nbsd_supply_gregset): Likewise. (sparc64nbsd_collect_gregset): Likewise. (sparc64nbsd_supply_fpregset): Likewise. (sparc64nbsd_collect_fpregset): Likewise. * sparc64-tdep.c (sparc64_store_arguments): Likewise. (sparc64_supply_gregset): Likewise. (sparc64_collect_gregset): Likewise. (sparc64_supply_fpregset): Likewise. (sparc64_collect_fpregset): Likewise. * spu-linux-nat.c (spu_fetch_inferior_registers): Likewise. * spu-tdep.c (spu_unwind_sp): Likewise. (spu2ppu_prev_register): Likewise. (spu_memory_remove_breakpoint): Likewise. * stack.c (return_command): Likewise. * tic6x-tdep.c (tic6x_extract_signed_field): Likewise. * tracefile-tfile.c (tfile_fetch_registers): Likewise. * tracefile.c (trace_save_ctf): Likewise. * windows-nat.c (do_windows_fetch_inferior_registers): Likewise. (do_windows_store_inferior_registers): Likewise. (windows_resume): Likewise. * xtensa-linux-nat.c (fill_gregset): Likewise. (supply_gregset_reg): Likewise. * xtensa-tdep.c (xtensa_register_write_masked): Likewise. (xtensa_register_read_masked): Likewise. (xtensa_supply_gregset): Likewise. (xtensa_extract_return_value): Likewise. (xtensa_store_return_value): Likewise.
1331 lines
36 KiB
C
1331 lines
36 KiB
C
/* GNU/Linux on ARM native support.
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Copyright (C) 1999-2017 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "inferior.h"
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#include "gdbcore.h"
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#include "regcache.h"
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#include "target.h"
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#include "linux-nat.h"
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#include "target-descriptions.h"
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#include "auxv.h"
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#include "observer.h"
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#include "gdbthread.h"
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#include "arm-tdep.h"
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#include "arm-linux-tdep.h"
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#include "aarch32-linux-nat.h"
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#include <elf/common.h>
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#include <sys/user.h>
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#include "nat/gdb_ptrace.h"
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#include <sys/utsname.h>
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#include <sys/procfs.h>
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#include "nat/linux-ptrace.h"
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/* Prototypes for supply_gregset etc. */
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#include "gregset.h"
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/* Defines ps_err_e, struct ps_prochandle. */
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#include "gdb_proc_service.h"
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#ifndef PTRACE_GET_THREAD_AREA
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#define PTRACE_GET_THREAD_AREA 22
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#endif
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#ifndef PTRACE_GETWMMXREGS
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#define PTRACE_GETWMMXREGS 18
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#define PTRACE_SETWMMXREGS 19
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#endif
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#ifndef PTRACE_GETVFPREGS
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#define PTRACE_GETVFPREGS 27
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#define PTRACE_SETVFPREGS 28
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#endif
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#ifndef PTRACE_GETHBPREGS
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#define PTRACE_GETHBPREGS 29
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#define PTRACE_SETHBPREGS 30
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#endif
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extern int arm_apcs_32;
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/* Get the whole floating point state of the process and store it
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into regcache. */
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static void
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fetch_fpregs (struct regcache *regcache)
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{
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int ret, regno, tid;
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gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
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/* Get the thread id for the ptrace call. */
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tid = ptid_get_lwp (regcache_get_ptid (regcache));
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/* Read the floating point state. */
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if (have_ptrace_getregset == TRIBOOL_TRUE)
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{
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struct iovec iov;
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iov.iov_base = &fp;
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iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
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ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
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}
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else
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ret = ptrace (PT_GETFPREGS, tid, 0, fp);
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if (ret < 0)
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perror_with_name (_("Unable to fetch the floating point registers."));
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/* Fetch fpsr. */
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regcache_raw_supply (regcache, ARM_FPS_REGNUM,
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fp + NWFPE_FPSR_OFFSET);
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/* Fetch the floating point registers. */
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for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
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supply_nwfpe_register (regcache, regno, fp);
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}
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/* Save the whole floating point state of the process using
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the contents from regcache. */
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static void
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store_fpregs (const struct regcache *regcache)
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{
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int ret, regno, tid;
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gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
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/* Get the thread id for the ptrace call. */
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tid = ptid_get_lwp (regcache_get_ptid (regcache));
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/* Read the floating point state. */
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if (have_ptrace_getregset == TRIBOOL_TRUE)
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{
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elf_fpregset_t fpregs;
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struct iovec iov;
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iov.iov_base = &fpregs;
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iov.iov_len = sizeof (fpregs);
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ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
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}
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else
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ret = ptrace (PT_GETFPREGS, tid, 0, fp);
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if (ret < 0)
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perror_with_name (_("Unable to fetch the floating point registers."));
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/* Store fpsr. */
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if (REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
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regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
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/* Store the floating point registers. */
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for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
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if (REG_VALID == regcache_register_status (regcache, regno))
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collect_nwfpe_register (regcache, regno, fp);
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if (have_ptrace_getregset == TRIBOOL_TRUE)
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{
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struct iovec iov;
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iov.iov_base = &fp;
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iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
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ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iov);
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}
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else
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ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
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if (ret < 0)
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perror_with_name (_("Unable to store floating point registers."));
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}
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/* Fetch all general registers of the process and store into
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regcache. */
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static void
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fetch_regs (struct regcache *regcache)
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{
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int ret, regno, tid;
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elf_gregset_t regs;
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/* Get the thread id for the ptrace call. */
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tid = ptid_get_lwp (regcache_get_ptid (regcache));
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if (have_ptrace_getregset == TRIBOOL_TRUE)
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{
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struct iovec iov;
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iov.iov_base = ®s;
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iov.iov_len = sizeof (regs);
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ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
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}
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else
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ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
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if (ret < 0)
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perror_with_name (_("Unable to fetch general registers."));
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aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, arm_apcs_32);
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}
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static void
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store_regs (const struct regcache *regcache)
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{
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int ret, regno, tid;
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elf_gregset_t regs;
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|
|
/* Get the thread id for the ptrace call. */
|
|
tid = ptid_get_lwp (regcache_get_ptid (regcache));
|
|
|
|
/* Fetch the general registers. */
|
|
if (have_ptrace_getregset == TRIBOOL_TRUE)
|
|
{
|
|
struct iovec iov;
|
|
|
|
iov.iov_base = ®s;
|
|
iov.iov_len = sizeof (regs);
|
|
|
|
ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
|
|
}
|
|
else
|
|
ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
|
|
|
|
if (ret < 0)
|
|
perror_with_name (_("Unable to fetch general registers."));
|
|
|
|
aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, arm_apcs_32);
|
|
|
|
if (have_ptrace_getregset == TRIBOOL_TRUE)
|
|
{
|
|
struct iovec iov;
|
|
|
|
iov.iov_base = ®s;
|
|
iov.iov_len = sizeof (regs);
|
|
|
|
ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iov);
|
|
}
|
|
else
|
|
ret = ptrace (PTRACE_SETREGS, tid, 0, ®s);
|
|
|
|
if (ret < 0)
|
|
perror_with_name (_("Unable to store general registers."));
|
|
}
|
|
|
|
/* Fetch all WMMX registers of the process and store into
|
|
regcache. */
|
|
|
|
#define IWMMXT_REGS_SIZE (16 * 8 + 6 * 4)
|
|
|
|
static void
|
|
fetch_wmmx_regs (struct regcache *regcache)
|
|
{
|
|
char regbuf[IWMMXT_REGS_SIZE];
|
|
int ret, regno, tid;
|
|
|
|
/* Get the thread id for the ptrace call. */
|
|
tid = ptid_get_lwp (regcache_get_ptid (regcache));
|
|
|
|
ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
|
|
if (ret < 0)
|
|
perror_with_name (_("Unable to fetch WMMX registers."));
|
|
|
|
for (regno = 0; regno < 16; regno++)
|
|
regcache_raw_supply (regcache, regno + ARM_WR0_REGNUM,
|
|
®buf[regno * 8]);
|
|
|
|
for (regno = 0; regno < 2; regno++)
|
|
regcache_raw_supply (regcache, regno + ARM_WCSSF_REGNUM,
|
|
®buf[16 * 8 + regno * 4]);
|
|
|
|
for (regno = 0; regno < 4; regno++)
|
|
regcache_raw_supply (regcache, regno + ARM_WCGR0_REGNUM,
|
|
®buf[16 * 8 + 2 * 4 + regno * 4]);
|
|
}
|
|
|
|
static void
|
|
store_wmmx_regs (const struct regcache *regcache)
|
|
{
|
|
char regbuf[IWMMXT_REGS_SIZE];
|
|
int ret, regno, tid;
|
|
|
|
/* Get the thread id for the ptrace call. */
|
|
tid = ptid_get_lwp (regcache_get_ptid (regcache));
|
|
|
|
ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
|
|
if (ret < 0)
|
|
perror_with_name (_("Unable to fetch WMMX registers."));
|
|
|
|
for (regno = 0; regno < 16; regno++)
|
|
if (REG_VALID == regcache_register_status (regcache,
|
|
regno + ARM_WR0_REGNUM))
|
|
regcache_raw_collect (regcache, regno + ARM_WR0_REGNUM,
|
|
®buf[regno * 8]);
|
|
|
|
for (regno = 0; regno < 2; regno++)
|
|
if (REG_VALID == regcache_register_status (regcache,
|
|
regno + ARM_WCSSF_REGNUM))
|
|
regcache_raw_collect (regcache, regno + ARM_WCSSF_REGNUM,
|
|
®buf[16 * 8 + regno * 4]);
|
|
|
|
for (regno = 0; regno < 4; regno++)
|
|
if (REG_VALID == regcache_register_status (regcache,
|
|
regno + ARM_WCGR0_REGNUM))
|
|
regcache_raw_collect (regcache, regno + ARM_WCGR0_REGNUM,
|
|
®buf[16 * 8 + 2 * 4 + regno * 4]);
|
|
|
|
ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf);
|
|
|
|
if (ret < 0)
|
|
perror_with_name (_("Unable to store WMMX registers."));
|
|
}
|
|
|
|
static void
|
|
fetch_vfp_regs (struct regcache *regcache)
|
|
{
|
|
gdb_byte regbuf[VFP_REGS_SIZE];
|
|
int ret, regno, tid;
|
|
struct gdbarch *gdbarch = regcache->arch ();
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
/* Get the thread id for the ptrace call. */
|
|
tid = ptid_get_lwp (regcache_get_ptid (regcache));
|
|
|
|
if (have_ptrace_getregset == TRIBOOL_TRUE)
|
|
{
|
|
struct iovec iov;
|
|
|
|
iov.iov_base = regbuf;
|
|
iov.iov_len = VFP_REGS_SIZE;
|
|
ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
|
|
}
|
|
else
|
|
ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
|
|
|
|
if (ret < 0)
|
|
perror_with_name (_("Unable to fetch VFP registers."));
|
|
|
|
aarch32_vfp_regcache_supply (regcache, regbuf,
|
|
tdep->vfp_register_count);
|
|
}
|
|
|
|
static void
|
|
store_vfp_regs (const struct regcache *regcache)
|
|
{
|
|
gdb_byte regbuf[VFP_REGS_SIZE];
|
|
int ret, regno, tid;
|
|
struct gdbarch *gdbarch = regcache->arch ();
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
/* Get the thread id for the ptrace call. */
|
|
tid = ptid_get_lwp (regcache_get_ptid (regcache));
|
|
|
|
if (have_ptrace_getregset == TRIBOOL_TRUE)
|
|
{
|
|
struct iovec iov;
|
|
|
|
iov.iov_base = regbuf;
|
|
iov.iov_len = VFP_REGS_SIZE;
|
|
ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
|
|
}
|
|
else
|
|
ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
|
|
|
|
if (ret < 0)
|
|
perror_with_name (_("Unable to fetch VFP registers (for update)."));
|
|
|
|
aarch32_vfp_regcache_collect (regcache, regbuf,
|
|
tdep->vfp_register_count);
|
|
|
|
if (have_ptrace_getregset == TRIBOOL_TRUE)
|
|
{
|
|
struct iovec iov;
|
|
|
|
iov.iov_base = regbuf;
|
|
iov.iov_len = VFP_REGS_SIZE;
|
|
ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iov);
|
|
}
|
|
else
|
|
ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
|
|
|
|
if (ret < 0)
|
|
perror_with_name (_("Unable to store VFP registers."));
|
|
}
|
|
|
|
/* Fetch registers from the child process. Fetch all registers if
|
|
regno == -1, otherwise fetch all general registers or all floating
|
|
point registers depending upon the value of regno. */
|
|
|
|
static void
|
|
arm_linux_fetch_inferior_registers (struct target_ops *ops,
|
|
struct regcache *regcache, int regno)
|
|
{
|
|
struct gdbarch *gdbarch = regcache->arch ();
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
if (-1 == regno)
|
|
{
|
|
fetch_regs (regcache);
|
|
if (tdep->have_wmmx_registers)
|
|
fetch_wmmx_regs (regcache);
|
|
if (tdep->vfp_register_count > 0)
|
|
fetch_vfp_regs (regcache);
|
|
if (tdep->have_fpa_registers)
|
|
fetch_fpregs (regcache);
|
|
}
|
|
else
|
|
{
|
|
if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
|
|
fetch_regs (regcache);
|
|
else if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM)
|
|
fetch_fpregs (regcache);
|
|
else if (tdep->have_wmmx_registers
|
|
&& regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
|
|
fetch_wmmx_regs (regcache);
|
|
else if (tdep->vfp_register_count > 0
|
|
&& regno >= ARM_D0_REGNUM
|
|
&& (regno < ARM_D0_REGNUM + tdep->vfp_register_count
|
|
|| regno == ARM_FPSCR_REGNUM))
|
|
fetch_vfp_regs (regcache);
|
|
}
|
|
}
|
|
|
|
/* Store registers back into the inferior. Store all registers if
|
|
regno == -1, otherwise store all general registers or all floating
|
|
point registers depending upon the value of regno. */
|
|
|
|
static void
|
|
arm_linux_store_inferior_registers (struct target_ops *ops,
|
|
struct regcache *regcache, int regno)
|
|
{
|
|
struct gdbarch *gdbarch = regcache->arch ();
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
if (-1 == regno)
|
|
{
|
|
store_regs (regcache);
|
|
if (tdep->have_wmmx_registers)
|
|
store_wmmx_regs (regcache);
|
|
if (tdep->vfp_register_count > 0)
|
|
store_vfp_regs (regcache);
|
|
if (tdep->have_fpa_registers)
|
|
store_fpregs (regcache);
|
|
}
|
|
else
|
|
{
|
|
if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
|
|
store_regs (regcache);
|
|
else if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM))
|
|
store_fpregs (regcache);
|
|
else if (tdep->have_wmmx_registers
|
|
&& regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
|
|
store_wmmx_regs (regcache);
|
|
else if (tdep->vfp_register_count > 0
|
|
&& regno >= ARM_D0_REGNUM
|
|
&& (regno < ARM_D0_REGNUM + tdep->vfp_register_count
|
|
|| regno == ARM_FPSCR_REGNUM))
|
|
store_vfp_regs (regcache);
|
|
}
|
|
}
|
|
|
|
/* Wrapper functions for the standard regset handling, used by
|
|
thread debugging. */
|
|
|
|
void
|
|
fill_gregset (const struct regcache *regcache,
|
|
gdb_gregset_t *gregsetp, int regno)
|
|
{
|
|
arm_linux_collect_gregset (NULL, regcache, regno, gregsetp, 0);
|
|
}
|
|
|
|
void
|
|
supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
|
|
{
|
|
arm_linux_supply_gregset (NULL, regcache, -1, gregsetp, 0);
|
|
}
|
|
|
|
void
|
|
fill_fpregset (const struct regcache *regcache,
|
|
gdb_fpregset_t *fpregsetp, int regno)
|
|
{
|
|
arm_linux_collect_nwfpe (NULL, regcache, regno, fpregsetp, 0);
|
|
}
|
|
|
|
/* Fill GDB's register array with the floating-point register values
|
|
in *fpregsetp. */
|
|
|
|
void
|
|
supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
|
|
{
|
|
arm_linux_supply_nwfpe (NULL, regcache, -1, fpregsetp, 0);
|
|
}
|
|
|
|
/* Fetch the thread-local storage pointer for libthread_db. */
|
|
|
|
ps_err_e
|
|
ps_get_thread_area (struct ps_prochandle *ph,
|
|
lwpid_t lwpid, int idx, void **base)
|
|
{
|
|
if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
|
|
return PS_ERR;
|
|
|
|
/* IDX is the bias from the thread pointer to the beginning of the
|
|
thread descriptor. It has to be subtracted due to implementation
|
|
quirks in libthread_db. */
|
|
*base = (void *) ((char *)*base - idx);
|
|
|
|
return PS_OK;
|
|
}
|
|
|
|
static const struct target_desc *
|
|
arm_linux_read_description (struct target_ops *ops)
|
|
{
|
|
CORE_ADDR arm_hwcap = 0;
|
|
|
|
if (have_ptrace_getregset == TRIBOOL_UNKNOWN)
|
|
{
|
|
elf_gregset_t gpregs;
|
|
struct iovec iov;
|
|
int tid = ptid_get_lwp (inferior_ptid);
|
|
|
|
iov.iov_base = &gpregs;
|
|
iov.iov_len = sizeof (gpregs);
|
|
|
|
/* Check if PTRACE_GETREGSET works. */
|
|
if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) < 0)
|
|
have_ptrace_getregset = TRIBOOL_FALSE;
|
|
else
|
|
have_ptrace_getregset = TRIBOOL_TRUE;
|
|
}
|
|
|
|
if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1)
|
|
{
|
|
return ops->beneath->to_read_description (ops->beneath);
|
|
}
|
|
|
|
if (arm_hwcap & HWCAP_IWMMXT)
|
|
return tdesc_arm_with_iwmmxt;
|
|
|
|
if (arm_hwcap & HWCAP_VFP)
|
|
{
|
|
int pid;
|
|
char *buf;
|
|
const struct target_desc * result = NULL;
|
|
|
|
/* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support
|
|
Neon with VFPv3-D32. */
|
|
if (arm_hwcap & HWCAP_NEON)
|
|
result = tdesc_arm_with_neon;
|
|
else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
|
|
result = tdesc_arm_with_vfpv3;
|
|
else
|
|
result = tdesc_arm_with_vfpv2;
|
|
|
|
/* Now make sure that the kernel supports reading these
|
|
registers. Support was added in 2.6.30. */
|
|
pid = ptid_get_lwp (inferior_ptid);
|
|
errno = 0;
|
|
buf = (char *) alloca (VFP_REGS_SIZE);
|
|
if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
|
|
&& errno == EIO)
|
|
result = NULL;
|
|
|
|
return result;
|
|
}
|
|
|
|
return ops->beneath->to_read_description (ops->beneath);
|
|
}
|
|
|
|
/* Information describing the hardware breakpoint capabilities. */
|
|
struct arm_linux_hwbp_cap
|
|
{
|
|
gdb_byte arch;
|
|
gdb_byte max_wp_length;
|
|
gdb_byte wp_count;
|
|
gdb_byte bp_count;
|
|
};
|
|
|
|
/* Since we cannot dynamically allocate subfields of arm_linux_process_info,
|
|
assume a maximum number of supported break-/watchpoints. */
|
|
#define MAX_BPTS 16
|
|
#define MAX_WPTS 16
|
|
|
|
/* Get hold of the Hardware Breakpoint information for the target we are
|
|
attached to. Returns NULL if the kernel doesn't support Hardware
|
|
breakpoints at all, or a pointer to the information structure. */
|
|
static const struct arm_linux_hwbp_cap *
|
|
arm_linux_get_hwbp_cap (void)
|
|
{
|
|
/* The info structure we return. */
|
|
static struct arm_linux_hwbp_cap info;
|
|
|
|
/* Is INFO in a good state? -1 means that no attempt has been made to
|
|
initialize INFO; 0 means an attempt has been made, but it failed; 1
|
|
means INFO is in an initialized state. */
|
|
static int available = -1;
|
|
|
|
if (available == -1)
|
|
{
|
|
int tid;
|
|
unsigned int val;
|
|
|
|
tid = ptid_get_lwp (inferior_ptid);
|
|
if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
|
|
available = 0;
|
|
else
|
|
{
|
|
info.arch = (gdb_byte)((val >> 24) & 0xff);
|
|
info.max_wp_length = (gdb_byte)((val >> 16) & 0xff);
|
|
info.wp_count = (gdb_byte)((val >> 8) & 0xff);
|
|
info.bp_count = (gdb_byte)(val & 0xff);
|
|
|
|
if (info.wp_count > MAX_WPTS)
|
|
{
|
|
warning (_("arm-linux-gdb supports %d hardware watchpoints but target \
|
|
supports %d"), MAX_WPTS, info.wp_count);
|
|
info.wp_count = MAX_WPTS;
|
|
}
|
|
|
|
if (info.bp_count > MAX_BPTS)
|
|
{
|
|
warning (_("arm-linux-gdb supports %d hardware breakpoints but target \
|
|
supports %d"), MAX_BPTS, info.bp_count);
|
|
info.bp_count = MAX_BPTS;
|
|
}
|
|
available = (info.arch != 0);
|
|
}
|
|
}
|
|
|
|
return available == 1 ? &info : NULL;
|
|
}
|
|
|
|
/* How many hardware breakpoints are available? */
|
|
static int
|
|
arm_linux_get_hw_breakpoint_count (void)
|
|
{
|
|
const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
|
|
return cap != NULL ? cap->bp_count : 0;
|
|
}
|
|
|
|
/* How many hardware watchpoints are available? */
|
|
static int
|
|
arm_linux_get_hw_watchpoint_count (void)
|
|
{
|
|
const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
|
|
return cap != NULL ? cap->wp_count : 0;
|
|
}
|
|
|
|
/* Have we got a free break-/watch-point available for use? Returns -1 if
|
|
there is not an appropriate resource available, otherwise returns 1. */
|
|
static int
|
|
arm_linux_can_use_hw_breakpoint (struct target_ops *self,
|
|
enum bptype type,
|
|
int cnt, int ot)
|
|
{
|
|
if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
|
|
|| type == bp_access_watchpoint || type == bp_watchpoint)
|
|
{
|
|
int count = arm_linux_get_hw_watchpoint_count ();
|
|
|
|
if (count == 0)
|
|
return 0;
|
|
else if (cnt + ot > count)
|
|
return -1;
|
|
}
|
|
else if (type == bp_hardware_breakpoint)
|
|
{
|
|
int count = arm_linux_get_hw_breakpoint_count ();
|
|
|
|
if (count == 0)
|
|
return 0;
|
|
else if (cnt > count)
|
|
return -1;
|
|
}
|
|
else
|
|
gdb_assert (FALSE);
|
|
|
|
return 1;
|
|
}
|
|
|
|
/* Enum describing the different types of ARM hardware break-/watch-points. */
|
|
typedef enum
|
|
{
|
|
arm_hwbp_break = 0,
|
|
arm_hwbp_load = 1,
|
|
arm_hwbp_store = 2,
|
|
arm_hwbp_access = 3
|
|
} arm_hwbp_type;
|
|
|
|
/* Type describing an ARM Hardware Breakpoint Control register value. */
|
|
typedef unsigned int arm_hwbp_control_t;
|
|
|
|
/* Structure used to keep track of hardware break-/watch-points. */
|
|
struct arm_linux_hw_breakpoint
|
|
{
|
|
/* Address to break on, or being watched. */
|
|
unsigned int address;
|
|
/* Control register for break-/watch- point. */
|
|
arm_hwbp_control_t control;
|
|
};
|
|
|
|
/* Structure containing arrays of per process hardware break-/watchpoints
|
|
for caching address and control information.
|
|
|
|
The Linux ptrace interface to hardware break-/watch-points presents the
|
|
values in a vector centred around 0 (which is used fo generic information).
|
|
Positive indicies refer to breakpoint addresses/control registers, negative
|
|
indices to watchpoint addresses/control registers.
|
|
|
|
The Linux vector is indexed as follows:
|
|
-((i << 1) + 2): Control register for watchpoint i.
|
|
-((i << 1) + 1): Address register for watchpoint i.
|
|
0: Information register.
|
|
((i << 1) + 1): Address register for breakpoint i.
|
|
((i << 1) + 2): Control register for breakpoint i.
|
|
|
|
This structure is used as a per-thread cache of the state stored by the
|
|
kernel, so that we don't need to keep calling into the kernel to find a
|
|
free breakpoint.
|
|
|
|
We treat break-/watch-points with their enable bit clear as being deleted.
|
|
*/
|
|
struct arm_linux_debug_reg_state
|
|
{
|
|
/* Hardware breakpoints for this process. */
|
|
struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
|
|
/* Hardware watchpoints for this process. */
|
|
struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
|
|
};
|
|
|
|
/* Per-process arch-specific data we want to keep. */
|
|
struct arm_linux_process_info
|
|
{
|
|
/* Linked list. */
|
|
struct arm_linux_process_info *next;
|
|
/* The process identifier. */
|
|
pid_t pid;
|
|
/* Hardware break-/watchpoints state information. */
|
|
struct arm_linux_debug_reg_state state;
|
|
|
|
};
|
|
|
|
/* Per-thread arch-specific data we want to keep. */
|
|
struct arch_lwp_info
|
|
{
|
|
/* Non-zero if our copy differs from what's recorded in the thread. */
|
|
char bpts_changed[MAX_BPTS];
|
|
char wpts_changed[MAX_WPTS];
|
|
};
|
|
|
|
static struct arm_linux_process_info *arm_linux_process_list = NULL;
|
|
|
|
/* Find process data for process PID. */
|
|
|
|
static struct arm_linux_process_info *
|
|
arm_linux_find_process_pid (pid_t pid)
|
|
{
|
|
struct arm_linux_process_info *proc;
|
|
|
|
for (proc = arm_linux_process_list; proc; proc = proc->next)
|
|
if (proc->pid == pid)
|
|
return proc;
|
|
|
|
return NULL;
|
|
}
|
|
|
|
/* Add process data for process PID. Returns newly allocated info
|
|
object. */
|
|
|
|
static struct arm_linux_process_info *
|
|
arm_linux_add_process (pid_t pid)
|
|
{
|
|
struct arm_linux_process_info *proc;
|
|
|
|
proc = XCNEW (struct arm_linux_process_info);
|
|
proc->pid = pid;
|
|
|
|
proc->next = arm_linux_process_list;
|
|
arm_linux_process_list = proc;
|
|
|
|
return proc;
|
|
}
|
|
|
|
/* Get data specific info for process PID, creating it if necessary.
|
|
Never returns NULL. */
|
|
|
|
static struct arm_linux_process_info *
|
|
arm_linux_process_info_get (pid_t pid)
|
|
{
|
|
struct arm_linux_process_info *proc;
|
|
|
|
proc = arm_linux_find_process_pid (pid);
|
|
if (proc == NULL)
|
|
proc = arm_linux_add_process (pid);
|
|
|
|
return proc;
|
|
}
|
|
|
|
/* Called whenever GDB is no longer debugging process PID. It deletes
|
|
data structures that keep track of debug register state. */
|
|
|
|
static void
|
|
arm_linux_forget_process (pid_t pid)
|
|
{
|
|
struct arm_linux_process_info *proc, **proc_link;
|
|
|
|
proc = arm_linux_process_list;
|
|
proc_link = &arm_linux_process_list;
|
|
|
|
while (proc != NULL)
|
|
{
|
|
if (proc->pid == pid)
|
|
{
|
|
*proc_link = proc->next;
|
|
|
|
xfree (proc);
|
|
return;
|
|
}
|
|
|
|
proc_link = &proc->next;
|
|
proc = *proc_link;
|
|
}
|
|
}
|
|
|
|
/* Get hardware break-/watchpoint state for process PID. */
|
|
|
|
static struct arm_linux_debug_reg_state *
|
|
arm_linux_get_debug_reg_state (pid_t pid)
|
|
{
|
|
return &arm_linux_process_info_get (pid)->state;
|
|
}
|
|
|
|
/* Initialize an ARM hardware break-/watch-point control register value.
|
|
BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
|
|
type of break-/watch-point; ENABLE indicates whether the point is enabled.
|
|
*/
|
|
static arm_hwbp_control_t
|
|
arm_hwbp_control_initialize (unsigned byte_address_select,
|
|
arm_hwbp_type hwbp_type,
|
|
int enable)
|
|
{
|
|
gdb_assert ((byte_address_select & ~0xffU) == 0);
|
|
gdb_assert (hwbp_type != arm_hwbp_break
|
|
|| ((byte_address_select & 0xfU) != 0));
|
|
|
|
return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
|
|
}
|
|
|
|
/* Does the breakpoint control value CONTROL have the enable bit set? */
|
|
static int
|
|
arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
|
|
{
|
|
return control & 0x1;
|
|
}
|
|
|
|
/* Change a breakpoint control word so that it is in the disabled state. */
|
|
static arm_hwbp_control_t
|
|
arm_hwbp_control_disable (arm_hwbp_control_t control)
|
|
{
|
|
return control & ~0x1;
|
|
}
|
|
|
|
/* Initialise the hardware breakpoint structure P. The breakpoint will be
|
|
enabled, and will point to the placed address of BP_TGT. */
|
|
static void
|
|
arm_linux_hw_breakpoint_initialize (struct gdbarch *gdbarch,
|
|
struct bp_target_info *bp_tgt,
|
|
struct arm_linux_hw_breakpoint *p)
|
|
{
|
|
unsigned mask;
|
|
CORE_ADDR address = bp_tgt->placed_address = bp_tgt->reqstd_address;
|
|
|
|
/* We have to create a mask for the control register which says which bits
|
|
of the word pointed to by address to break on. */
|
|
if (arm_pc_is_thumb (gdbarch, address))
|
|
{
|
|
mask = 0x3;
|
|
address &= ~1;
|
|
}
|
|
else
|
|
{
|
|
mask = 0xf;
|
|
address &= ~3;
|
|
}
|
|
|
|
p->address = (unsigned int) address;
|
|
p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1);
|
|
}
|
|
|
|
/* Get the ARM hardware breakpoint type from the TYPE value we're
|
|
given when asked to set a watchpoint. */
|
|
static arm_hwbp_type
|
|
arm_linux_get_hwbp_type (enum target_hw_bp_type type)
|
|
{
|
|
if (type == hw_read)
|
|
return arm_hwbp_load;
|
|
else if (type == hw_write)
|
|
return arm_hwbp_store;
|
|
else
|
|
return arm_hwbp_access;
|
|
}
|
|
|
|
/* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
|
|
to LEN. The type of watchpoint is given in RW. */
|
|
static void
|
|
arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len,
|
|
enum target_hw_bp_type type,
|
|
struct arm_linux_hw_breakpoint *p)
|
|
{
|
|
const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
|
|
unsigned mask;
|
|
|
|
gdb_assert (cap != NULL);
|
|
gdb_assert (cap->max_wp_length != 0);
|
|
|
|
mask = (1 << len) - 1;
|
|
|
|
p->address = (unsigned int) addr;
|
|
p->control = arm_hwbp_control_initialize (mask,
|
|
arm_linux_get_hwbp_type (type), 1);
|
|
}
|
|
|
|
/* Are two break-/watch-points equal? */
|
|
static int
|
|
arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
|
|
const struct arm_linux_hw_breakpoint *p2)
|
|
{
|
|
return p1->address == p2->address && p1->control == p2->control;
|
|
}
|
|
|
|
/* Callback to mark a watch-/breakpoint to be updated in all threads of
|
|
the current process. */
|
|
|
|
struct update_registers_data
|
|
{
|
|
int watch;
|
|
int index;
|
|
};
|
|
|
|
static int
|
|
update_registers_callback (struct lwp_info *lwp, void *arg)
|
|
{
|
|
struct update_registers_data *data = (struct update_registers_data *) arg;
|
|
|
|
if (lwp->arch_private == NULL)
|
|
lwp->arch_private = XCNEW (struct arch_lwp_info);
|
|
|
|
/* The actual update is done later just before resuming the lwp,
|
|
we just mark that the registers need updating. */
|
|
if (data->watch)
|
|
lwp->arch_private->wpts_changed[data->index] = 1;
|
|
else
|
|
lwp->arch_private->bpts_changed[data->index] = 1;
|
|
|
|
/* If the lwp isn't stopped, force it to momentarily pause, so
|
|
we can update its breakpoint registers. */
|
|
if (!lwp->stopped)
|
|
linux_stop_lwp (lwp);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
|
|
=1) BPT for thread TID. */
|
|
static void
|
|
arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt,
|
|
int watchpoint)
|
|
{
|
|
int pid;
|
|
ptid_t pid_ptid;
|
|
gdb_byte count, i;
|
|
struct arm_linux_hw_breakpoint* bpts;
|
|
struct update_registers_data data;
|
|
|
|
pid = ptid_get_pid (inferior_ptid);
|
|
pid_ptid = pid_to_ptid (pid);
|
|
|
|
if (watchpoint)
|
|
{
|
|
count = arm_linux_get_hw_watchpoint_count ();
|
|
bpts = arm_linux_get_debug_reg_state (pid)->wpts;
|
|
}
|
|
else
|
|
{
|
|
count = arm_linux_get_hw_breakpoint_count ();
|
|
bpts = arm_linux_get_debug_reg_state (pid)->bpts;
|
|
}
|
|
|
|
for (i = 0; i < count; ++i)
|
|
if (!arm_hwbp_control_is_enabled (bpts[i].control))
|
|
{
|
|
data.watch = watchpoint;
|
|
data.index = i;
|
|
bpts[i] = *bpt;
|
|
iterate_over_lwps (pid_ptid, update_registers_callback, &data);
|
|
break;
|
|
}
|
|
|
|
gdb_assert (i != count);
|
|
}
|
|
|
|
/* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint
|
|
(WATCHPOINT = 1) BPT for thread TID. */
|
|
static void
|
|
arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint *bpt,
|
|
int watchpoint)
|
|
{
|
|
int pid;
|
|
gdb_byte count, i;
|
|
ptid_t pid_ptid;
|
|
struct arm_linux_hw_breakpoint* bpts;
|
|
struct update_registers_data data;
|
|
|
|
pid = ptid_get_pid (inferior_ptid);
|
|
pid_ptid = pid_to_ptid (pid);
|
|
|
|
if (watchpoint)
|
|
{
|
|
count = arm_linux_get_hw_watchpoint_count ();
|
|
bpts = arm_linux_get_debug_reg_state (pid)->wpts;
|
|
}
|
|
else
|
|
{
|
|
count = arm_linux_get_hw_breakpoint_count ();
|
|
bpts = arm_linux_get_debug_reg_state (pid)->bpts;
|
|
}
|
|
|
|
for (i = 0; i < count; ++i)
|
|
if (arm_linux_hw_breakpoint_equal (bpt, bpts + i))
|
|
{
|
|
data.watch = watchpoint;
|
|
data.index = i;
|
|
bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
|
|
iterate_over_lwps (pid_ptid, update_registers_callback, &data);
|
|
break;
|
|
}
|
|
|
|
gdb_assert (i != count);
|
|
}
|
|
|
|
/* Insert a Hardware breakpoint. */
|
|
static int
|
|
arm_linux_insert_hw_breakpoint (struct target_ops *self,
|
|
struct gdbarch *gdbarch,
|
|
struct bp_target_info *bp_tgt)
|
|
{
|
|
struct lwp_info *lp;
|
|
struct arm_linux_hw_breakpoint p;
|
|
|
|
if (arm_linux_get_hw_breakpoint_count () == 0)
|
|
return -1;
|
|
|
|
arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
|
|
|
|
arm_linux_insert_hw_breakpoint1 (&p, 0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Remove a hardware breakpoint. */
|
|
static int
|
|
arm_linux_remove_hw_breakpoint (struct target_ops *self,
|
|
struct gdbarch *gdbarch,
|
|
struct bp_target_info *bp_tgt)
|
|
{
|
|
struct lwp_info *lp;
|
|
struct arm_linux_hw_breakpoint p;
|
|
|
|
if (arm_linux_get_hw_breakpoint_count () == 0)
|
|
return -1;
|
|
|
|
arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
|
|
|
|
arm_linux_remove_hw_breakpoint1 (&p, 0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Are we able to use a hardware watchpoint for the LEN bytes starting at
|
|
ADDR? */
|
|
static int
|
|
arm_linux_region_ok_for_hw_watchpoint (struct target_ops *self,
|
|
CORE_ADDR addr, int len)
|
|
{
|
|
const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
|
|
CORE_ADDR max_wp_length, aligned_addr;
|
|
|
|
/* Can not set watchpoints for zero or negative lengths. */
|
|
if (len <= 0)
|
|
return 0;
|
|
|
|
/* Need to be able to use the ptrace interface. */
|
|
if (cap == NULL || cap->wp_count == 0)
|
|
return 0;
|
|
|
|
/* Test that the range [ADDR, ADDR + LEN) fits into the largest address
|
|
range covered by a watchpoint. */
|
|
max_wp_length = (CORE_ADDR)cap->max_wp_length;
|
|
aligned_addr = addr & ~(max_wp_length - 1);
|
|
|
|
if (aligned_addr + max_wp_length < addr + len)
|
|
return 0;
|
|
|
|
/* The current ptrace interface can only handle watchpoints that are a
|
|
power of 2. */
|
|
if ((len & (len - 1)) != 0)
|
|
return 0;
|
|
|
|
/* All tests passed so we must be able to set a watchpoint. */
|
|
return 1;
|
|
}
|
|
|
|
/* Insert a Hardware breakpoint. */
|
|
static int
|
|
arm_linux_insert_watchpoint (struct target_ops *self,
|
|
CORE_ADDR addr, int len,
|
|
enum target_hw_bp_type rw,
|
|
struct expression *cond)
|
|
{
|
|
struct lwp_info *lp;
|
|
struct arm_linux_hw_breakpoint p;
|
|
|
|
if (arm_linux_get_hw_watchpoint_count () == 0)
|
|
return -1;
|
|
|
|
arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
|
|
|
|
arm_linux_insert_hw_breakpoint1 (&p, 1);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Remove a hardware breakpoint. */
|
|
static int
|
|
arm_linux_remove_watchpoint (struct target_ops *self, CORE_ADDR addr,
|
|
int len, enum target_hw_bp_type rw,
|
|
struct expression *cond)
|
|
{
|
|
struct lwp_info *lp;
|
|
struct arm_linux_hw_breakpoint p;
|
|
|
|
if (arm_linux_get_hw_watchpoint_count () == 0)
|
|
return -1;
|
|
|
|
arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
|
|
|
|
arm_linux_remove_hw_breakpoint1 (&p, 1);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* What was the data address the target was stopped on accessing. */
|
|
static int
|
|
arm_linux_stopped_data_address (struct target_ops *target, CORE_ADDR *addr_p)
|
|
{
|
|
siginfo_t siginfo;
|
|
int slot;
|
|
|
|
if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
|
|
return 0;
|
|
|
|
/* This must be a hardware breakpoint. */
|
|
if (siginfo.si_signo != SIGTRAP
|
|
|| (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
|
|
return 0;
|
|
|
|
/* We must be able to set hardware watchpoints. */
|
|
if (arm_linux_get_hw_watchpoint_count () == 0)
|
|
return 0;
|
|
|
|
slot = siginfo.si_errno;
|
|
|
|
/* If we are in a positive slot then we're looking at a breakpoint and not
|
|
a watchpoint. */
|
|
if (slot >= 0)
|
|
return 0;
|
|
|
|
*addr_p = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
|
|
return 1;
|
|
}
|
|
|
|
/* Has the target been stopped by hitting a watchpoint? */
|
|
static int
|
|
arm_linux_stopped_by_watchpoint (struct target_ops *ops)
|
|
{
|
|
CORE_ADDR addr;
|
|
return arm_linux_stopped_data_address (ops, &addr);
|
|
}
|
|
|
|
static int
|
|
arm_linux_watchpoint_addr_within_range (struct target_ops *target,
|
|
CORE_ADDR addr,
|
|
CORE_ADDR start, int length)
|
|
{
|
|
return start <= addr && start + length - 1 >= addr;
|
|
}
|
|
|
|
/* Handle thread creation. We need to copy the breakpoints and watchpoints
|
|
in the parent thread to the child thread. */
|
|
static void
|
|
arm_linux_new_thread (struct lwp_info *lp)
|
|
{
|
|
int i;
|
|
struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
|
|
|
|
/* Mark that all the hardware breakpoint/watchpoint register pairs
|
|
for this thread need to be initialized. */
|
|
|
|
for (i = 0; i < MAX_BPTS; i++)
|
|
{
|
|
info->bpts_changed[i] = 1;
|
|
info->wpts_changed[i] = 1;
|
|
}
|
|
|
|
lp->arch_private = info;
|
|
}
|
|
|
|
/* Function to call when a thread is being deleted. */
|
|
|
|
static void
|
|
arm_linux_delete_thread (struct arch_lwp_info *arch_lwp)
|
|
{
|
|
xfree (arch_lwp);
|
|
}
|
|
|
|
/* Called when resuming a thread.
|
|
The hardware debug registers are updated when there is any change. */
|
|
|
|
static void
|
|
arm_linux_prepare_to_resume (struct lwp_info *lwp)
|
|
{
|
|
int pid, i;
|
|
struct arm_linux_hw_breakpoint *bpts, *wpts;
|
|
struct arch_lwp_info *arm_lwp_info = lwp->arch_private;
|
|
|
|
pid = ptid_get_lwp (lwp->ptid);
|
|
bpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->bpts;
|
|
wpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->wpts;
|
|
|
|
/* NULL means this is the main thread still going through the shell,
|
|
or, no watchpoint has been set yet. In that case, there's
|
|
nothing to do. */
|
|
if (arm_lwp_info == NULL)
|
|
return;
|
|
|
|
for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
|
|
if (arm_lwp_info->bpts_changed[i])
|
|
{
|
|
errno = 0;
|
|
if (arm_hwbp_control_is_enabled (bpts[i].control))
|
|
if (ptrace (PTRACE_SETHBPREGS, pid,
|
|
(PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0)
|
|
perror_with_name (_("Unexpected error setting breakpoint"));
|
|
|
|
if (bpts[i].control != 0)
|
|
if (ptrace (PTRACE_SETHBPREGS, pid,
|
|
(PTRACE_TYPE_ARG3) ((i << 1) + 2), &bpts[i].control) < 0)
|
|
perror_with_name (_("Unexpected error setting breakpoint"));
|
|
|
|
arm_lwp_info->bpts_changed[i] = 0;
|
|
}
|
|
|
|
for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
|
|
if (arm_lwp_info->wpts_changed[i])
|
|
{
|
|
errno = 0;
|
|
if (arm_hwbp_control_is_enabled (wpts[i].control))
|
|
if (ptrace (PTRACE_SETHBPREGS, pid,
|
|
(PTRACE_TYPE_ARG3) -((i << 1) + 1), &wpts[i].address) < 0)
|
|
perror_with_name (_("Unexpected error setting watchpoint"));
|
|
|
|
if (wpts[i].control != 0)
|
|
if (ptrace (PTRACE_SETHBPREGS, pid,
|
|
(PTRACE_TYPE_ARG3) -((i << 1) + 2), &wpts[i].control) < 0)
|
|
perror_with_name (_("Unexpected error setting watchpoint"));
|
|
|
|
arm_lwp_info->wpts_changed[i] = 0;
|
|
}
|
|
}
|
|
|
|
/* linux_nat_new_fork hook. */
|
|
|
|
static void
|
|
arm_linux_new_fork (struct lwp_info *parent, pid_t child_pid)
|
|
{
|
|
pid_t parent_pid;
|
|
struct arm_linux_debug_reg_state *parent_state;
|
|
struct arm_linux_debug_reg_state *child_state;
|
|
|
|
/* NULL means no watchpoint has ever been set in the parent. In
|
|
that case, there's nothing to do. */
|
|
if (parent->arch_private == NULL)
|
|
return;
|
|
|
|
/* GDB core assumes the child inherits the watchpoints/hw
|
|
breakpoints of the parent, and will remove them all from the
|
|
forked off process. Copy the debug registers mirrors into the
|
|
new process so that all breakpoints and watchpoints can be
|
|
removed together. */
|
|
|
|
parent_pid = ptid_get_pid (parent->ptid);
|
|
parent_state = arm_linux_get_debug_reg_state (parent_pid);
|
|
child_state = arm_linux_get_debug_reg_state (child_pid);
|
|
*child_state = *parent_state;
|
|
}
|
|
|
|
void
|
|
_initialize_arm_linux_nat (void)
|
|
{
|
|
struct target_ops *t;
|
|
|
|
/* Fill in the generic GNU/Linux methods. */
|
|
t = linux_target ();
|
|
|
|
/* Add our register access methods. */
|
|
t->to_fetch_registers = arm_linux_fetch_inferior_registers;
|
|
t->to_store_registers = arm_linux_store_inferior_registers;
|
|
|
|
/* Add our hardware breakpoint and watchpoint implementation. */
|
|
t->to_can_use_hw_breakpoint = arm_linux_can_use_hw_breakpoint;
|
|
t->to_insert_hw_breakpoint = arm_linux_insert_hw_breakpoint;
|
|
t->to_remove_hw_breakpoint = arm_linux_remove_hw_breakpoint;
|
|
t->to_region_ok_for_hw_watchpoint = arm_linux_region_ok_for_hw_watchpoint;
|
|
t->to_insert_watchpoint = arm_linux_insert_watchpoint;
|
|
t->to_remove_watchpoint = arm_linux_remove_watchpoint;
|
|
t->to_stopped_by_watchpoint = arm_linux_stopped_by_watchpoint;
|
|
t->to_stopped_data_address = arm_linux_stopped_data_address;
|
|
t->to_watchpoint_addr_within_range = arm_linux_watchpoint_addr_within_range;
|
|
|
|
t->to_read_description = arm_linux_read_description;
|
|
|
|
/* Register the target. */
|
|
linux_nat_add_target (t);
|
|
|
|
/* Handle thread creation and exit. */
|
|
linux_nat_set_new_thread (t, arm_linux_new_thread);
|
|
linux_nat_set_delete_thread (t, arm_linux_delete_thread);
|
|
linux_nat_set_prepare_to_resume (t, arm_linux_prepare_to_resume);
|
|
|
|
/* Handle process creation and exit. */
|
|
linux_nat_set_new_fork (t, arm_linux_new_fork);
|
|
linux_nat_set_forget_process (t, arm_linux_forget_process);
|
|
}
|