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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
177 lines
4.3 KiB
ArmAsm
177 lines
4.3 KiB
ArmAsm
// ALU test program.
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// Test dual 16 bit MAX, MIN, ABS instructions
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# mach: bfin
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.include "testutils.inc"
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start
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R0 = 0;
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ASTAT = R0;
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// MAX
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// first operand is larger, so AN=0
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R0.L = 0x0001;
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R0.H = 0x0002;
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R1.L = 0x0000;
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R1.H = 0x0000;
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R7 = MAX ( R0 , R1 ) (V);
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DBGA ( R7.L , 0x0001 );
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DBGA ( R7.H , 0x0002 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = V; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 );
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// second operand is larger
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R0.L = 0x0000;
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R0.H = 0x0000;
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R1.L = 0x0001;
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R1.H = 0x0022;
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R7 = MAX ( R0 , R1 ) (V);
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DBGA ( R7.L , 0x0001 );
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DBGA ( R7.H , 0x0022 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = V; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 );
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// one operand larger, one smaller.
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R0.L = 0x000a;
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R0.H = 0x0000;
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R1.L = 0x0001;
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R1.H = 0x0022;
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R7 = MAX ( R0 , R1 ) (V);
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DBGA ( R7.L , 0x000a );
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DBGA ( R7.H , 0x0022 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = V; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 );
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R0.L = 0x8001;
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R0.H = 0xffff;
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R1.L = 0x8000;
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R1.H = 0x0022;
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R7 = MAX ( R0 , R1 ) (V);
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DBGA ( R7.L , 0x8001 );
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DBGA ( R7.H , 0x0022 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = V; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 );
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R0.L = 0x8000;
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R0.H = 0xffff;
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R1.L = 0x8000;
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R1.H = 0x0022;
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R7 = MAX ( R0 , R1 ) (V);
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DBGA ( R7.L , 0x8000 );
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DBGA ( R7.H , 0x0022 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = V; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 );
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// MIN
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// second operand is smaller
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R0.L = 0x0001;
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R0.H = 0x0004;
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R1.L = 0x0000;
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R1.H = 0x0000;
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R7 = MIN ( R0 , R1 ) (V);
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DBGA ( R7.L , 0x0000 );
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DBGA ( R7.H , 0x0000 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = V; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 );
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// first operand is smaller
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R0.L = 0xffff;
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R0.H = 0x8001;
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R1.L = 0x0000;
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R1.H = 0x0000;
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R7 = MIN ( R0 , R1 ) (V);
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DBGA ( R7.L , 0xffff );
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DBGA ( R7.H , 0x8001 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = V; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 );
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// one of each
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R0.L = 0xffff;
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R0.H = 0x0034;
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R1.L = 0x0999;
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R1.H = 0x0010;
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R7 = MIN ( R0 , R1 ) (V);
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DBGA ( R7.L , 0xffff );
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DBGA ( R7.H , 0x0010 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = V; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 );
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R0.L = 0xffff;
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R0.H = 0x0010;
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R1.L = 0x0999;
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R1.H = 0x0010;
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R7 = MIN ( R0 , R1 ) (V);
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DBGA ( R7.L , 0xffff );
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DBGA ( R7.H , 0x0010 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = V; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 );
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// ABS
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R0.L = 0x0001;
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R0.H = 0x8001;
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R7 = ABS R0 (V);
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DBGA ( R7.L , 0x0001 );
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DBGA ( R7.H , 0x7fff );
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_DBG ASTAT;
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R6 = ASTAT;
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_DBG R6;
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = V; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = VS; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 );
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R0.L = 0x0001;
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R0.H = 0x8000;
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R7 = ABS R0 (V);
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DBGA ( R7.L , 0x0001 );
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DBGA ( R7.H , 0x7fff );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = V; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = VS; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 );
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R0.L = 0x0000;
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R0.H = 0xffff;
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R7 = ABS R0 (V);
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_DBG R7;
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_DBG ASTAT;
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R6 = ASTAT;
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_DBG R6;
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DBGA ( R7.L , 0x0000 );
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DBGA ( R7.H , 0x0001 );
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CC = VS; R6 = CC; DBGA ( R6.L, 0x1 );
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CC = AZ; R6 = CC; DBGA ( R6.L, 0x1 );
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pass
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