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971f1d27d2
ld/ * testsuite/ld-aarch64/aarch64-elf.exp (aarch64_choose_lp64_emul): New function. (run_dump_test_lp64): New function which pass LP64 mode options to both assembler and linker when building test binary. (aarch64elftests): Remove eh-frame-merge test. (eh-frame-merge-lp64): Restrict eh-frame-merge test to LP64 only. (run_dump_test): Migrate to run_dump_test_lp64 if the test source was written for LP64 only. * testsuite/ld-aarch64/erratum843419.d: Support ILP32 mode. * testsuite/ld-aarch64/farcall-b-defsym.d: Likewise. * testsuite/ld-aarch64/farcall-b-plt.d: Likewise. * testsuite/ld-aarch64/farcall-b.d: Likewise. * testsuite/ld-aarch64/farcall-bl-defsym.d: Likewise. * testsuite/ld-aarch64/farcall-bl-plt.d: Likewise. * testsuite/ld-aarch64/farcall-bl.d: Likewise. * testsuite/ld-aarch64/ifunc-15.d: Likewise. * testsuite/ld-aarch64/ifunc-16.d: Likewise. * testsuite/ld-aarch64/ifunc-5a-local.d: Likewise. * testsuite/ld-aarch64/ifunc-5a.d: Likewise. * testsuite/ld-aarch64/ifunc-5b-local.d: Likewise. * testsuite/ld-aarch64/ifunc-5b.d: Likewise. * testsuite/ld-aarch64/ifunc-5r-local.d: Likewise. * testsuite/ld-aarch64/ifunc-6a.d: Likewise. * testsuite/ld-aarch64/ifunc-6b.d: Likewise. * testsuite/ld-aarch64/ifunc-7a.d: Likewise. * testsuite/ld-aarch64/ifunc-7b.d: Likewise. * testsuite/ld-aarch64/ifunc-8.d: Likewise. * testsuite/ld-aarch64/limit-b.d: Likewise. * testsuite/ld-aarch64/limit-bl.d: Likewise.
39 lines
724 B
Makefile
39 lines
724 B
Makefile
#name: aarch64-farcall-bl-plt
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#source: farcall-bl-plt.s
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#as:
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#ld: -shared
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#objdump: -dr
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#...
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Disassembly of section .plt:
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.* <.plt>:
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.*: a9bf7bf0 stp x16, x30, \[sp, #-16\]!
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.*: .* adrp x16, .* <__foo_veneer\+.*>
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.*: .* ldr [wx]17, \[x16, #.*\]
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.*: .* add [wx]16, [wx]16, #.*
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.*: d61f0220 br x17
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.*: d503201f nop
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.*: d503201f nop
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.*: d503201f nop
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.* <foo@plt>:
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.*: .* adrp x16, .* <__foo_veneer\+.*>
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.*: .* ldr [wx]17, \[x16, #.*\]
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.*: .* add [wx]16, [wx]16, #.*
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.*: d61f0220 br x17
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Disassembly of section .text:
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.* <_start>:
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...
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.*: .* bl .* <__foo_veneer>
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.*: d65f03c0 ret
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.*: .* b .* <__foo_veneer\+.*>
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.* <__foo_veneer>:
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.*: .* adrp x16, 0 <.*>
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.*: .* add x16, x16, #.*
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.*: d61f0200 br x16
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...
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