binutils-gdb/ld/testsuite/ld-aarch64/farcall-bl-plt.d
Jiong Wang 971f1d27d2 [AArch64] Make LD testcases support ILP32 mode
ld/
	* testsuite/ld-aarch64/aarch64-elf.exp (aarch64_choose_lp64_emul): New
	function.
	(run_dump_test_lp64): New function which pass LP64 mode options to both
	assembler and linker when building test binary.
	(aarch64elftests): Remove eh-frame-merge test.
	(eh-frame-merge-lp64): Restrict eh-frame-merge test to LP64 only.
	(run_dump_test): Migrate to run_dump_test_lp64 if the test source was
	written for LP64 only.
	* testsuite/ld-aarch64/erratum843419.d: Support ILP32 mode.
	* testsuite/ld-aarch64/farcall-b-defsym.d: Likewise.
	* testsuite/ld-aarch64/farcall-b-plt.d: Likewise.
	* testsuite/ld-aarch64/farcall-b.d: Likewise.
	* testsuite/ld-aarch64/farcall-bl-defsym.d: Likewise.
	* testsuite/ld-aarch64/farcall-bl-plt.d: Likewise.
	* testsuite/ld-aarch64/farcall-bl.d: Likewise.
	* testsuite/ld-aarch64/ifunc-15.d: Likewise.
	* testsuite/ld-aarch64/ifunc-16.d: Likewise.
	* testsuite/ld-aarch64/ifunc-5a-local.d: Likewise.
	* testsuite/ld-aarch64/ifunc-5a.d: Likewise.
	* testsuite/ld-aarch64/ifunc-5b-local.d: Likewise.
	* testsuite/ld-aarch64/ifunc-5b.d: Likewise.
	* testsuite/ld-aarch64/ifunc-5r-local.d: Likewise.
	* testsuite/ld-aarch64/ifunc-6a.d: Likewise.
	* testsuite/ld-aarch64/ifunc-6b.d: Likewise.
	* testsuite/ld-aarch64/ifunc-7a.d: Likewise.
	* testsuite/ld-aarch64/ifunc-7b.d: Likewise.
	* testsuite/ld-aarch64/ifunc-8.d: Likewise.
	* testsuite/ld-aarch64/limit-b.d: Likewise.
	* testsuite/ld-aarch64/limit-bl.d: Likewise.
2016-12-13 12:50:17 +00:00

39 lines
724 B
Makefile

#name: aarch64-farcall-bl-plt
#source: farcall-bl-plt.s
#as:
#ld: -shared
#objdump: -dr
#...
Disassembly of section .plt:
.* <.plt>:
.*: a9bf7bf0 stp x16, x30, \[sp, #-16\]!
.*: .* adrp x16, .* <__foo_veneer\+.*>
.*: .* ldr [wx]17, \[x16, #.*\]
.*: .* add [wx]16, [wx]16, #.*
.*: d61f0220 br x17
.*: d503201f nop
.*: d503201f nop
.*: d503201f nop
.* <foo@plt>:
.*: .* adrp x16, .* <__foo_veneer\+.*>
.*: .* ldr [wx]17, \[x16, #.*\]
.*: .* add [wx]16, [wx]16, #.*
.*: d61f0220 br x17
Disassembly of section .text:
.* <_start>:
...
.*: .* bl .* <__foo_veneer>
.*: d65f03c0 ret
.*: .* b .* <__foo_veneer\+.*>
.* <__foo_veneer>:
.*: .* adrp x16, 0 <.*>
.*: .* add x16, x16, #.*
.*: d61f0200 br x16
...