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1d506c26d9
This commit is the result of the following actions: - Running gdb/copyright.py to update all of the copyright headers to include 2024, - Manually updating a few files the copyright.py script told me to update, these files had copyright headers embedded within the file, - Regenerating gdbsupport/Makefile.in to refresh it's copyright date, - Using grep to find other files that still mentioned 2023. If these files were updated last year from 2022 to 2023 then I've updated them this year to 2024. I'm sure I've probably missed some dates. Feel free to fix them up as you spot them.
62 lines
1.8 KiB
C
62 lines
1.8 KiB
C
/* Blackfin Universal Asynchronous Receiver/Transmitter (UART) model.
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For "old style" UARTs on BF53x/etc... parts.
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Copyright (C) 2010-2024 Free Software Foundation, Inc.
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Contributed by Analog Devices, Inc.
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This file is part of simulators.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef DV_BFIN_UART_H
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#define DV_BFIN_UART_H
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struct bfin_uart;
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bu16 bfin_uart_get_next_byte (struct hw *, bu16, bu16, bool *fresh);
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bu16 bfin_uart_write_byte (struct hw *, bu16, bu16);
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bu16 bfin_uart_get_status (struct hw *);
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unsigned bfin_uart_write_buffer (struct hw *, const unsigned char *, unsigned);
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unsigned bfin_uart_read_buffer (struct hw *, unsigned char *, unsigned);
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void bfin_uart_reschedule (struct hw *);
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/* UART_LCR */
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#define DLAB (1 << 7)
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/* UART_LSR */
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#define TFI (1 << 7)
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#define TEMT (1 << 6)
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#define THRE (1 << 5)
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#define BI (1 << 4)
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#define FE (1 << 3)
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#define PE (1 << 2)
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#define OE (1 << 1)
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#define DR (1 << 0)
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/* UART_IER */
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#define ERBFI (1 << 0)
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#define ETBEI (1 << 1)
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#define ELSI (1 << 2)
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/* UART_MCR */
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#define XOFF (1 << 0)
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#define MRTS (1 << 1)
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#define RFIT (1 << 2)
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#define RFRT (1 << 3)
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#define LOOP_ENA (1 << 4)
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#define FCPOL (1 << 5)
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#define ARTS (1 << 6)
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#define ACTS (1 << 7)
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#endif
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