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1657026ccd
PowerPC64 takes a more traditional approach to DT_RELR than x86. Count relative relocs in check_relocs, allocate space for them and output in the usual places but not doing so when enable_dt_relr. DT_RELR is sized in the existing ppc stub relaxation machinery, run via the linker's ldemul_after_allocation hook. DT_RELR is output in the same function that writes ppc stubs, run via ldemul_finish. This support should be considered experimental. bfd/ * elf64-ppc.c (struct ppc_local_dyn_relocs): Renamed from ppc_dyn_relocs. Add rel_count field. Update uses. (struct ppc_dyn_relocs): New. Replace all uses of elf_dyn_relocs. (struct ppc_link_hash_table): Add relr_alloc, relr_count and relr_addr. (ppc64_elf_copy_indirect_symbol): Merge rel_count. (ppc64_elf_check_relocs): Init rel_count for global and local syms. (dec_dynrel_count): Change r_info param to reloc pointer. Update all callers. Handle decrementing rel_count. (allocate_got): Don't allocate space for relative relocs when enable_dt_relr. (allocate_dynrelocs): Likewise. (ppc64_elf_size_dynamic_sections): Likewise. Handle srelrdyn. (ppc_build_one_stub): Don't emit relative relocs on .branch_lt. (compare_relr_address, append_relr_off): New functions. (got_and_plt_relr_for_local_syms, got_and_plt_relr): Likewise. (ppc64_elf_size_stubs): Size .relr.syn. (ppc64_elf_build_stubs): Emit .relr.dyn. (build_global_entry_stubs_and_plt): Don't output relative relocs when enable_dt_relr. (write_plt_relocs_for_local_syms): Likewise. (ppc64_elf_relocate_section): Likewise. binutils/ * testsuite/lib/binutils-common.exp (supports_dt_relr): Add powerpc64. ld/ * emulparams/elf64ppc.sh: Source dt-relr.sh. * testsuite/ld-elf/dt-relr-2b.d: Adjust for powerpc. * testsuite/ld-elf/dt-relr-2c.d: Likewise. * testsuite/ld-elf/dt-relr-2d.d: Likewise. * testsuite/ld-elf/dt-relr-2e.d: Likewise.
52 lines
1.6 KiB
Bash
52 lines
1.6 KiB
Bash
source_sh ${srcdir}/emulparams/elf32ppccommon.sh
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source_sh ${srcdir}/emulparams/plt_unwind.sh
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source_sh ${srcdir}/emulparams/dt-relr.sh
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EXTRA_EM_FILE=ppc64elf
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ELFSIZE=64
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OUTPUT_FORMAT="elf64-powerpc"
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TEXT_START_ADDR=0x10000000
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#SEGMENT_SIZE=0x10000000
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ARCH=powerpc:common64
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unset EXECUTABLE_SYMBOLS
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unset SDATA_START_SYMBOLS
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unset SDATA2_START_SYMBOLS
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unset SBSS_START_SYMBOLS
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unset SBSS_END_SYMBOLS
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unset OTHER_END_SYMBOLS
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unset OTHER_RELRO_SECTIONS
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OTHER_TEXT_SECTIONS="*(.sfpr .glink)"
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OTHER_SDATA_SECTIONS="
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.tocbss ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { *(.tocbss)}"
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if test x${RELOCATING+set} = xset; then
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GOT="
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.got : ALIGN(256) { *(.got .toc) }"
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else
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GOT="
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.got 0 : { *(.got) }
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.toc 0 : { *(.toc) }"
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fi
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# Put .opd relocs first so ld.so will process them before any ifunc relocs.
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INITIAL_RELOC_SECTIONS="
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.rela.opd ${RELOCATING-0} : { *(.rela.opd) }"
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OTHER_GOT_RELOC_SECTIONS="
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.rela.toc ${RELOCATING-0} : { *(.rela.toc) }
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.rela.toc1 ${RELOCATING-0} : { *(.rela.toc1) }
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.rela.tocbss ${RELOCATING-0} : { *(.rela.tocbss) }
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.rela.branch_lt ${RELOCATING-0} : { *(.rela.branch_lt) }"
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OTHER_RELRO_SECTIONS_2="
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.opd ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { KEEP (*(.opd)) }
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.toc1 ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { *(.toc1) }
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.branch_lt ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { *(.branch_lt) }"
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INITIAL_READWRITE_SECTIONS="
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.toc ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { *(.toc) }"
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# Put .got before .data
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DATA_GOT=" "
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# Always make .got read-only after relocation
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SEPARATE_GOTPLT=0
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# Also put .sdata before .data
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DATA_SDATA=" "
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# and .plt/.iplt before .data
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DATA_PLT=
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PLT_BEFORE_GOT=" "
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