Jim Wilson bf1554384b Fix ldn/stn multiple instructions. Fix testcases with unaligned data. ... sim/aarch64/ * simulator.c (vec_load): Add M argument. Rewrite to iterate over registers based on structure size. (LD4, LD3, LD2, LD1_2, LD1_3, LD1_4): Pass new arg to vec_load. (LD1_1): Replace with call to vec_load. (vec_store): Add new M argument. Rewrite to iterate over registers based on structure size. (ST4, ST3, ST2, ST1_2, ST1_3, ST1_4): Pass new arg to vec_store. (ST1_1): Replace with call to vec_store. sim/testsuite/sim/aarch64/ * fcvtz.s, fstur.s, ldn_single.s, ldnr.s, mla.s, mls.s, uzp.s: Align data. * sumulh.s: Delete unnecessary data alignment. * stn_single.s: Align data. Fix unaligned ldr insns. Adjust cmp arguments to match change. * ldn_multiple.s, stn_multiple.s: New.		2017-04-22 16:36:01 -07:00
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aarch64	Fix ldn/stn multiple instructions. Fix testcases with unaligned data.	2017-04-22 16:36:01 -07:00
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testsuite	Fix ldn/stn multiple instructions. Fix testcases with unaligned data.	2017-04-22 16:36:01 -07:00
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