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https://sourceware.org/git/binutils-gdb.git
synced 2024-12-21 04:42:53 +08:00
1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
135 lines
3.7 KiB
C
135 lines
3.7 KiB
C
#ifndef __ASSEMBLER__
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typedef unsigned long bu32;
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typedef long bs32;
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typedef unsigned short bu16;
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typedef short bs16;
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typedef unsigned char bu8;
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typedef char bs8;
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#define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0]))
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#define BFIN_MMR_16(mmr) mmr, __pad_##mmr
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#include "test-dma.h"
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#else
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#define __ADSPBF537__ /* XXX: Hack for .S files. */
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#endif
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#ifndef __FDPIC__
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#include <blackfin.h>
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#endif
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/* AZ AN AC0_COPY V_COPY CC AQ RND_MOD AC0 AC1 AV0 AV0S AV1 AV1S V VS */
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#define _AZ (1 << 0)
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#define _AN (1 << 1)
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#define _AC0_COPY (1 << 2)
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#define _V_COPY (1 << 3)
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#define _CC (1 << 5)
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#define _AQ (1 << 6)
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#define _RND_MOD (1 << 8)
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#define _AC0 (1 << 12)
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#define _AC1 (1 << 13)
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#define _AV0 (1 << 16)
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#define _AV0S (1 << 17)
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#define _AV1 (1 << 18)
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#define _AV1S (1 << 19)
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#define _V (1 << 24)
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#define _VS (1 << 25)
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#define _SET 1
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#define _UNSET 0
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#define PASS do { puts ("pass"); _exit (0); } while (0)
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#define FAIL do { puts ("fail"); _exit (1); } while (0)
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#define DBG_PASS do { asm volatile ("outc 'p'; outc 'a'; outc 's'; outc 's'; outc '\n'; hlt;"); } while (1)
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#define DBG_FAIL do { asm volatile ("outc 'f'; outc 'a'; outc 'i'; outc 'l'; outc '\n'; abort;"); } while (1)
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#define HI(x) (((x) >> 16) & 0xffff)
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#define LO(x) ((x) & 0xffff)
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#define INIT_R_REGS(val) init_r_regs val
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#define INIT_P_REGS(val) init_p_regs val
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#define INIT_B_REGS(val) init_b_regs val
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#define INIT_I_REGS(val) init_i_regs val
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#define INIT_L_REGS(val) init_l_regs val
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#define INIT_M_REGS(val) init_m_regs val
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#define include(...)
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#define CHECK_INIT_DEF(...) nop;
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#define CHECK_INIT(...) nop;
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#define CHECKMEM32(...)
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#define GEN_INT_INIT(...) nop;
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#define LD32_LABEL(reg, sym) loadsym reg, sym
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#define LD32(reg, val) imm32 reg, val
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#define CHECKREG(reg, val) CHECKREG reg, val
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#define CHECKREG_SYM_JUMPLESS(reg, sym, scratch_reg) \
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loadsym scratch_reg, sym; \
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cc = reg == scratch_reg; \
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/* Need to avoid jumping for trace buffer. */ \
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if !cc jump fail_lvl;
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#define CHECKREG_SYM(reg, sym, scratch_reg) \
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loadsym scratch_reg, sym; \
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cc = reg == scratch_reg; \
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if cc jump 9f; \
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dbg_fail; \
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9:
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#define WR_MMR(mmr, val, mmr_reg, val_reg) \
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imm32 mmr_reg, mmr; \
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imm32 val_reg, val; \
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[mmr_reg] = val_reg;
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#define WR_MMR_LABEL(mmr, sym, mmr_reg, sym_reg) \
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loadsym sym_reg, sym; \
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imm32 mmr_reg, mmr; \
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[mmr_reg] = sym_reg;
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#define RD_MMR(mmr, mmr_reg, val_reg) \
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imm32 mmr_reg, mmr; \
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val_reg = [mmr_reg];
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/* Legacy CPLB bits */
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#define CPLB_L1_CACHABLE CPLB_L1_CHBL
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#define CPLB_USER_RO CPLB_USER_RD
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#define DATA_ADDR_1 0xff800000
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#define DATA_ADDR_2 0xff900000
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#define DATA_ADDR_3 (DATA_ADDR_1 + 0x2000)
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/* The libgloss headers omit these defines. */
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#define EVT_OVERRIDE 0xFFE02100
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#define EVT_IMASK IMASK
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#define PAGE_SIZE_1K PAGE_SIZE_1KB
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#define PAGE_SIZE_4K PAGE_SIZE_4KB
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#define PAGE_SIZE_1M PAGE_SIZE_1MB
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#define PAGE_SIZE_4M PAGE_SIZE_4MB
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#define CPLB_USER_RW (CPLB_USER_RD | CPLB_USER_WR)
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#define DMC_AB_SRAM 0x0
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#define DMC_AB_CACHE 0xc
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#define DMC_ACACHE_BSRAM 0x8
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#define CPLB_L1SRAM (1 << 5)
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#define CPLB_DA0ACC (1 << 6)
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#define FAULT_CPLB0 (1 << 0)
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#define FAULT_CPLB1 (1 << 1)
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#define FAULT_CPLB2 (1 << 2)
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#define FAULT_CPLB3 (1 << 3)
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#define FAULT_CPLB4 (1 << 4)
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#define FAULT_CPLB5 (1 << 5)
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#define FAULT_CPLB6 (1 << 6)
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#define FAULT_CPLB7 (1 << 7)
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#define FAULT_CPLB8 (1 << 8)
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#define FAULT_CPLB9 (1 << 9)
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#define FAULT_CPLB10 (1 << 10)
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#define FAULT_CPLB11 (1 << 11)
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#define FAULT_CPLB12 (1 << 12)
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#define FAULT_CPLB13 (1 << 13)
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#define FAULT_CPLB14 (1 << 14)
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#define FAULT_CPLB15 (1 << 15)
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#define FAULT_READ (0 << 16)
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#define FAULT_WRITE (1 << 16)
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#define FAULT_USER (0 << 17)
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#define FAULT_SUPV (1 << 17)
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#define FAULT_DAG0 (0 << 18)
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#define FAULT_DAG1 (1 << 18)
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#define FAULT_ILLADDR (1 << 19)
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