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237 lines
7.5 KiB
C
237 lines
7.5 KiB
C
/* Parameters for execution on a Mitsubishi m32r processor.
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Copyright 1996, 1997 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/* Used by mswin. */
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#define TARGET_M32R 1
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/* mvs_check TARGET_BYTE_ORDER BIG_ENDIAN */
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#define TARGET_BYTE_ORDER BIG_ENDIAN
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/* mvs_check REGISTER_NAMES */
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#define REGISTER_NAMES \
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{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
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"r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp", \
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"psw", "cbr", "spi", "spu", "bpc", "pc", "accl", "acch", \
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/* "cond", "sm", "bsm", "ie", "bie", "bcarry", */ \
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}
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/* mvs_check NUM_REGS */
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#define NUM_REGS 24
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/* mvs_check REGISTER_SIZE */
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#define REGISTER_SIZE 4
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/* mvs_check MAX_REGISTER_RAW_SIZE */
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#define MAX_REGISTER_RAW_SIZE 4
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/* mvs_check *_REGNUM */
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#define R0_REGNUM 0
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#define STRUCT_RETURN_REGNUM 0
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#define ARG0_REGNUM 0
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#define ARGLAST_REGNUM 3
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#define V0_REGNUM 0
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#define V1_REGNUM 1
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#define FP_REGNUM 13
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#define RP_REGNUM 14
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#define SP_REGNUM 15
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#define PSW_REGNUM 16
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#define CBR_REGNUM 17
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#define SPI_REGNUM 18
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#define SPU_REGNUM 19
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#define BPC_REGNUM 20
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#define PC_REGNUM 21
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#define ACCL_REGNUM 22
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#define ACCH_REGNUM 23
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/* mvs_check REGISTER_BYTES */
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#define REGISTER_BYTES (NUM_REGS * 4)
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/* mvs_check REGISTER_VIRTUAL_TYPE */
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#define REGISTER_VIRTUAL_TYPE(REG) builtin_type_int
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/* mvs_check REGISTER_BYTE */
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#define REGISTER_BYTE(REG) ((REG) * 4)
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/* mvs_check REGISTER_VIRTUAL_SIZE */
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#define REGISTER_VIRTUAL_SIZE(REG) 4
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/* mvs_check REGISTER_RAW_SIZE */
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#define REGISTER_RAW_SIZE(REG) 4
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/* mvs_check MAX_REGISTER_VIRTUAL_SIZE */
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#define MAX_REGISTER_VIRTUAL_SIZE 4
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/* mvs_check BREAKPOINT */
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#define BREAKPOINT {0x10, 0xf1}
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/* mvs_no_check FUNCTION_START_OFFSET */
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#define FUNCTION_START_OFFSET 0
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/* mvs_check DECR_PC_AFTER_BREAK */
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#define DECR_PC_AFTER_BREAK 0
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/* mvs_check INNER_THAN */
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#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
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/* mvs_check SAVED_PC_AFTER_CALL */
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#define SAVED_PC_AFTER_CALL(fi) read_register (RP_REGNUM)
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#ifdef __STDC__
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struct frame_info;
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struct frame_saved_regs;
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struct type;
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struct value;
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#endif
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/* Define other aspects of the stack frame.
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We keep the offsets of all saved registers, 'cause we need 'em a lot!
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We also keep the current size of the stack frame, and whether
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the frame pointer is valid (for frameless functions, and when we're
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still in the prologue of a function with a frame) */
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/* mvs_check EXTRA_FRAME_INFO */
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#define EXTRA_FRAME_INFO \
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struct frame_saved_regs fsr; \
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int framesize; \
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int using_frame_pointer;
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extern void m32r_init_extra_frame_info PARAMS ((struct frame_info *fi));
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/* mvs_check INIT_EXTRA_FRAME_INFO */
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#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) m32r_init_extra_frame_info (fi)
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/* mvs_no_check INIT_FRAME_PC */
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#define INIT_FRAME_PC /* Not necessary */
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extern void
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m32r_frame_find_saved_regs PARAMS ((struct frame_info *fi,
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struct frame_saved_regs *regaddr));
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/* Put here the code to store, into a struct frame_saved_regs,
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the addresses of the saved registers of frame described by FRAME_INFO.
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This includes special registers such as pc and fp saved in special
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ways in the stack frame. sp is even more special:
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the address we return for it IS the sp for the next frame. */
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/* mvs_check FRAME_FIND_SAVED_REGS */
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#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
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m32r_frame_find_saved_regs(frame_info, &(frame_saved_regs))
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extern CORE_ADDR m32r_frame_chain PARAMS ((struct frame_info *fi));
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/* mvs_check FRAME_CHAIN */
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#define FRAME_CHAIN(fi) m32r_frame_chain (fi)
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#define FRAME_CHAIN_VALID(fp, frame) generic_frame_chain_valid (fp, frame)
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extern CORE_ADDR m32r_find_callers_reg PARAMS ((struct frame_info *fi,
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int regnum));
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extern CORE_ADDR m32r_frame_saved_pc PARAMS((struct frame_info *));
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/* mvs_check FRAME_SAVED_PC */
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#define FRAME_SAVED_PC(fi) m32r_frame_saved_pc (fi)
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/* mvs_check EXTRACT_RETURN_VALUE */
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#define EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \
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memcpy ((VALBUF), \
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(char *)(REGBUF) + REGISTER_BYTE (V0_REGNUM) + \
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((TYPE_LENGTH (TYPE) > 4 ? 8 : 4) - TYPE_LENGTH (TYPE)), \
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TYPE_LENGTH (TYPE))
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/* mvs_check STORE_RETURN_VALUE */
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#define STORE_RETURN_VALUE(TYPE, VALBUF) \
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write_register_bytes(REGISTER_BYTE (V0_REGNUM) + \
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((TYPE_LENGTH (TYPE) > 4 ? 8:4) - TYPE_LENGTH (TYPE)),\
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(VALBUF), TYPE_LENGTH (TYPE));
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extern CORE_ADDR m32r_skip_prologue PARAMS ((CORE_ADDR pc));
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/* mvs_check SKIP_PROLOGUE */
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#define SKIP_PROLOGUE(pc) pc = m32r_skip_prologue (pc)
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/* mvs_no_check FRAME_ARGS_SKIP */
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#define FRAME_ARGS_SKIP 0
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/* mvs_no_check FRAME_ARGS_ADDRESS */
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#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
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/* mvs_no_check FRAME_LOCALS_ADDRESS */
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#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
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/* mvs_no_check FRAME_NUM_ARGS */
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#define FRAME_NUM_ARGS(val, fi) ((val) = -1)
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#define COERCE_FLOAT_TO_DOUBLE 1
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#define TARGET_WRITE_SP m32r_write_sp
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/* struct passing and returning stuff */
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#define STORE_STRUCT_RETURN(STRUCT_ADDR, SP) \
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write_register (0, STRUCT_ADDR)
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extern use_struct_convention_fn m32r_use_struct_convention;
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#define USE_STRUCT_CONVENTION(GCC_P, TYPE) m32r_use_struct_convention (GCC_P, TYPE)
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#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
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extract_address (REGBUF + REGISTER_BYTE (V0_REGNUM), \
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REGISTER_RAW_SIZE (V0_REGNUM))
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#define REG_STRUCT_HAS_ADDR(gcc_p,type) (TYPE_LENGTH (type) > 8)
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/* generic dummy frame stuff */
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#define PUSH_DUMMY_FRAME generic_push_dummy_frame ()
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#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP, FP)
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/* target-specific dummy_frame stuff */
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extern struct frame_info *m32r_pop_frame PARAMS ((struct frame_info *frame));
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/* mvs_check POP_FRAME */
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#define POP_FRAME m32r_pop_frame (get_current_frame ())
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/* mvs_no_check STACK_ALIGN */
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/* #define STACK_ALIGN(x) ((x + 3) & ~3) */
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extern CORE_ADDR m32r_push_return_address PARAMS ((CORE_ADDR, CORE_ADDR));
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extern CORE_ADDR m32r_push_arguments PARAMS ((int nargs,
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struct value **args,
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CORE_ADDR sp,
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unsigned char struct_return,
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CORE_ADDR struct_addr));
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/* mvs_no_check PUSH_ARGUMENTS */
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#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
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(SP) = m32r_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR)
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#define PUSH_RETURN_ADDRESS(PC, SP) m32r_push_return_address (PC, SP)
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/* override the standard get_saved_register function with
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one that takes account of generic CALL_DUMMY frames */
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#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \
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generic_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval)
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#define USE_GENERIC_DUMMY_FRAMES 1
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#define CALL_DUMMY {0}
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#define CALL_DUMMY_LENGTH (0)
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#define CALL_DUMMY_START_OFFSET (0)
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#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
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#define FIX_CALL_DUMMY(DUMMY1, STARTADDR, FUNADDR, NARGS, ARGS, TYPE, GCCP)
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#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
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#define CALL_DUMMY_ADDRESS() entry_point_address ()
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