mirror of
https://sourceware.org/git/binutils-gdb.git
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2b02f87c4f
atmega8hvd, atmega16hvb, atmega32hvb, atmega64c1, atmega16m1,
atmega64m1, atmega32u6, atmega128rfa1, at90pwm81, at90scr100,
m3000f, m3000s and m3001b devices.
* doc/c-avr.texi: Likewise.
378 lines
11 KiB
Plaintext
378 lines
11 KiB
Plaintext
@c Copyright 2006
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@c Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@ifset GENERIC
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@page
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@node AVR-Dependent
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@chapter AVR Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter AVR Dependent Features
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@end ifclear
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@cindex AVR support
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@menu
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* AVR Options:: Options
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* AVR Syntax:: Syntax
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* AVR Opcodes:: Opcodes
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@end menu
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@node AVR Options
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@section Options
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@cindex AVR options (none)
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@cindex options for AVR (none)
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@table @code
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@cindex @code{-mmcu=} command line option, AVR
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@item -mmcu=@var{mcu}
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Specify ATMEL AVR instruction set or MCU type.
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Instruction set avr1 is for the minimal AVR core, not supported by the C
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compiler, only for assembler programs (MCU types: at90s1200,
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attiny11, attiny12, attiny15, attiny28).
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Instruction set avr2 (default) is for the classic AVR core with up to
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8K program memory space (MCU types: at90s2313, at90s2323, at90s2333, at90s2343,
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attiny22, attiny26, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534,
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at90s8535).
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Instruction set avr25 is for the classic AVR core with up to 8K program memory
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space plus the MOVW instruction (MCU types: attiny13, attiny13a, attiny2313,
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attiny24, attiny44, attiny84, attiny25, attiny45, attiny85, attiny261,
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attiny461, attiny861, attiny87, attiny43u, attiny48, attiny88, at86rf401).
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Instruction set avr3 is for the classic AVR core with up to 128K program
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memory space (MCU types: at43usb355, at76c711).
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Instruction set avr31 is for the classic AVR core with exactly 128K program
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memory space (MCU types: atmega103, at43usb320).
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Instruction set avr35 is for classic AVR core plus MOVW, CALL, and JMP
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instructions (MCU types: attiny167, attiny327, at90usb82, at90usb162).
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Instruction set avr4 is for the enhanced AVR core with up to 8K program
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memory space (MCU types: atmega48, atmega48p,atmega8, atmega88, atmega88p,
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atmega8515, atmega8535, atmega8hva, atmega4hvd, atmega8hvd, at90pwm1,
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at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81).
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Instruction set avr5 is for the enhanced AVR core with up to 128K program
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memory space (MCU types: atmega16, atmega161, atmega162, atmega163, atmega164p,
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atmega165, atmega165p, atmega168, atmega168p, atmega169, atmega169p, atmega32,
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atmega323, atmega324p, atmega325, atmega325p, atmega3250, atmega3250p,
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atmega328p, atmega329, atmega329p, atmega3290, atmega3290p, atmega406, atmega64,
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atmega640, atmega644, atmega644p, atmega645, atmega6450, atmega649, atmega6490,
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atmega16hva, atmega16hvb, atmega32hvb, at90can32, at90can64, at90pwm216,
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at90pwm316, atmega32c1, atmega64c1, atmega16m1, atmega32m1, atmega64m1,
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atmega16u4, atmega32u4, atmega32u6, at90usb646, at90usb647, at94k, at90scr100).
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Instruction set avr51 is for the enhanced AVR core with exactly 128K program
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memory space (MCU types: atmega128, atmega1280, atmega1281, atmega1284p,
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atmega128rfa, at90can128, at90usb1286, at90usb1287, m3000f, m3000s, m3001b).
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Instruction set avr6 is for the enhanced AVR core with a 3-byte PC (MCU types:
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atmega2560, atmega2561).
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@cindex @code{-mall-opcodes} command line option, AVR
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@item -mall-opcodes
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Accept all AVR opcodes, even if not supported by @code{-mmcu}.
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@cindex @code{-mno-skip-bug} command line option, AVR
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@item -mno-skip-bug
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This option disable warnings for skipping two-word instructions.
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@cindex @code{-mno-wrap} command line option, AVR
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@item -mno-wrap
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This option reject @code{rjmp/rcall} instructions with 8K wrap-around.
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@end table
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@node AVR Syntax
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@section Syntax
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@menu
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* AVR-Chars:: Special Characters
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* AVR-Regs:: Register Names
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* AVR-Modifiers:: Relocatable Expression Modifiers
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@end menu
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@node AVR-Chars
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@subsection Special Characters
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@cindex line comment character, AVR
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@cindex AVR line comment character
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The presence of a @samp{;} on a line indicates the start of a comment
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that extends to the end of the current line. If a @samp{#} appears as
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the first character of a line, the whole line is treated as a comment.
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@cindex line separator, AVR
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@cindex statement separator, AVR
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@cindex AVR line separator
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The @samp{$} character can be used instead of a newline to separate
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statements.
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@node AVR-Regs
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@subsection Register Names
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@cindex AVR register names
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@cindex register names, AVR
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The AVR has 32 x 8-bit general purpose working registers @samp{r0},
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@samp{r1}, ... @samp{r31}.
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Six of the 32 registers can be used as three 16-bit indirect address
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register pointers for Data Space addressing. One of the these address
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pointers can also be used as an address pointer for look up tables in
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Flash program memory. These added function registers are the 16-bit
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@samp{X}, @samp{Y} and @samp{Z} - registers.
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@smallexample
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X = @r{r26:r27}
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Y = @r{r28:r29}
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Z = @r{r30:r31}
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@end smallexample
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@node AVR-Modifiers
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@subsection Relocatable Expression Modifiers
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@cindex AVR modifiers
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@cindex syntax, AVR
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The assembler supports several modifiers when using relocatable addresses
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in AVR instruction operands. The general syntax is the following:
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@smallexample
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modifier(relocatable-expression)
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@end smallexample
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@table @code
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@cindex symbol modifiers
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@item lo8
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This modifier allows you to use bits 0 through 7 of
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an address expression as 8 bit relocatable expression.
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@item hi8
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This modifier allows you to use bits 7 through 15 of an address expression
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as 8 bit relocatable expression. This is useful with, for example, the
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AVR @samp{ldi} instruction and @samp{lo8} modifier.
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For example
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@smallexample
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ldi r26, lo8(sym+10)
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ldi r27, hi8(sym+10)
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@end smallexample
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@item hh8
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This modifier allows you to use bits 16 through 23 of
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an address expression as 8 bit relocatable expression.
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Also, can be useful for loading 32 bit constants.
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@item hlo8
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Synonym of @samp{hh8}.
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@item hhi8
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This modifier allows you to use bits 24 through 31 of
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an expression as 8 bit expression. This is useful with, for example, the
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AVR @samp{ldi} instruction and @samp{lo8}, @samp{hi8}, @samp{hlo8},
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@samp{hhi8}, modifier.
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For example
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@smallexample
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ldi r26, lo8(285774925)
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ldi r27, hi8(285774925)
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ldi r28, hlo8(285774925)
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ldi r29, hhi8(285774925)
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; r29,r28,r27,r26 = 285774925
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@end smallexample
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@item pm_lo8
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This modifier allows you to use bits 0 through 7 of
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an address expression as 8 bit relocatable expression.
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This modifier useful for addressing data or code from
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Flash/Program memory. The using of @samp{pm_lo8} similar
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to @samp{lo8}.
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@item pm_hi8
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This modifier allows you to use bits 8 through 15 of
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an address expression as 8 bit relocatable expression.
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This modifier useful for addressing data or code from
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Flash/Program memory.
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@item pm_hh8
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This modifier allows you to use bits 15 through 23 of
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an address expression as 8 bit relocatable expression.
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This modifier useful for addressing data or code from
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Flash/Program memory.
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@end table
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@node AVR Opcodes
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@section Opcodes
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@cindex AVR opcode summary
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@cindex opcode summary, AVR
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@cindex mnemonics, AVR
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@cindex instruction summary, AVR
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For detailed information on the AVR machine instruction set, see
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@url{www.atmel.com/products/AVR}.
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@code{@value{AS}} implements all the standard AVR opcodes.
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The following table summarizes the AVR opcodes, and their arguments.
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@smallexample
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@i{Legend:}
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r @r{any register}
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d @r{`ldi' register (r16-r31)}
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v @r{`movw' even register (r0, r2, ..., r28, r30)}
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a @r{`fmul' register (r16-r23)}
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w @r{`adiw' register (r24,r26,r28,r30)}
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e @r{pointer registers (X,Y,Z)}
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b @r{base pointer register and displacement ([YZ]+disp)}
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z @r{Z pointer register (for [e]lpm Rd,Z[+])}
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M @r{immediate value from 0 to 255}
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n @r{immediate value from 0 to 255 ( n = ~M ). Relocation impossible}
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s @r{immediate value from 0 to 7}
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P @r{Port address value from 0 to 63. (in, out)}
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p @r{Port address value from 0 to 31. (cbi, sbi, sbic, sbis)}
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K @r{immediate value from 0 to 63 (used in `adiw', `sbiw')}
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i @r{immediate value}
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l @r{signed pc relative offset from -64 to 63}
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L @r{signed pc relative offset from -2048 to 2047}
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h @r{absolute code address (call, jmp)}
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S @r{immediate value from 0 to 7 (S = s << 4)}
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? @r{use this opcode entry if no parameters, else use next opcode entry}
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1001010010001000 clc
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1001010011011000 clh
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1001010011111000 cli
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1001010010101000 cln
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1001010011001000 cls
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1001010011101000 clt
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1001010010111000 clv
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1001010010011000 clz
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1001010000001000 sec
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1001010001011000 seh
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1001010001111000 sei
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1001010000101000 sen
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1001010001001000 ses
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1001010001101000 set
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1001010000111000 sev
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1001010000011000 sez
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100101001SSS1000 bclr S
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100101000SSS1000 bset S
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1001010100001001 icall
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1001010000001001 ijmp
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1001010111001000 lpm ?
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1001000ddddd010+ lpm r,z
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1001010111011000 elpm ?
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1001000ddddd011+ elpm r,z
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0000000000000000 nop
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1001010100001000 ret
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1001010100011000 reti
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1001010110001000 sleep
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1001010110011000 break
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1001010110101000 wdr
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1001010111101000 spm
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000111rdddddrrrr adc r,r
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000011rdddddrrrr add r,r
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001000rdddddrrrr and r,r
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000101rdddddrrrr cp r,r
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000001rdddddrrrr cpc r,r
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000100rdddddrrrr cpse r,r
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001001rdddddrrrr eor r,r
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001011rdddddrrrr mov r,r
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100111rdddddrrrr mul r,r
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001010rdddddrrrr or r,r
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000010rdddddrrrr sbc r,r
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000110rdddddrrrr sub r,r
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001001rdddddrrrr clr r
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000011rdddddrrrr lsl r
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000111rdddddrrrr rol r
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001000rdddddrrrr tst r
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0111KKKKddddKKKK andi d,M
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0111KKKKddddKKKK cbr d,n
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1110KKKKddddKKKK ldi d,M
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11101111dddd1111 ser d
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0110KKKKddddKKKK ori d,M
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0110KKKKddddKKKK sbr d,M
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0011KKKKddddKKKK cpi d,M
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0100KKKKddddKKKK sbci d,M
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0101KKKKddddKKKK subi d,M
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1111110rrrrr0sss sbrc r,s
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1111111rrrrr0sss sbrs r,s
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1111100ddddd0sss bld r,s
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1111101ddddd0sss bst r,s
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10110PPdddddPPPP in r,P
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10111PPrrrrrPPPP out P,r
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10010110KKddKKKK adiw w,K
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10010111KKddKKKK sbiw w,K
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10011000pppppsss cbi p,s
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10011010pppppsss sbi p,s
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10011001pppppsss sbic p,s
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10011011pppppsss sbis p,s
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111101lllllll000 brcc l
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111100lllllll000 brcs l
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111100lllllll001 breq l
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111101lllllll100 brge l
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111101lllllll101 brhc l
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111100lllllll101 brhs l
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111101lllllll111 brid l
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111100lllllll111 brie l
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111100lllllll000 brlo l
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111100lllllll100 brlt l
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111100lllllll010 brmi l
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111101lllllll001 brne l
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111101lllllll010 brpl l
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111101lllllll000 brsh l
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111101lllllll110 brtc l
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111100lllllll110 brts l
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111101lllllll011 brvc l
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111100lllllll011 brvs l
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111101lllllllsss brbc s,l
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111100lllllllsss brbs s,l
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1101LLLLLLLLLLLL rcall L
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1100LLLLLLLLLLLL rjmp L
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1001010hhhhh111h call h
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1001010hhhhh110h jmp h
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1001010rrrrr0101 asr r
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1001010rrrrr0000 com r
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1001010rrrrr1010 dec r
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1001010rrrrr0011 inc r
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1001010rrrrr0110 lsr r
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1001010rrrrr0001 neg r
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1001000rrrrr1111 pop r
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1001001rrrrr1111 push r
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1001010rrrrr0111 ror r
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1001010rrrrr0010 swap r
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00000001ddddrrrr movw v,v
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00000010ddddrrrr muls d,d
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000000110ddd0rrr mulsu a,a
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000000110ddd1rrr fmul a,a
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000000111ddd0rrr fmuls a,a
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000000111ddd1rrr fmulsu a,a
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1001001ddddd0000 sts i,r
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1001000ddddd0000 lds r,i
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10o0oo0dddddbooo ldd r,b
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100!000dddddee-+ ld r,e
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10o0oo1rrrrrbooo std b,r
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100!001rrrrree-+ st e,r
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1001010100011001 eicall
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1001010000011001 eijmp
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@end smallexample
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