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2011-02-25 Chao-ying Fu <fu@mips.com> Ilie Garbacea <ilie@mips.com> Maciej W. Rozycki <macro@codesourcery.com> Joseph Myers <joseph@codesourcery.com> Catherine Moore <clm@codesourcery.com> Richard Sandiford <rdsandiford@googlemail.com> * archures.c (bfd_mach_mips_micromips): New macro. * cpu-mips.c (I_micromips): New enum value. (arch_info_struct): Add bfd_mach_mips_micromips. * elfxx-mips.h (_bfd_mips_elf_is_target_special_symbol): New prototype. (_bfd_mips_elf_relax_section): Likewise. (_bfd_mips16_elf_reloc_unshuffle): Rename to... (_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS ASE. (_bfd_mips16_elf_reloc_shuffle): Rename to... (_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE. (gprel16_reloc_p): Handle microMIPS ASE. (literal_reloc_p): New function. * elf32-mips.c (elf_micromips_howto_table_rel): New variable. (_bfd_mips_elf32_gprel16_reloc): Handle microMIPS ASE. (mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle and _bfd_mips_elf_reloc_shuffle changes. (mips_elf_gprel32_reloc): Update comment. (micromips_reloc_map): New variable. (bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE. (mips_elf32_rtype_to_howto): Likewise. (mips_info_to_howto_rel): Likewise. (bfd_elf32_bfd_is_target_special_symbol): Define. (bfd_elf32_bfd_relax_section): Likewise. * elf64-mips.c (micromips_elf64_howto_table_rel): New variable. (micromips_elf64_howto_table_rela): Likewise. (mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle and _bfd_mips_elf_reloc_shuffle changes. (micromips_reloc_map): Likewise. (bfd_elf64_bfd_reloc_type_lookup): Handle microMIPS ASE. (bfd_elf64_bfd_reloc_name_lookup): Likewise. (mips_elf64_rtype_to_howto): Likewise. (bfd_elf64_bfd_is_target_special_symbol): Define. * elfn32-mips.c (elf_micromips_howto_table_rel): New variable. (elf_micromips_howto_table_rela): Likewise. (mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle and _bfd_mips_elf_reloc_shuffle changes. (micromips_reloc_map): Likewise. (bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE. (bfd_elf32_bfd_reloc_name_lookup): Likewise. (mips_elf_n32_rtype_to_howto): Likewise. (bfd_elf32_bfd_is_target_special_symbol): Define. * elfxx-mips.c (LA25_LUI_MICROMIPS_1): New macro. (LA25_LUI_MICROMIPS_2): Likewise. (LA25_J_MICROMIPS_1, LA25_J_MICROMIPS_2): Likewise. (LA25_ADDIU_MICROMIPS_1, LA25_ADDIU_MICROMIPS_2): Likewise. (TLS_RELOC_P): Handle microMIPS ASE. (mips_elf_create_stub_symbol): Adjust value of stub symbol if target is a microMIPS function. (micromips_reloc_p): New function. (micromips_reloc_shuffle_p): Likewise. (got16_reloc_p, call16_reloc_p): Handle microMIPS ASE. (got_disp_reloc_p, got_page_reloc_p): New functions. (got_ofst_reloc_p): Likewise. (got_hi16_reloc_p, got_lo16_reloc_p): Likewise. (call_hi16_reloc_p, call_lo16_reloc_p): Likewise. (hi16_reloc_p, lo16_reloc_p, jal_reloc_p): Handle microMIPS ASE. (micromips_branch_reloc_p): New function. (tls_gd_reloc_p, tls_ldm_reloc_p): Likewise. (tls_gottprel_reloc_p): Likewise. (_bfd_mips16_elf_reloc_unshuffle): Rename to... (_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS ASE. (_bfd_mips16_elf_reloc_shuffle): Rename to... (_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE. (_bfd_mips_elf_lo16_reloc): Handle microMIPS ASE. (mips_tls_got_index, mips_elf_got_page): Likewise. (mips_elf_create_local_got_entry): Likewise. (mips_elf_relocation_needs_la25_stub): Likewise. (mips_elf_calculate_relocation): Likewise. (mips_elf_perform_relocation): Likewise. (_bfd_mips_elf_symbol_processing): Likewise. (_bfd_mips_elf_add_symbol_hook): Likewise. (_bfd_mips_elf_link_output_symbol_hook): Likewise. (mips_elf_add_lo16_rel_addend): Likewise. (_bfd_mips_elf_check_relocs): Likewise. (mips_elf_adjust_addend): Likewise. (_bfd_mips_elf_relocate_section): Likewise. (mips_elf_create_la25_stub): Likewise. (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise. (_bfd_mips_elf_gc_sweep_hook): Likewise. (_bfd_mips_elf_is_target_special_symbol): New function. (mips_elf_relax_delete_bytes): Likewise. (opcode_descriptor): New structure. (RA): New macro. (OP32_SREG, OP32_TREG, OP16_VALID_REG): Likewise. (b_insns_32, bc_insn_32, bz_insn_32, bzal_insn_32): New variables. (beq_insn_32): Likewise. (b_insn_16, bz_insn_16): New variables. (BZC32_REG_FIELD): New macro. (bz_rs_insns_32, bz_rt_insns_32): New variables. (bzc_insns_32, bz_insns_16):Likewise. (BZ16_REG, BZ16_REG_FIELD): New macros. (jal_insn_32_bd16, jal_insn_32_bd32): New variables. (jal_x_insn_32_bd32): Likewise. (j_insn_32, jalr_insn_32): Likewise. (ds_insns_32_bd16, ds_insns_32_bd32): Likewise. (jalr_insn_16_bd16, jalr_insn_16_bd32, jr_insn_16): Likewise. (JR16_REG): New macro. (ds_insns_16_bd16): New variable. (lui_insn): Likewise. (addiu_insn, addiupc_insn): Likewise. (ADDIUPC_REG_FIELD): New macro. (MOVE32_RD, MOVE32_RS): Likewise. (MOVE16_RD_FIELD, MOVE16_RS_FIELD): Likewise. (move_insns_32, move_insns_16): New variables. (nop_insn_32, nop_insn_16): Likewise. (MATCH): New macro. (find_match): New function. (check_br16_dslot, check_br32_dslot): Likewise. (check_br16, check_br32): Likewise. (IS_BITSIZE): New macro. (check_4byte_branch): New function. (_bfd_mips_elf_relax_section): Likewise. (_bfd_mips_elf_merge_private_bfd_data): Disallow linking MIPS16 and microMIPS modules together. (_bfd_mips_elf_print_private_bfd_data): Handle microMIPS ASE. * reloc.c (BFD_RELOC_MICROMIPS_7_PCREL_S1): New relocation. (BFD_RELOC_MICROMIPS_10_PCREL_S1): Likewise. (BFD_RELOC_MICROMIPS_16_PCREL_S1): Likewise. (BFD_RELOC_MICROMIPS_GPREL16): Likewise. (BFD_RELOC_MICROMIPS_JMP, BFD_RELOC_MICROMIPS_HI16): Likewise. (BFD_RELOC_MICROMIPS_HI16_S): Likewise. (BFD_RELOC_MICROMIPS_LO16): Likewise. (BFD_RELOC_MICROMIPS_LITERAL): Likewise. (BFD_RELOC_MICROMIPS_GOT16): Likewise. (BFD_RELOC_MICROMIPS_CALL16): Likewise. (BFD_RELOC_MICROMIPS_GOT_HI16): Likewise. (BFD_RELOC_MICROMIPS_GOT_LO16): Likewise. (BFD_RELOC_MICROMIPS_CALL_HI16): Likewise. (BFD_RELOC_MICROMIPS_CALL_LO16): Likewise. (BFD_RELOC_MICROMIPS_SUB): Likewise. (BFD_RELOC_MICROMIPS_GOT_PAGE): Likewise. (BFD_RELOC_MICROMIPS_GOT_OFST): Likewise. (BFD_RELOC_MICROMIPS_GOT_DISP): Likewise. (BFD_RELOC_MICROMIPS_HIGHEST): Likewise. (BFD_RELOC_MICROMIPS_HIGHER): Likewise. (BFD_RELOC_MICROMIPS_SCN_DISP): Likewise. (BFD_RELOC_MICROMIPS_JALR): Likewise. (BFD_RELOC_MICROMIPS_TLS_GD): Likewise. (BFD_RELOC_MICROMIPS_TLS_LDM): Likewise. (BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16): Likewise. (BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16): Likewise. (BFD_RELOC_MICROMIPS_TLS_GOTTPREL): Likewise. (BFD_RELOC_MICROMIPS_TLS_TPREL_HI16): Likewise. (BFD_RELOC_MICROMIPS_TLS_TPREL_LO16): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. binutils/ 2011-02-25 Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> * readelf.c (get_machine_flags): Handle microMIPS ASE. (get_mips_symbol_other): Likewise. gas/ 2011-02-25 Maciej W. Rozycki <macro@codesourcery.com> Chao-ying Fu <fu@mips.com> Richard Sandiford <rdsandiford@googlemail.com> * config/tc-mips.h (mips_segment_info): Add one bit for microMIPS. (TC_LABEL_IS_LOCAL): New macro. (mips_label_is_local): New prototype. * config/tc-mips.c (S0, S7): New macros. (emit_branch_likely_macro): New variable. (mips_set_options): Add micromips. (mips_opts): Initialise micromips to -1. (file_ase_micromips): New variable. (CPU_HAS_MICROMIPS): New macro. (hilo_interlocks): Set for microMIPS too. (gpr_interlocks): Likewise. (cop_interlocks): Likewise. (cop_mem_interlocks): Likewise. (HAVE_CODE_COMPRESSION): New macro. (micromips_op_hash): New variable. (micromips_nop16_insn, micromips_nop32_insn): New variables. (NOP_INSN): Handle microMIPS ASE. (mips32_to_micromips_reg_b_map): New macro. (mips32_to_micromips_reg_c_map): Likewise. (mips32_to_micromips_reg_d_map): Likewise. (mips32_to_micromips_reg_e_map): Likewise. (mips32_to_micromips_reg_f_map): Likewise. (mips32_to_micromips_reg_g_map): Likewise. (mips32_to_micromips_reg_l_map): Likewise. (mips32_to_micromips_reg_n_map): Likewise. (mips32_to_micromips_reg_h_map): New variable. (mips32_to_micromips_reg_m_map): Likewise. (mips32_to_micromips_reg_q_map): Likewise. (micromips_to_32_reg_h_map): New variable. (micromips_to_32_reg_i_map): Likewise. (micromips_to_32_reg_m_map): Likewise. (micromips_to_32_reg_q_map): Likewise. (micromips_to_32_reg_b_map): New macro. (micromips_to_32_reg_c_map): Likewise. (micromips_to_32_reg_d_map): Likewise. (micromips_to_32_reg_e_map): Likewise. (micromips_to_32_reg_f_map): Likewise. (micromips_to_32_reg_g_map): Likewise. (micromips_to_32_reg_l_map): Likewise. (micromips_to_32_reg_n_map): Likewise. (micromips_imm_b_map, micromips_imm_c_map): New macros. (RELAX_DELAY_SLOT_16BIT): New macro. (RELAX_DELAY_SLOT_SIZE_FIRST): Likewise. (RELAX_DELAY_SLOT_SIZE_SECOND): Likewise. (RELAX_MICROMIPS_ENCODE, RELAX_MICROMIPS_P): New macros. (RELAX_MICROMIPS_TYPE, RELAX_MICROMIPS_AT): Likewise. (RELAX_MICROMIPS_U16BIT, RELAX_MICROMIPS_UNCOND): Likewise. (RELAX_MICROMIPS_COMPACT, RELAX_MICROMIPS_LINK): Likewise. (RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16): Likewise. (RELAX_MICROMIPS_MARK_TOOFAR16): Likewise. (RELAX_MICROMIPS_CLEAR_TOOFAR16): Likewise. (RELAX_MICROMIPS_TOOFAR32): Likewise. (RELAX_MICROMIPS_MARK_TOOFAR32): Likewise. (RELAX_MICROMIPS_CLEAR_TOOFAR32): Likewise. (INSERT_OPERAND, EXTRACT_OPERAND): Handle microMIPS ASE. (mips_macro_warning): Add delay_slot_16bit_p, delay_slot_32bit_p, fsize and insns. (mips_mark_labels): New function. (mips16_small, mips16_ext): Remove variables, replacing with... (forced_insn_size): ... this. (append_insn, mips16_ip): Update accordingly. (micromips_insn_length): New function. (insn_length): Return the length of microMIPS instructions. (mips_record_mips16_mode): Rename to... (mips_record_compressed_mode): ... this. Handle microMIPS ASE. (install_insn): Handle microMIPS ASE. (reglist_lookup): New function. (is_size_valid, is_delay_slot_valid): Likewise. (md_begin): Handle microMIPS ASE. (md_assemble): Likewise. Update for append_insn interface change. (micromips_reloc_p): New function. (got16_reloc_p): Handle microMIPS ASE. (hi16_reloc_p): Likewise. (lo16_reloc_p): Likewise. (jmp_reloc_p): New function. (jalr_reloc_p): Likewise. (matching_lo_reloc): Handle microMIPS ASE. (insn_uses_reg, reg_needs_delay): Likewise. (mips_move_labels): Likewise. (mips16_mark_labels): Rename to... (mips_compressed_mark_labels): ... this. Handle microMIPS ASE. (gpr_mod_mask): New function. (gpr_read_mask, gpr_write_mask): Handle microMIPS ASE. (fpr_read_mask, fpr_write_mask): Likewise. (insns_between, nops_for_vr4130, nops_for_insn): Likewise. (fix_loongson2f_nop, fix_loongson2f_jump): Likewise. (MICROMIPS_LABEL_CHAR): New macro. (micromips_target_label, micromips_target_name): New variables. (micromips_label_name, micromips_label_expr): New functions. (micromips_label_inc, micromips_add_label): Likewise. (mips_label_is_local): Likewise. (micromips_map_reloc): Likewise. (can_swap_branch_p): Handle microMIPS ASE. (append_insn): Add expansionp argument. Handle microMIPS ASE. (start_noreorder, end_noreorder): Handle microMIPS ASE. (macro_start, macro_warning, macro_end): Likewise. (brk_fmt, cop12_fmt, jalr_fmt, lui_fmt): New variables. (mem12_fmt, mfhl_fmt, shft_fmt, trap_fmt): Likewise. (BRK_FMT, COP12_FMT, JALR_FMT, LUI_FMT): New macros. (MEM12_FMT, MFHL_FMT, SHFT_FMT, TRAP_FMT): Likewise. (macro_build): Handle microMIPS ASE. Update for append_insn interface change. (mips16_macro_build): Update for append_insn interface change. (macro_build_jalr): Handle microMIPS ASE. (macro_build_lui): Likewise. Simplify. (load_register): Handle microMIPS ASE. (load_address): Likewise. (move_register): Likewise. (macro_build_branch_likely): New function. (macro_build_branch_ccl): Likewise. (macro_build_branch_rs): Likewise. (macro_build_branch_rsrt): Likewise. (macro): Handle microMIPS ASE. (validate_micromips_insn): New function. (expr_const_in_range): Likewise. (mips_ip): Handle microMIPS ASE. (options): Add OPTION_MICROMIPS and OPTION_NO_MICROMIPS. (md_longopts): Add mmicromips and mno-micromips. (md_parse_option): Handle OPTION_MICROMIPS and OPTION_NO_MICROMIPS. (mips_after_parse_args): Handle microMIPS ASE. (md_pcrel_from): Handle microMIPS relocations. (mips_force_relocation): Likewise. (md_apply_fix): Likewise. (mips_align): Handle microMIPS ASE. (s_mipsset): Likewise. (s_cpload, s_cpsetup, s_cpreturn): Use relocation wrappers. (s_dtprel_internal): Likewise. (s_gpword, s_gpdword): Likewise. (s_insn): Handle microMIPS ASE. (s_mips_stab): Likewise. (relaxed_micromips_32bit_branch_length): New function. (relaxed_micromips_16bit_branch_length): New function. (md_estimate_size_before_relax): Handle microMIPS ASE. (mips_fix_adjustable): Likewise. (tc_gen_reloc): Handle microMIPS relocations. (mips_relax_frag): Handle microMIPS ASE. (md_convert_frag): Likewise. (mips_frob_file_after_relocs): Likewise. (mips_elf_final_processing): Likewise. (mips_nop_opcode): Likewise. (mips_handle_align): Likewise. (md_show_usage): Handle microMIPS options. * symbols.c (TC_LABEL_IS_LOCAL): New macro. (S_IS_LOCAL): Add a TC_LABEL_IS_LOCAL check. * doc/as.texinfo (Target MIPS options): Add -mmicromips and -mno-micromips. (-mmicromips, -mno-micromips): New options. * doc/c-mips.texi (-mmicromips, -mno-micromips): New options. (MIPS ISA): Document .set micromips and .set nomicromips. (MIPS insn): Update for microMIPS support. gas/testsuite/ 2011-02-25 Maciej W. Rozycki <macro@codesourcery.com> Chao-ying Fu <fu@mips.com> Richard Sandiford <rdsandiford@googlemail.com> * gas/mips/micromips.d: New test. * gas/mips/micromips-branch-delay.d: Likewise. * gas/mips/micromips-branch-relax.d: Likewise. * gas/mips/micromips-branch-relax-pic.d: Likewise. * gas/mips/micromips-size-1.d: Likewise. * gas/mips/micromips-trap.d: Likewise. * gas/mips/micromips.l: New stderr output. * gas/mips/micromips-branch-delay.l: Likewise. * gas/mips/micromips-branch-relax.l: Likewise. * gas/mips/micromips-branch-relax-pic.l: Likewise. * gas/mips/micromips-size-0.l: New list test. * gas/mips/micromips-size-1.l: New stderr output. * gas/mips/micromips.s: New test source. * gas/mips/micromips-branch-delay.s: Likewise. * gas/mips/micromips-branch-relax.s: Likewise. * gas/mips/micromips-size-0.s: Likewise. * gas/mips/micromips-size-1.s: Likewise. * gas/mips/mips.exp: Run the new tests. * gas/mips/dli.s: Use .p2align. * gas/mips/elf_ase_micromips.d: New test. * gas/mips/elf_ase_micromips-2.d: Likewise. * gas/mips/micromips@abs.d: Likewise. * gas/mips/micromips@add.d: Likewise. * gas/mips/micromips@alnv_ps-swap.d: Likewise. * gas/mips/micromips@and.d: Likewise. * gas/mips/micromips@beq.d: Likewise. * gas/mips/micromips@bge.d: Likewise. * gas/mips/micromips@bgeu.d: Likewise. * gas/mips/micromips@blt.d: Likewise. * gas/mips/micromips@bltu.d: Likewise. * gas/mips/micromips@branch-likely.d: Likewise. * gas/mips/micromips@branch-misc-1.d: Likewise. * gas/mips/micromips@branch-misc-2-64.d: Likewise. * gas/mips/micromips@branch-misc-2.d: Likewise. * gas/mips/micromips@branch-misc-2pic-64.d: Likewise. * gas/mips/micromips@branch-misc-2pic.d: Likewise. * gas/mips/micromips@branch-misc-4-64.d: Likewise. * gas/mips/micromips@branch-misc-4.d: Likewise. * gas/mips/micromips@branch-self.d: Likewise. * gas/mips/micromips@cache.d: Likewise. * gas/mips/micromips@daddi.d: Likewise. * gas/mips/micromips@dli.d: Likewise. * gas/mips/micromips@elf-jal.d: Likewise. * gas/mips/micromips@elf-rel2.d: Likewise. * gas/mips/micromips@elfel-rel2.d: Likewise. * gas/mips/micromips@elf-rel4.d: Likewise. * gas/mips/micromips@jal-svr4pic.d: Likewise. * gas/mips/micromips@jal-svr4pic-noreorder.d: Likewise. * gas/mips/micromips@lb-svr4pic-ilocks.d: Likewise. * gas/mips/micromips@li.d: Likewise. * gas/mips/micromips@loc-swap-dis.d: Likewise. * gas/mips/micromips@loc-swap.d: Likewise. * gas/mips/micromips@mips1-fp.d: Likewise. * gas/mips/micromips@mips32-cp2.d: Likewise. * gas/mips/micromips@mips32-imm.d: Likewise. * gas/mips/micromips@mips32-sf32.d: Likewise. * gas/mips/micromips@mips32.d: Likewise. * gas/mips/micromips@mips32r2-cp2.d: Likewise. * gas/mips/micromips@mips32r2-fp32.d: Likewise. * gas/mips/micromips@mips32r2-sync.d: Likewise. * gas/mips/micromips@mips32r2.d: Likewise. * gas/mips/micromips@mips4-branch-likely.d: Likewise. * gas/mips/micromips@mips4-fp.d: Likewise. * gas/mips/micromips@mips4.d: Likewise. * gas/mips/micromips@mips5.d: Likewise. * gas/mips/micromips@mips64-cp2.d: Likewise. * gas/mips/micromips@mips64.d: Likewise. * gas/mips/micromips@mips64r2.d: Likewise. * gas/mips/micromips@pref.d: Likewise. * gas/mips/micromips@relax-at.d: Likewise. * gas/mips/micromips@relax.d: Likewise. * gas/mips/micromips@rol-hw.d: Likewise. * gas/mips/micromips@uld2-eb.d: Likewise. * gas/mips/micromips@uld2-el.d: Likewise. * gas/mips/micromips@ulh2-eb.d: Likewise. * gas/mips/micromips@ulh2-el.d: Likewise. * gas/mips/micromips@ulw2-eb-ilocks.d: Likewise. * gas/mips/micromips@ulw2-el-ilocks.d: Likewise. * gas/mips/cache.d: Likewise. * gas/mips/daddi.d: Likewise. * gas/mips/mips32-imm.d: Likewise. * gas/mips/pref.d: Likewise. * gas/mips/elf-rel27.d: Handle microMIPS ASE. * gas/mips/l_d.d: Likewise. * gas/mips/l_d-n32.d: Likewise. * gas/mips/l_d-n64.d: Likewise. * gas/mips/ld.d: Likewise. * gas/mips/ld-n32.d: Likewise. * gas/mips/ld-n64.d: Likewise. * gas/mips/s_d.d: Likewise. * gas/mips/s_d-n32.d: Likewise. * gas/mips/s_d-n64.d: Likewise. * gas/mips/sd.d: Likewise. * gas/mips/sd-n32.d: Likewise. * gas/mips/sd-n64.d: Likewise. * gas/mips/mips32.d: Update immediates. * gas/mips/micromips@mips32-cp2.s: New test source. * gas/mips/micromips@mips32-imm.s: Likewise. * gas/mips/micromips@mips32r2-cp2.s: Likewise. * gas/mips/micromips@mips64-cp2.s: Likewise. * gas/mips/cache.s: Likewise. * gas/mips/daddi.s: Likewise. * gas/mips/mips32-imm.s: Likewise. * gas/mips/elf-rel4.s: Handle microMIPS ASE. * gas/mips/lb-pic.s: Likewise. * gas/mips/ld.s: Likewise. * gas/mips/mips32.s: Likewise. * gas/mips/mips.exp: Add the micromips arch. Exclude mips16e from micromips. Run mips32-imm. * gas/mips/jal-mask-11.d: New test. * gas/mips/jal-mask-12.d: Likewise. * gas/mips/micromips@jal-mask-11.d: Likewise. * gas/mips/jal-mask-1.s: Source for the new tests. * gas/mips/jal-mask-21.d: New test. * gas/mips/jal-mask-22.d: Likewise. * gas/mips/micromips@jal-mask-12.d: Likewise. * gas/mips/jal-mask-2.s: Source for the new tests. * gas/mips/mips.exp: Run the new tests. * gas/mips/mips16-e.d: Add --special-syms to `objdump'. * gas/mips/tmips16-e.d: Likewise. * gas/mips/mipsel16-e.d: Likewise. * gas/mips/tmipsel16-e.d: Likewise. * gas/mips/and.s: Adjust padding. * gas/mips/beq.s: Likewise. * gas/mips/bge.s: Likewise. * gas/mips/bgeu.s: Likewise. * gas/mips/blt.s: Likewise. * gas/mips/bltu.s: Likewise. * gas/mips/branch-misc-2.s: Likewise. * gas/mips/jal.s: Likewise. * gas/mips/li.s: Likewise. * gas/mips/mips4.s: Likewise. * gas/mips/mips4-fp.s: Likewise. * gas/mips/relax.s: Likewise. * gas/mips/and.d: Update accordingly. * gas/mips/elf-jal.d: Likewise. * gas/mips/jal.d: Likewise. * gas/mips/li.d: Likewise. * gas/mips/relax-at.d: Likewise. * gas/mips/relax.d: Likewise. include/elf/ 2011-02-25 Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> * mips.h (R_MICROMIPS_min): New relocations. (R_MICROMIPS_26_S1): Likewise. (R_MICROMIPS_HI16, R_MICROMIPS_LO16): Likewise. (R_MICROMIPS_GPREL16, R_MICROMIPS_LITERAL): Likewise. (R_MICROMIPS_GOT16, R_MICROMIPS_PC7_S1): Likewise. (R_MICROMIPS_PC10_S1, R_MICROMIPS_PC16_S1): Likewise. (R_MICROMIPS_CALL16, R_MICROMIPS_GOT_DISP): Likewise. (R_MICROMIPS_GOT_PAGE, R_MICROMIPS_GOT_OFST): Likewise. (R_MICROMIPS_GOT_HI16, R_MICROMIPS_GOT_LO16): Likewise. (R_MICROMIPS_SUB, R_MICROMIPS_HIGHER): Likewise. (R_MICROMIPS_HIGHEST, R_MICROMIPS_CALL_HI16): Likewise. (R_MICROMIPS_CALL_LO16, R_MICROMIPS_SCN_DISP): Likewise. (R_MICROMIPS_JALR, R_MICROMIPS_HI0_LO16): Likewise. (R_MICROMIPS_TLS_GD, R_MICROMIPS_TLS_LDM): Likewise. (R_MICROMIPS_TLS_DTPREL_HI, R_MICROMIPS_TLS_DTPREL_LO): Likewise. (R_MICROMIPS_TLS_GOTTPREL): Likewise. (R_MICROMIPS_TLS_TPREL_HI16): Likewise. (R_MICROMIPS_TLS_TPREL_LO16): Likewise. (R_MICROMIPS_GPREL7_S2, R_MICROMIPS_PC23_S2): Likewise. (R_MICROMIPS_max): Likewise. (EF_MIPS_ARCH_ASE_MICROMIPS): New macro. (STO_MIPS_ISA, STO_MIPS_FLAGS): Likewise. (ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT): Likewise. (STO_MICROMIPS): Likewise. (ELF_ST_IS_MICROMIPS, ELF_ST_SET_MICROMIPS): Likewise. (ELF_ST_IS_COMPRESSED): Likewise. (STO_MIPS_PLT, STO_MIPS_PIC): Rework. (ELF_ST_IS_MIPS_PIC, ELF_ST_SET_MIPS_PIC): Likewise. (STO_MIPS16, ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): Likewise. include/opcode/ 2011-02-25 Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> * mips.h (OP_MASK_EXTLSB, OP_SH_EXTLSB): New macros. (OP_MASK_STYPE, OP_SH_STYPE): Likewise. (OP_MASK_CODE10, OP_SH_CODE10): Likewise. (OP_MASK_TRAP, OP_SH_TRAP): Likewise. (OP_MASK_OFFSET12, OP_SH_OFFSET12): Likewise. (OP_MASK_OFFSET10, OP_SH_OFFSET10): Likewise. (OP_MASK_RS3, OP_SH_RS3): Likewise. (OP_MASK_MB, OP_SH_MB, OP_MASK_MC, OP_SH_MC): Likewise. (OP_MASK_MD, OP_SH_MD, OP_MASK_ME, OP_SH_ME): Likewise. (OP_MASK_MF, OP_SH_MF, OP_MASK_MG, OP_SH_MG): Likewise. (OP_MASK_MJ, OP_SH_MJ, OP_MASK_ML, OP_SH_ML): Likewise. (OP_MASK_MP, OP_SH_MP, OP_MASK_MQ, OP_SH_MQ): Likewise. (OP_MASK_IMMA, OP_SH_IMMA, OP_MASK_IMMB, OP_SH_IMMB): Likewise. (OP_MASK_IMMC, OP_SH_IMMC, OP_MASK_IMMF, OP_SH_IMMF): Likewise. (OP_MASK_IMMG, OP_SH_IMMG, OP_MASK_IMMH, OP_SH_IMMH): Likewise. (OP_MASK_IMMI, OP_SH_IMMI, OP_MASK_IMMJ, OP_SH_IMMJ): Likewise. (OP_MASK_IMML, OP_SH_IMML, OP_MASK_IMMM, OP_SH_IMMM): Likewise. (OP_MASK_IMMN, OP_SH_IMMN, OP_MASK_IMMO, OP_SH_IMMO): Likewise. (OP_MASK_IMMP, OP_SH_IMMP, OP_MASK_IMMQ, OP_SH_IMMQ): Likewise. (OP_MASK_IMMU, OP_SH_IMMU, OP_MASK_IMMW, OP_SH_IMMW): Likewise. (OP_MASK_IMMX, OP_SH_IMMX, OP_MASK_IMMY, OP_SH_IMMY): Likewise. (INSN_WRITE_GPR_S): New macro. (INSN2_BRANCH_DELAY_16BIT, INSN2_BRANCH_DELAY_32BIT): Likewise. (INSN2_READ_FPR_D): Likewise. (INSN2_MOD_GPR_MB, INSN2_MOD_GPR_MC): Likewise. (INSN2_MOD_GPR_MD, INSN2_MOD_GPR_ME): Likewise. (INSN2_MOD_GPR_MF, INSN2_MOD_GPR_MG): Likewise. (INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP): Likewise. (INSN2_MOD_GPR_MQ, INSN2_MOD_SP): Likewise. (INSN2_READ_GPR_31, INSN2_READ_GP, INSN2_READ_PC): Likewise. (INSN2_UNCOND_BRANCH, INSN2_COND_BRANCH): Likewise. (INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM, INSN2_MOD_GPR_MN): Likewise. (CPU_MICROMIPS): New macro. (M_BC1FL, M_BC1TL, M_BC2FL, M_BC2TL): New enum values. (M_BEQL, M_BGEZ, M_BGEZL, M_BGEZALL, M_BGTZ, M_BGTZL): Likewise. (M_BLEZ, M_BLEZL, M_BLTZ, M_BLTZL, M_BLTZALL, M_BNEL): Likewise. (M_CACHE_OB, M_JALS_1, M_JALS_2, M_JALS_A): Likewise. (M_LDC2_OB, M_LDL_OB, M_LDM_AB, M_LDM_OB): Likewise. (M_LDP_AB, M_LDP_OB, M_LDR_OB, M_LL_OB, M_LLD_OB): Likewise. (M_LWC2_OB, M_LWL_OB, M_LWM_AB, M_LWM_OB): Likewise. (M_LWP_AB, M_LWP_OB, M_LWR_OB): Likewise. (M_LWU_OB, M_PREF_OB, M_SC_OB, M_SCD_OB): Likewise. (M_SDC2_OB, M_SDL_OB, M_SDM_AB, M_SDM_OB): Likewise. (M_SDP_AB, M_SDP_OB, M_SDR_OB): Likewise. (M_SWC2_OB, M_SWL_OB, M_SWM_AB, M_SWM_OB): Likewise. (M_SWP_AB, M_SWP_OB, M_SWR_OB): Likewise. (MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): New macros. (MICROMIPSOP_MASK_IMMEDIATE, MICROMIPSOP_SH_IMMEDIATE): Likewise. (MICROMIPSOP_MASK_DELTA, MICROMIPSOP_SH_DELTA): Likewise. (MICROMIPSOP_MASK_CODE10, MICROMIPSOP_SH_CODE10): Likewise. (MICROMIPSOP_MASK_TRAP, MICROMIPSOP_SH_TRAP): Likewise. (MICROMIPSOP_MASK_SHAMT, MICROMIPSOP_SH_SHAMT): Likewise. (MICROMIPSOP_MASK_TARGET, MICROMIPSOP_SH_TARGET): Likewise. (MICROMIPSOP_MASK_EXTLSB, MICROMIPSOP_SH_EXTLSB): Likewise. (MICROMIPSOP_MASK_EXTMSBD, MICROMIPSOP_SH_EXTMSBD): Likewise. (MICROMIPSOP_MASK_INSMSB, MICROMIPSOP_SH_INSMSB): Likewise. (MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise. (MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise. (MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise. (MICROMIPSOP_MASK_SEL, MICROMIPSOP_SH_SEL): Likewise. (MICROMIPSOP_MASK_OFFSET12, MICROMIPSOP_SH_OFFSET12): Likewise. (MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): Likewise. (MICROMIPSOP_MASK_STYPE, MICROMIPSOP_SH_STYPE): Likewise. (MICROMIPSOP_MASK_OFFSET10, MICROMIPSOP_SH_OFFSET10): Likewise. (MICROMIPSOP_MASK_RS, MICROMIPSOP_SH_RS): Likewise. (MICROMIPSOP_MASK_RT, MICROMIPSOP_SH_RT): Likewise. (MICROMIPSOP_MASK_RD, MICROMIPSOP_SH_RD): Likewise. (MICROMIPSOP_MASK_FS, MICROMIPSOP_SH_FS): Likewise. (MICROMIPSOP_MASK_FT, MICROMIPSOP_SH_FT): Likewise. (MICROMIPSOP_MASK_FD, MICROMIPSOP_SH_FD): Likewise. (MICROMIPSOP_MASK_FR, MICROMIPSOP_SH_FR): Likewise. (MICROMIPSOP_MASK_RS3, MICROMIPSOP_SH_RS3): Likewise. (MICROMIPSOP_MASK_PREFX, MICROMIPSOP_SH_PREFX): Likewise. (MICROMIPSOP_MASK_BCC, MICROMIPSOP_SH_BCC): Likewise. (MICROMIPSOP_MASK_CCC, MICROMIPSOP_SH_CCC): Likewise. (MICROMIPSOP_MASK_COPZ, MICROMIPSOP_SH_COPZ): Likewise. (MICROMIPSOP_MASK_MB, MICROMIPSOP_SH_MB): Likewise. (MICROMIPSOP_MASK_MC, MICROMIPSOP_SH_MC): Likewise. (MICROMIPSOP_MASK_MD, MICROMIPSOP_SH_MD): Likewise. (MICROMIPSOP_MASK_ME, MICROMIPSOP_SH_ME): Likewise. (MICROMIPSOP_MASK_MF, MICROMIPSOP_SH_MF): Likewise. (MICROMIPSOP_MASK_MG, MICROMIPSOP_SH_MG): Likewise. (MICROMIPSOP_MASK_MH, MICROMIPSOP_SH_MH): Likewise. (MICROMIPSOP_MASK_MI, MICROMIPSOP_SH_MI): Likewise. (MICROMIPSOP_MASK_MJ, MICROMIPSOP_SH_MJ): Likewise. (MICROMIPSOP_MASK_ML, MICROMIPSOP_SH_ML): Likewise. (MICROMIPSOP_MASK_MM, MICROMIPSOP_SH_MM): Likewise. (MICROMIPSOP_MASK_MN, MICROMIPSOP_SH_MN): Likewise. (MICROMIPSOP_MASK_MP, MICROMIPSOP_SH_MP): Likewise. (MICROMIPSOP_MASK_MQ, MICROMIPSOP_SH_MQ): Likewise. (MICROMIPSOP_MASK_IMMA, MICROMIPSOP_SH_IMMA): Likewise. (MICROMIPSOP_MASK_IMMB, MICROMIPSOP_SH_IMMB): Likewise. (MICROMIPSOP_MASK_IMMC, MICROMIPSOP_SH_IMMC): Likewise. (MICROMIPSOP_MASK_IMMD, MICROMIPSOP_SH_IMMD): Likewise. (MICROMIPSOP_MASK_IMME, MICROMIPSOP_SH_IMME): Likewise. (MICROMIPSOP_MASK_IMMF, MICROMIPSOP_SH_IMMF): Likewise. (MICROMIPSOP_MASK_IMMG, MICROMIPSOP_SH_IMMG): Likewise. (MICROMIPSOP_MASK_IMMH, MICROMIPSOP_SH_IMMH): Likewise. (MICROMIPSOP_MASK_IMMI, MICROMIPSOP_SH_IMMI): Likewise. (MICROMIPSOP_MASK_IMMJ, MICROMIPSOP_SH_IMMJ): Likewise. (MICROMIPSOP_MASK_IMML, MICROMIPSOP_SH_IMML): Likewise. (MICROMIPSOP_MASK_IMMM, MICROMIPSOP_SH_IMMM): Likewise. (MICROMIPSOP_MASK_IMMN, MICROMIPSOP_SH_IMMN): Likewise. (MICROMIPSOP_MASK_IMMO, MICROMIPSOP_SH_IMMO): Likewise. (MICROMIPSOP_MASK_IMMP, MICROMIPSOP_SH_IMMP): Likewise. (MICROMIPSOP_MASK_IMMQ, MICROMIPSOP_SH_IMMQ): Likewise. (MICROMIPSOP_MASK_IMMU, MICROMIPSOP_SH_IMMU): Likewise. (MICROMIPSOP_MASK_IMMW, MICROMIPSOP_SH_IMMW): Likewise. (MICROMIPSOP_MASK_IMMX, MICROMIPSOP_SH_IMMX): Likewise. (MICROMIPSOP_MASK_IMMY, MICROMIPSOP_SH_IMMY): Likewise. (MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise. (MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise. (MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise. (MICROMIPSOP_MASK_CODE20, MICROMIPSOP_SH_CODE20): Likewise. (MICROMIPSOP_MASK_PERFREG, MICROMIPSOP_SH_PERFREG): Likewise. (MICROMIPSOP_MASK_CODE19, MICROMIPSOP_SH_CODE19): Likewise. (MICROMIPSOP_MASK_ALN, MICROMIPSOP_SH_ALN): Likewise. (MICROMIPSOP_MASK_VECBYTE, MICROMIPSOP_SH_VECBYTE): Likewise. (MICROMIPSOP_MASK_VECALIGN, MICROMIPSOP_SH_VECALIGN): Likewise. (MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Likewise. (MICROMIPSOP_MASK_DSPACC_S, MICROMIPSOP_SH_DSPACC_S): Likewise. (MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise. (MICROMIPSOP_MASK_DSPSFT_7, MICROMIPSOP_SH_DSPSFT_7): Likewise. (MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise. (MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise. (MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise. (MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise. (MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise. (MICROMIPSOP_MASK_RDDSP, MICROMIPSOP_SH_RDDSP): Likewise. (MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise. (MICROMIPSOP_MASK_MT_U, MICROMIPSOP_SH_MT_U): Likewise. (MICROMIPSOP_MASK_MT_H, MICROMIPSOP_SH_MT_H): Likewise. (MICROMIPSOP_MASK_MTACC_T, MICROMIPSOP_SH_MTACC_T): Likewise. (MICROMIPSOP_MASK_MTACC_D, MICROMIPSOP_SH_MTACC_D): Likewise. (MICROMIPSOP_MASK_BBITIND, MICROMIPSOP_SH_BBITIND): Likewise. (MICROMIPSOP_MASK_CINSPOS, MICROMIPSOP_SH_CINSPOS): Likewise. (MICROMIPSOP_MASK_CINSLM1, MICROMIPSOP_SH_CINSLM1): Likewise. (MICROMIPSOP_MASK_SEQI, MICROMIPSOP_SH_SEQI): Likewise. (micromips_opcodes): New declaration. (bfd_micromips_num_opcodes): Likewise. ld/testsuite/ 2011-02-25 Catherine Moore <clm@codesourcery.com> Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> * lib/ld-lib.exp (run_dump_test): Support distinct assembler flags for the same source named multiple times. * ld-mips-elf/jalx-1.s: New test source. * ld-mips-elf/jalx-1.d: New test output. * ld-mips-elf/jalx-1.ld: New test linker script. * ld-mips-elf/jalx-2-main.s: New test source. * ld-mips-elf/jalx-2-ex.s: Likewise. * ld-mips-elf/jalx-2-printf.s: Likewise. * ld-mips-elf/jalx-2.dd: New test output. * ld-mips-elf/jalx-2.ld: New test linker script. * ld-mips-elf/mips16-and-micromips.d: New test. * ld-mips-elf/mips-elf.exp: Run the new tests opcodes/ 2011-02-25 Chao-ying Fu <fu@mips.com> Maciej W. Rozycki <macro@codesourcery.com> * micromips-opc.c: New file. * mips-dis.c (micromips_to_32_reg_b_map): New array. (micromips_to_32_reg_c_map, micromips_to_32_reg_d_map): Likewise. (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map): Likewise. (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map): Likewise. (micromips_to_32_reg_q_map): Likewise. (micromips_imm_b_map, micromips_imm_c_map): Likewise. (micromips_ase): New variable. (is_micromips): New function. (set_default_mips_dis_options): Handle microMIPS ASE. (print_insn_micromips): New function. (is_compressed_mode_p): Likewise. (_print_insn_mips): Handle microMIPS instructions. * Makefile.am (CFILES): Add micromips-opc.c. * configure.in (bfd_mips_arch): Add micromips-opc.lo. * Makefile.in: Regenerate. * configure: Regenerate. * mips-dis.c (micromips_to_32_reg_h_map): New variable. (micromips_to_32_reg_i_map): Likewise. (micromips_to_32_reg_m_map): Likewise. (micromips_to_32_reg_n_map): New macro.
1300 lines
36 KiB
C
1300 lines
36 KiB
C
/* BFD library support routines for architectures.
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Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
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2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
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Free Software Foundation, Inc.
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Hacked by John Gilmore and Steve Chamberlain of Cygnus Support.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "bfd.h"
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#include "libbfd.h"
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#include "safe-ctype.h"
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/*
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SECTION
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Architectures
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BFD keeps one atom in a BFD describing the
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architecture of the data attached to the BFD: a pointer to a
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<<bfd_arch_info_type>>.
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Pointers to structures can be requested independently of a BFD
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so that an architecture's information can be interrogated
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without access to an open BFD.
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The architecture information is provided by each architecture package.
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The set of default architectures is selected by the macro
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<<SELECT_ARCHITECTURES>>. This is normally set up in the
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@file{config/@var{target}.mt} file of your choice. If the name is not
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defined, then all the architectures supported are included.
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When BFD starts up, all the architectures are called with an
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initialize method. It is up to the architecture back end to
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insert as many items into the list of architectures as it wants to;
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generally this would be one for each machine and one for the
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default case (an item with a machine field of 0).
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BFD's idea of an architecture is implemented in @file{archures.c}.
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*/
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/*
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SUBSECTION
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bfd_architecture
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DESCRIPTION
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This enum gives the object file's CPU architecture, in a
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global sense---i.e., what processor family does it belong to?
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Another field indicates which processor within
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the family is in use. The machine gives a number which
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distinguishes different versions of the architecture,
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containing, for example, 2 and 3 for Intel i960 KA and i960 KB,
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and 68020 and 68030 for Motorola 68020 and 68030.
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.enum bfd_architecture
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.{
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. bfd_arch_unknown, {* File arch not known. *}
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. bfd_arch_obscure, {* Arch known, not one of these. *}
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. bfd_arch_m68k, {* Motorola 68xxx *}
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.#define bfd_mach_m68000 1
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.#define bfd_mach_m68008 2
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.#define bfd_mach_m68010 3
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.#define bfd_mach_m68020 4
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.#define bfd_mach_m68030 5
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.#define bfd_mach_m68040 6
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.#define bfd_mach_m68060 7
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.#define bfd_mach_cpu32 8
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.#define bfd_mach_fido 9
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.#define bfd_mach_mcf_isa_a_nodiv 10
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.#define bfd_mach_mcf_isa_a 11
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.#define bfd_mach_mcf_isa_a_mac 12
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.#define bfd_mach_mcf_isa_a_emac 13
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.#define bfd_mach_mcf_isa_aplus 14
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.#define bfd_mach_mcf_isa_aplus_mac 15
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.#define bfd_mach_mcf_isa_aplus_emac 16
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.#define bfd_mach_mcf_isa_b_nousp 17
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.#define bfd_mach_mcf_isa_b_nousp_mac 18
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.#define bfd_mach_mcf_isa_b_nousp_emac 19
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.#define bfd_mach_mcf_isa_b 20
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.#define bfd_mach_mcf_isa_b_mac 21
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.#define bfd_mach_mcf_isa_b_emac 22
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.#define bfd_mach_mcf_isa_b_float 23
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.#define bfd_mach_mcf_isa_b_float_mac 24
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.#define bfd_mach_mcf_isa_b_float_emac 25
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.#define bfd_mach_mcf_isa_c 26
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.#define bfd_mach_mcf_isa_c_mac 27
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.#define bfd_mach_mcf_isa_c_emac 28
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.#define bfd_mach_mcf_isa_c_nodiv 29
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.#define bfd_mach_mcf_isa_c_nodiv_mac 30
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.#define bfd_mach_mcf_isa_c_nodiv_emac 31
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. bfd_arch_vax, {* DEC Vax *}
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. bfd_arch_i960, {* Intel 960 *}
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. {* The order of the following is important.
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. lower number indicates a machine type that
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. only accepts a subset of the instructions
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. available to machines with higher numbers.
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. The exception is the "ca", which is
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. incompatible with all other machines except
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. "core". *}
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.
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.#define bfd_mach_i960_core 1
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.#define bfd_mach_i960_ka_sa 2
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.#define bfd_mach_i960_kb_sb 3
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.#define bfd_mach_i960_mc 4
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.#define bfd_mach_i960_xa 5
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.#define bfd_mach_i960_ca 6
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.#define bfd_mach_i960_jx 7
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.#define bfd_mach_i960_hx 8
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.
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. bfd_arch_or32, {* OpenRISC 32 *}
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.
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. bfd_arch_sparc, {* SPARC *}
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.#define bfd_mach_sparc 1
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.{* The difference between v8plus and v9 is that v9 is a true 64 bit env. *}
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.#define bfd_mach_sparc_sparclet 2
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.#define bfd_mach_sparc_sparclite 3
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.#define bfd_mach_sparc_v8plus 4
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.#define bfd_mach_sparc_v8plusa 5 {* with ultrasparc add'ns. *}
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.#define bfd_mach_sparc_sparclite_le 6
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.#define bfd_mach_sparc_v9 7
|
|
.#define bfd_mach_sparc_v9a 8 {* with ultrasparc add'ns. *}
|
|
.#define bfd_mach_sparc_v8plusb 9 {* with cheetah add'ns. *}
|
|
.#define bfd_mach_sparc_v9b 10 {* with cheetah add'ns. *}
|
|
.{* Nonzero if MACH has the v9 instruction set. *}
|
|
.#define bfd_mach_sparc_v9_p(mach) \
|
|
. ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
|
|
. && (mach) != bfd_mach_sparc_sparclite_le)
|
|
.{* Nonzero if MACH is a 64 bit sparc architecture. *}
|
|
.#define bfd_mach_sparc_64bit_p(mach) \
|
|
. ((mach) >= bfd_mach_sparc_v9 && (mach) != bfd_mach_sparc_v8plusb)
|
|
. bfd_arch_spu, {* PowerPC SPU *}
|
|
.#define bfd_mach_spu 256
|
|
. bfd_arch_mips, {* MIPS Rxxxx *}
|
|
.#define bfd_mach_mips3000 3000
|
|
.#define bfd_mach_mips3900 3900
|
|
.#define bfd_mach_mips4000 4000
|
|
.#define bfd_mach_mips4010 4010
|
|
.#define bfd_mach_mips4100 4100
|
|
.#define bfd_mach_mips4111 4111
|
|
.#define bfd_mach_mips4120 4120
|
|
.#define bfd_mach_mips4300 4300
|
|
.#define bfd_mach_mips4400 4400
|
|
.#define bfd_mach_mips4600 4600
|
|
.#define bfd_mach_mips4650 4650
|
|
.#define bfd_mach_mips5000 5000
|
|
.#define bfd_mach_mips5400 5400
|
|
.#define bfd_mach_mips5500 5500
|
|
.#define bfd_mach_mips6000 6000
|
|
.#define bfd_mach_mips7000 7000
|
|
.#define bfd_mach_mips8000 8000
|
|
.#define bfd_mach_mips9000 9000
|
|
.#define bfd_mach_mips10000 10000
|
|
.#define bfd_mach_mips12000 12000
|
|
.#define bfd_mach_mips14000 14000
|
|
.#define bfd_mach_mips16000 16000
|
|
.#define bfd_mach_mips16 16
|
|
.#define bfd_mach_mips5 5
|
|
.#define bfd_mach_mips_loongson_2e 3001
|
|
.#define bfd_mach_mips_loongson_2f 3002
|
|
.#define bfd_mach_mips_loongson_3a 3003
|
|
.#define bfd_mach_mips_sb1 12310201 {* octal 'SB', 01 *}
|
|
.#define bfd_mach_mips_octeon 6501
|
|
.#define bfd_mach_mips_xlr 887682 {* decimal 'XLR' *}
|
|
.#define bfd_mach_mipsisa32 32
|
|
.#define bfd_mach_mipsisa32r2 33
|
|
.#define bfd_mach_mipsisa64 64
|
|
.#define bfd_mach_mipsisa64r2 65
|
|
.#define bfd_mach_mips_micromips 96
|
|
. bfd_arch_i386, {* Intel 386 *}
|
|
.#define bfd_mach_i386_i386 1
|
|
.#define bfd_mach_i386_i8086 2
|
|
.#define bfd_mach_i386_i386_intel_syntax 3
|
|
.#define bfd_mach_x64_32 32
|
|
.#define bfd_mach_x64_32_intel_syntax 33
|
|
.#define bfd_mach_x86_64 64
|
|
.#define bfd_mach_x86_64_intel_syntax 65
|
|
. bfd_arch_l1om, {* Intel L1OM *}
|
|
.#define bfd_mach_l1om 66
|
|
.#define bfd_mach_l1om_intel_syntax 67
|
|
. bfd_arch_k1om, {* Intel K1OM *}
|
|
.#define bfd_mach_k1om 68
|
|
.#define bfd_mach_k1om_intel_syntax 69
|
|
. bfd_arch_we32k, {* AT&T WE32xxx *}
|
|
. bfd_arch_tahoe, {* CCI/Harris Tahoe *}
|
|
. bfd_arch_i860, {* Intel 860 *}
|
|
. bfd_arch_i370, {* IBM 360/370 Mainframes *}
|
|
. bfd_arch_romp, {* IBM ROMP PC/RT *}
|
|
. bfd_arch_convex, {* Convex *}
|
|
. bfd_arch_m88k, {* Motorola 88xxx *}
|
|
. bfd_arch_m98k, {* Motorola 98xxx *}
|
|
. bfd_arch_pyramid, {* Pyramid Technology *}
|
|
. bfd_arch_h8300, {* Renesas H8/300 (formerly Hitachi H8/300) *}
|
|
.#define bfd_mach_h8300 1
|
|
.#define bfd_mach_h8300h 2
|
|
.#define bfd_mach_h8300s 3
|
|
.#define bfd_mach_h8300hn 4
|
|
.#define bfd_mach_h8300sn 5
|
|
.#define bfd_mach_h8300sx 6
|
|
.#define bfd_mach_h8300sxn 7
|
|
. bfd_arch_pdp11, {* DEC PDP-11 *}
|
|
. bfd_arch_plugin,
|
|
. bfd_arch_powerpc, {* PowerPC *}
|
|
.#define bfd_mach_ppc 32
|
|
.#define bfd_mach_ppc64 64
|
|
.#define bfd_mach_ppc_403 403
|
|
.#define bfd_mach_ppc_403gc 4030
|
|
.#define bfd_mach_ppc_405 405
|
|
.#define bfd_mach_ppc_505 505
|
|
.#define bfd_mach_ppc_601 601
|
|
.#define bfd_mach_ppc_602 602
|
|
.#define bfd_mach_ppc_603 603
|
|
.#define bfd_mach_ppc_ec603e 6031
|
|
.#define bfd_mach_ppc_604 604
|
|
.#define bfd_mach_ppc_620 620
|
|
.#define bfd_mach_ppc_630 630
|
|
.#define bfd_mach_ppc_750 750
|
|
.#define bfd_mach_ppc_860 860
|
|
.#define bfd_mach_ppc_a35 35
|
|
.#define bfd_mach_ppc_rs64ii 642
|
|
.#define bfd_mach_ppc_rs64iii 643
|
|
.#define bfd_mach_ppc_7400 7400
|
|
.#define bfd_mach_ppc_e500 500
|
|
.#define bfd_mach_ppc_e500mc 5001
|
|
.#define bfd_mach_ppc_e500mc64 5005
|
|
.#define bfd_mach_ppc_titan 83
|
|
. bfd_arch_rs6000, {* IBM RS/6000 *}
|
|
.#define bfd_mach_rs6k 6000
|
|
.#define bfd_mach_rs6k_rs1 6001
|
|
.#define bfd_mach_rs6k_rsc 6003
|
|
.#define bfd_mach_rs6k_rs2 6002
|
|
. bfd_arch_hppa, {* HP PA RISC *}
|
|
.#define bfd_mach_hppa10 10
|
|
.#define bfd_mach_hppa11 11
|
|
.#define bfd_mach_hppa20 20
|
|
.#define bfd_mach_hppa20w 25
|
|
. bfd_arch_d10v, {* Mitsubishi D10V *}
|
|
.#define bfd_mach_d10v 1
|
|
.#define bfd_mach_d10v_ts2 2
|
|
.#define bfd_mach_d10v_ts3 3
|
|
. bfd_arch_d30v, {* Mitsubishi D30V *}
|
|
. bfd_arch_dlx, {* DLX *}
|
|
. bfd_arch_m68hc11, {* Motorola 68HC11 *}
|
|
. bfd_arch_m68hc12, {* Motorola 68HC12 *}
|
|
.#define bfd_mach_m6812_default 0
|
|
.#define bfd_mach_m6812 1
|
|
.#define bfd_mach_m6812s 2
|
|
. bfd_arch_z8k, {* Zilog Z8000 *}
|
|
.#define bfd_mach_z8001 1
|
|
.#define bfd_mach_z8002 2
|
|
. bfd_arch_h8500, {* Renesas H8/500 (formerly Hitachi H8/500) *}
|
|
. bfd_arch_sh, {* Renesas / SuperH SH (formerly Hitachi SH) *}
|
|
.#define bfd_mach_sh 1
|
|
.#define bfd_mach_sh2 0x20
|
|
.#define bfd_mach_sh_dsp 0x2d
|
|
.#define bfd_mach_sh2a 0x2a
|
|
.#define bfd_mach_sh2a_nofpu 0x2b
|
|
.#define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1
|
|
.#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2
|
|
.#define bfd_mach_sh2a_or_sh4 0x2a3
|
|
.#define bfd_mach_sh2a_or_sh3e 0x2a4
|
|
.#define bfd_mach_sh2e 0x2e
|
|
.#define bfd_mach_sh3 0x30
|
|
.#define bfd_mach_sh3_nommu 0x31
|
|
.#define bfd_mach_sh3_dsp 0x3d
|
|
.#define bfd_mach_sh3e 0x3e
|
|
.#define bfd_mach_sh4 0x40
|
|
.#define bfd_mach_sh4_nofpu 0x41
|
|
.#define bfd_mach_sh4_nommu_nofpu 0x42
|
|
.#define bfd_mach_sh4a 0x4a
|
|
.#define bfd_mach_sh4a_nofpu 0x4b
|
|
.#define bfd_mach_sh4al_dsp 0x4d
|
|
.#define bfd_mach_sh5 0x50
|
|
. bfd_arch_alpha, {* Dec Alpha *}
|
|
.#define bfd_mach_alpha_ev4 0x10
|
|
.#define bfd_mach_alpha_ev5 0x20
|
|
.#define bfd_mach_alpha_ev6 0x30
|
|
. bfd_arch_arm, {* Advanced Risc Machines ARM. *}
|
|
.#define bfd_mach_arm_unknown 0
|
|
.#define bfd_mach_arm_2 1
|
|
.#define bfd_mach_arm_2a 2
|
|
.#define bfd_mach_arm_3 3
|
|
.#define bfd_mach_arm_3M 4
|
|
.#define bfd_mach_arm_4 5
|
|
.#define bfd_mach_arm_4T 6
|
|
.#define bfd_mach_arm_5 7
|
|
.#define bfd_mach_arm_5T 8
|
|
.#define bfd_mach_arm_5TE 9
|
|
.#define bfd_mach_arm_XScale 10
|
|
.#define bfd_mach_arm_ep9312 11
|
|
.#define bfd_mach_arm_iWMMXt 12
|
|
.#define bfd_mach_arm_iWMMXt2 13
|
|
. bfd_arch_ns32k, {* National Semiconductors ns32000 *}
|
|
. bfd_arch_w65, {* WDC 65816 *}
|
|
. bfd_arch_tic30, {* Texas Instruments TMS320C30 *}
|
|
. bfd_arch_tic4x, {* Texas Instruments TMS320C3X/4X *}
|
|
.#define bfd_mach_tic3x 30
|
|
.#define bfd_mach_tic4x 40
|
|
. bfd_arch_tic54x, {* Texas Instruments TMS320C54X *}
|
|
. bfd_arch_tic6x, {* Texas Instruments TMS320C6X *}
|
|
. bfd_arch_tic80, {* TI TMS320c80 (MVP) *}
|
|
. bfd_arch_v850, {* NEC V850 *}
|
|
.#define bfd_mach_v850 1
|
|
.#define bfd_mach_v850e 'E'
|
|
.#define bfd_mach_v850e1 '1'
|
|
.#define bfd_mach_v850e2 0x4532
|
|
.#define bfd_mach_v850e2v3 0x45325633
|
|
. bfd_arch_arc, {* ARC Cores *}
|
|
.#define bfd_mach_arc_5 5
|
|
.#define bfd_mach_arc_6 6
|
|
.#define bfd_mach_arc_7 7
|
|
.#define bfd_mach_arc_8 8
|
|
. bfd_arch_m32c, {* Renesas M16C/M32C. *}
|
|
.#define bfd_mach_m16c 0x75
|
|
.#define bfd_mach_m32c 0x78
|
|
. bfd_arch_m32r, {* Renesas M32R (formerly Mitsubishi M32R/D) *}
|
|
.#define bfd_mach_m32r 1 {* For backwards compatibility. *}
|
|
.#define bfd_mach_m32rx 'x'
|
|
.#define bfd_mach_m32r2 '2'
|
|
. bfd_arch_mn10200, {* Matsushita MN10200 *}
|
|
. bfd_arch_mn10300, {* Matsushita MN10300 *}
|
|
.#define bfd_mach_mn10300 300
|
|
.#define bfd_mach_am33 330
|
|
.#define bfd_mach_am33_2 332
|
|
. bfd_arch_fr30,
|
|
.#define bfd_mach_fr30 0x46523330
|
|
. bfd_arch_frv,
|
|
.#define bfd_mach_frv 1
|
|
.#define bfd_mach_frvsimple 2
|
|
.#define bfd_mach_fr300 300
|
|
.#define bfd_mach_fr400 400
|
|
.#define bfd_mach_fr450 450
|
|
.#define bfd_mach_frvtomcat 499 {* fr500 prototype *}
|
|
.#define bfd_mach_fr500 500
|
|
.#define bfd_mach_fr550 550
|
|
. bfd_arch_moxie, {* The moxie processor *}
|
|
.#define bfd_mach_moxie 1
|
|
. bfd_arch_mcore,
|
|
. bfd_arch_mep,
|
|
.#define bfd_mach_mep 1
|
|
.#define bfd_mach_mep_h1 0x6831
|
|
.#define bfd_mach_mep_c5 0x6335
|
|
. bfd_arch_ia64, {* HP/Intel ia64 *}
|
|
.#define bfd_mach_ia64_elf64 64
|
|
.#define bfd_mach_ia64_elf32 32
|
|
. bfd_arch_ip2k, {* Ubicom IP2K microcontrollers. *}
|
|
.#define bfd_mach_ip2022 1
|
|
.#define bfd_mach_ip2022ext 2
|
|
. bfd_arch_iq2000, {* Vitesse IQ2000. *}
|
|
.#define bfd_mach_iq2000 1
|
|
.#define bfd_mach_iq10 2
|
|
. bfd_arch_mt,
|
|
.#define bfd_mach_ms1 1
|
|
.#define bfd_mach_mrisc2 2
|
|
.#define bfd_mach_ms2 3
|
|
. bfd_arch_pj,
|
|
. bfd_arch_avr, {* Atmel AVR microcontrollers. *}
|
|
.#define bfd_mach_avr1 1
|
|
.#define bfd_mach_avr2 2
|
|
.#define bfd_mach_avr25 25
|
|
.#define bfd_mach_avr3 3
|
|
.#define bfd_mach_avr31 31
|
|
.#define bfd_mach_avr35 35
|
|
.#define bfd_mach_avr4 4
|
|
.#define bfd_mach_avr5 5
|
|
.#define bfd_mach_avr51 51
|
|
.#define bfd_mach_avr6 6
|
|
.#define bfd_mach_avrxmega1 101
|
|
.#define bfd_mach_avrxmega2 102
|
|
.#define bfd_mach_avrxmega3 103
|
|
.#define bfd_mach_avrxmega4 104
|
|
.#define bfd_mach_avrxmega5 105
|
|
.#define bfd_mach_avrxmega6 106
|
|
.#define bfd_mach_avrxmega7 107
|
|
. bfd_arch_bfin, {* ADI Blackfin *}
|
|
.#define bfd_mach_bfin 1
|
|
. bfd_arch_cr16, {* National Semiconductor CompactRISC (ie CR16). *}
|
|
.#define bfd_mach_cr16 1
|
|
. bfd_arch_cr16c, {* National Semiconductor CompactRISC. *}
|
|
.#define bfd_mach_cr16c 1
|
|
. bfd_arch_crx, {* National Semiconductor CRX. *}
|
|
.#define bfd_mach_crx 1
|
|
. bfd_arch_cris, {* Axis CRIS *}
|
|
.#define bfd_mach_cris_v0_v10 255
|
|
.#define bfd_mach_cris_v32 32
|
|
.#define bfd_mach_cris_v10_v32 1032
|
|
. bfd_arch_rx, {* Renesas RX. *}
|
|
.#define bfd_mach_rx 0x75
|
|
. bfd_arch_s390, {* IBM s390 *}
|
|
.#define bfd_mach_s390_31 31
|
|
.#define bfd_mach_s390_64 64
|
|
. bfd_arch_score, {* Sunplus score *}
|
|
.#define bfd_mach_score3 3
|
|
.#define bfd_mach_score7 7
|
|
. bfd_arch_openrisc, {* OpenRISC *}
|
|
. bfd_arch_mmix, {* Donald Knuth's educational processor. *}
|
|
. bfd_arch_xstormy16,
|
|
.#define bfd_mach_xstormy16 1
|
|
. bfd_arch_msp430, {* Texas Instruments MSP430 architecture. *}
|
|
.#define bfd_mach_msp11 11
|
|
.#define bfd_mach_msp110 110
|
|
.#define bfd_mach_msp12 12
|
|
.#define bfd_mach_msp13 13
|
|
.#define bfd_mach_msp14 14
|
|
.#define bfd_mach_msp15 15
|
|
.#define bfd_mach_msp16 16
|
|
.#define bfd_mach_msp21 21
|
|
.#define bfd_mach_msp31 31
|
|
.#define bfd_mach_msp32 32
|
|
.#define bfd_mach_msp33 33
|
|
.#define bfd_mach_msp41 41
|
|
.#define bfd_mach_msp42 42
|
|
.#define bfd_mach_msp43 43
|
|
.#define bfd_mach_msp44 44
|
|
. bfd_arch_xc16x, {* Infineon's XC16X Series. *}
|
|
.#define bfd_mach_xc16x 1
|
|
.#define bfd_mach_xc16xl 2
|
|
.#define bfd_mach_xc16xs 3
|
|
. bfd_arch_xtensa, {* Tensilica's Xtensa cores. *}
|
|
.#define bfd_mach_xtensa 1
|
|
. bfd_arch_z80,
|
|
.#define bfd_mach_z80strict 1 {* No undocumented opcodes. *}
|
|
.#define bfd_mach_z80 3 {* With ixl, ixh, iyl, and iyh. *}
|
|
.#define bfd_mach_z80full 7 {* All undocumented instructions. *}
|
|
.#define bfd_mach_r800 11 {* R800: successor with multiplication. *}
|
|
. bfd_arch_lm32, {* Lattice Mico32 *}
|
|
.#define bfd_mach_lm32 1
|
|
. bfd_arch_microblaze,{* Xilinx MicroBlaze. *}
|
|
. bfd_arch_tilepro, {* Tilera TILEPro *}
|
|
. bfd_arch_tilegx, {* Tilera TILE-Gx *}
|
|
.#define bfd_mach_tilepro 1
|
|
.#define bfd_mach_tilegx 1
|
|
. bfd_arch_last
|
|
. };
|
|
*/
|
|
|
|
/*
|
|
SUBSECTION
|
|
bfd_arch_info
|
|
|
|
DESCRIPTION
|
|
This structure contains information on architectures for use
|
|
within BFD.
|
|
|
|
.
|
|
.typedef struct bfd_arch_info
|
|
.{
|
|
. int bits_per_word;
|
|
. int bits_per_address;
|
|
. int bits_per_byte;
|
|
. enum bfd_architecture arch;
|
|
. unsigned long mach;
|
|
. const char *arch_name;
|
|
. const char *printable_name;
|
|
. unsigned int section_align_power;
|
|
. {* TRUE if this is the default machine for the architecture.
|
|
. The default arch should be the first entry for an arch so that
|
|
. all the entries for that arch can be accessed via <<next>>. *}
|
|
. bfd_boolean the_default;
|
|
. const struct bfd_arch_info * (*compatible)
|
|
. (const struct bfd_arch_info *a, const struct bfd_arch_info *b);
|
|
.
|
|
. bfd_boolean (*scan) (const struct bfd_arch_info *, const char *);
|
|
.
|
|
. const struct bfd_arch_info *next;
|
|
.}
|
|
.bfd_arch_info_type;
|
|
.
|
|
*/
|
|
|
|
extern const bfd_arch_info_type bfd_alpha_arch;
|
|
extern const bfd_arch_info_type bfd_arc_arch;
|
|
extern const bfd_arch_info_type bfd_arm_arch;
|
|
extern const bfd_arch_info_type bfd_avr_arch;
|
|
extern const bfd_arch_info_type bfd_bfin_arch;
|
|
extern const bfd_arch_info_type bfd_cr16_arch;
|
|
extern const bfd_arch_info_type bfd_cr16c_arch;
|
|
extern const bfd_arch_info_type bfd_cris_arch;
|
|
extern const bfd_arch_info_type bfd_crx_arch;
|
|
extern const bfd_arch_info_type bfd_d10v_arch;
|
|
extern const bfd_arch_info_type bfd_d30v_arch;
|
|
extern const bfd_arch_info_type bfd_dlx_arch;
|
|
extern const bfd_arch_info_type bfd_fr30_arch;
|
|
extern const bfd_arch_info_type bfd_frv_arch;
|
|
extern const bfd_arch_info_type bfd_h8300_arch;
|
|
extern const bfd_arch_info_type bfd_h8500_arch;
|
|
extern const bfd_arch_info_type bfd_hppa_arch;
|
|
extern const bfd_arch_info_type bfd_i370_arch;
|
|
extern const bfd_arch_info_type bfd_i386_arch;
|
|
extern const bfd_arch_info_type bfd_i860_arch;
|
|
extern const bfd_arch_info_type bfd_i960_arch;
|
|
extern const bfd_arch_info_type bfd_ia64_arch;
|
|
extern const bfd_arch_info_type bfd_ip2k_arch;
|
|
extern const bfd_arch_info_type bfd_iq2000_arch;
|
|
extern const bfd_arch_info_type bfd_k1om_arch;
|
|
extern const bfd_arch_info_type bfd_l1om_arch;
|
|
extern const bfd_arch_info_type bfd_lm32_arch;
|
|
extern const bfd_arch_info_type bfd_m32c_arch;
|
|
extern const bfd_arch_info_type bfd_m32r_arch;
|
|
extern const bfd_arch_info_type bfd_m68hc11_arch;
|
|
extern const bfd_arch_info_type bfd_m68hc12_arch;
|
|
extern const bfd_arch_info_type bfd_m68k_arch;
|
|
extern const bfd_arch_info_type bfd_m88k_arch;
|
|
extern const bfd_arch_info_type bfd_mcore_arch;
|
|
extern const bfd_arch_info_type bfd_mep_arch;
|
|
extern const bfd_arch_info_type bfd_mips_arch;
|
|
extern const bfd_arch_info_type bfd_microblaze_arch;
|
|
extern const bfd_arch_info_type bfd_mmix_arch;
|
|
extern const bfd_arch_info_type bfd_mn10200_arch;
|
|
extern const bfd_arch_info_type bfd_mn10300_arch;
|
|
extern const bfd_arch_info_type bfd_moxie_arch;
|
|
extern const bfd_arch_info_type bfd_msp430_arch;
|
|
extern const bfd_arch_info_type bfd_mt_arch;
|
|
extern const bfd_arch_info_type bfd_ns32k_arch;
|
|
extern const bfd_arch_info_type bfd_openrisc_arch;
|
|
extern const bfd_arch_info_type bfd_or32_arch;
|
|
extern const bfd_arch_info_type bfd_pdp11_arch;
|
|
extern const bfd_arch_info_type bfd_pj_arch;
|
|
extern const bfd_arch_info_type bfd_plugin_arch;
|
|
extern const bfd_arch_info_type bfd_powerpc_archs[];
|
|
#define bfd_powerpc_arch bfd_powerpc_archs[0]
|
|
extern const bfd_arch_info_type bfd_rs6000_arch;
|
|
extern const bfd_arch_info_type bfd_rx_arch;
|
|
extern const bfd_arch_info_type bfd_s390_arch;
|
|
extern const bfd_arch_info_type bfd_score_arch;
|
|
extern const bfd_arch_info_type bfd_sh_arch;
|
|
extern const bfd_arch_info_type bfd_sparc_arch;
|
|
extern const bfd_arch_info_type bfd_spu_arch;
|
|
extern const bfd_arch_info_type bfd_tic30_arch;
|
|
extern const bfd_arch_info_type bfd_tic4x_arch;
|
|
extern const bfd_arch_info_type bfd_tic54x_arch;
|
|
extern const bfd_arch_info_type bfd_tic6x_arch;
|
|
extern const bfd_arch_info_type bfd_tic80_arch;
|
|
extern const bfd_arch_info_type bfd_tilegx_arch;
|
|
extern const bfd_arch_info_type bfd_tilepro_arch;
|
|
extern const bfd_arch_info_type bfd_v850_arch;
|
|
extern const bfd_arch_info_type bfd_vax_arch;
|
|
extern const bfd_arch_info_type bfd_w65_arch;
|
|
extern const bfd_arch_info_type bfd_we32k_arch;
|
|
extern const bfd_arch_info_type bfd_xstormy16_arch;
|
|
extern const bfd_arch_info_type bfd_xtensa_arch;
|
|
extern const bfd_arch_info_type bfd_xc16x_arch;
|
|
extern const bfd_arch_info_type bfd_z80_arch;
|
|
extern const bfd_arch_info_type bfd_z8k_arch;
|
|
|
|
static const bfd_arch_info_type * const bfd_archures_list[] =
|
|
{
|
|
#ifdef SELECT_ARCHITECTURES
|
|
SELECT_ARCHITECTURES,
|
|
#else
|
|
&bfd_alpha_arch,
|
|
&bfd_arc_arch,
|
|
&bfd_arm_arch,
|
|
&bfd_avr_arch,
|
|
&bfd_bfin_arch,
|
|
&bfd_cr16_arch,
|
|
&bfd_cr16c_arch,
|
|
&bfd_cris_arch,
|
|
&bfd_crx_arch,
|
|
&bfd_d10v_arch,
|
|
&bfd_d30v_arch,
|
|
&bfd_dlx_arch,
|
|
&bfd_fr30_arch,
|
|
&bfd_frv_arch,
|
|
&bfd_h8300_arch,
|
|
&bfd_h8500_arch,
|
|
&bfd_hppa_arch,
|
|
&bfd_i370_arch,
|
|
&bfd_i386_arch,
|
|
&bfd_i860_arch,
|
|
&bfd_i960_arch,
|
|
&bfd_ia64_arch,
|
|
&bfd_ip2k_arch,
|
|
&bfd_iq2000_arch,
|
|
&bfd_k1om_arch,
|
|
&bfd_l1om_arch,
|
|
&bfd_lm32_arch,
|
|
&bfd_m32c_arch,
|
|
&bfd_m32r_arch,
|
|
&bfd_m68hc11_arch,
|
|
&bfd_m68hc12_arch,
|
|
&bfd_m68k_arch,
|
|
&bfd_m88k_arch,
|
|
&bfd_mcore_arch,
|
|
&bfd_mep_arch,
|
|
&bfd_microblaze_arch,
|
|
&bfd_mips_arch,
|
|
&bfd_mmix_arch,
|
|
&bfd_mn10200_arch,
|
|
&bfd_mn10300_arch,
|
|
&bfd_moxie_arch,
|
|
&bfd_msp430_arch,
|
|
&bfd_mt_arch,
|
|
&bfd_ns32k_arch,
|
|
&bfd_openrisc_arch,
|
|
&bfd_or32_arch,
|
|
&bfd_pdp11_arch,
|
|
&bfd_powerpc_arch,
|
|
&bfd_rs6000_arch,
|
|
&bfd_rx_arch,
|
|
&bfd_s390_arch,
|
|
&bfd_score_arch,
|
|
&bfd_sh_arch,
|
|
&bfd_sparc_arch,
|
|
&bfd_spu_arch,
|
|
&bfd_tic30_arch,
|
|
&bfd_tic4x_arch,
|
|
&bfd_tic54x_arch,
|
|
&bfd_tic6x_arch,
|
|
&bfd_tic80_arch,
|
|
&bfd_tilegx_arch,
|
|
&bfd_tilepro_arch,
|
|
&bfd_v850_arch,
|
|
&bfd_vax_arch,
|
|
&bfd_w65_arch,
|
|
&bfd_we32k_arch,
|
|
&bfd_xstormy16_arch,
|
|
&bfd_xtensa_arch,
|
|
&bfd_xc16x_arch,
|
|
&bfd_z80_arch,
|
|
&bfd_z8k_arch,
|
|
#endif
|
|
0
|
|
};
|
|
|
|
/*
|
|
FUNCTION
|
|
bfd_printable_name
|
|
|
|
SYNOPSIS
|
|
const char *bfd_printable_name (bfd *abfd);
|
|
|
|
DESCRIPTION
|
|
Return a printable string representing the architecture and machine
|
|
from the pointer to the architecture info structure.
|
|
|
|
*/
|
|
|
|
const char *
|
|
bfd_printable_name (bfd *abfd)
|
|
{
|
|
return abfd->arch_info->printable_name;
|
|
}
|
|
|
|
/*
|
|
FUNCTION
|
|
bfd_scan_arch
|
|
|
|
SYNOPSIS
|
|
const bfd_arch_info_type *bfd_scan_arch (const char *string);
|
|
|
|
DESCRIPTION
|
|
Figure out if BFD supports any cpu which could be described with
|
|
the name @var{string}. Return a pointer to an <<arch_info>>
|
|
structure if a machine is found, otherwise NULL.
|
|
*/
|
|
|
|
const bfd_arch_info_type *
|
|
bfd_scan_arch (const char *string)
|
|
{
|
|
const bfd_arch_info_type * const *app, *ap;
|
|
|
|
/* Look through all the installed architectures. */
|
|
for (app = bfd_archures_list; *app != NULL; app++)
|
|
{
|
|
for (ap = *app; ap != NULL; ap = ap->next)
|
|
{
|
|
if (ap->scan (ap, string))
|
|
return ap;
|
|
}
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
/*
|
|
FUNCTION
|
|
bfd_arch_list
|
|
|
|
SYNOPSIS
|
|
const char **bfd_arch_list (void);
|
|
|
|
DESCRIPTION
|
|
Return a freshly malloced NULL-terminated vector of the names
|
|
of all the valid BFD architectures. Do not modify the names.
|
|
*/
|
|
|
|
const char **
|
|
bfd_arch_list (void)
|
|
{
|
|
int vec_length = 0;
|
|
const char **name_ptr;
|
|
const char **name_list;
|
|
const bfd_arch_info_type * const *app;
|
|
bfd_size_type amt;
|
|
|
|
/* Determine the number of architectures. */
|
|
vec_length = 0;
|
|
for (app = bfd_archures_list; *app != NULL; app++)
|
|
{
|
|
const bfd_arch_info_type *ap;
|
|
for (ap = *app; ap != NULL; ap = ap->next)
|
|
{
|
|
vec_length++;
|
|
}
|
|
}
|
|
|
|
amt = (vec_length + 1) * sizeof (char **);
|
|
name_list = (const char **) bfd_malloc (amt);
|
|
if (name_list == NULL)
|
|
return NULL;
|
|
|
|
/* Point the list at each of the names. */
|
|
name_ptr = name_list;
|
|
for (app = bfd_archures_list; *app != NULL; app++)
|
|
{
|
|
const bfd_arch_info_type *ap;
|
|
for (ap = *app; ap != NULL; ap = ap->next)
|
|
{
|
|
*name_ptr = ap->printable_name;
|
|
name_ptr++;
|
|
}
|
|
}
|
|
*name_ptr = NULL;
|
|
|
|
return name_list;
|
|
}
|
|
|
|
/*
|
|
FUNCTION
|
|
bfd_arch_get_compatible
|
|
|
|
SYNOPSIS
|
|
const bfd_arch_info_type *bfd_arch_get_compatible
|
|
(const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns);
|
|
|
|
DESCRIPTION
|
|
Determine whether two BFDs' architectures and machine types
|
|
are compatible. Calculates the lowest common denominator
|
|
between the two architectures and machine types implied by
|
|
the BFDs and returns a pointer to an <<arch_info>> structure
|
|
describing the compatible machine.
|
|
*/
|
|
|
|
const bfd_arch_info_type *
|
|
bfd_arch_get_compatible (const bfd *abfd,
|
|
const bfd *bbfd,
|
|
bfd_boolean accept_unknowns)
|
|
{
|
|
const bfd *ubfd, *kbfd;
|
|
|
|
/* Look for an unknown architecture. */
|
|
if (abfd->arch_info->arch == bfd_arch_unknown)
|
|
ubfd = abfd, kbfd = bbfd;
|
|
else if (bbfd->arch_info->arch == bfd_arch_unknown)
|
|
ubfd = bbfd, kbfd = abfd;
|
|
else
|
|
/* Otherwise architecture-specific code has to decide. */
|
|
return abfd->arch_info->compatible (abfd->arch_info, bbfd->arch_info);
|
|
|
|
/* We can allow an unknown architecture if accept_unknowns
|
|
is true, or if the target is the "binary" format, which
|
|
has an unknown architecture. Since the binary format can
|
|
only be set by explicit request from the user, it is safe
|
|
to assume that they know what they are doing. */
|
|
if (accept_unknowns
|
|
|| strcmp (bfd_get_target (ubfd), "binary") == 0)
|
|
return kbfd->arch_info;
|
|
return NULL;
|
|
}
|
|
|
|
/*
|
|
INTERNAL_DEFINITION
|
|
bfd_default_arch_struct
|
|
|
|
DESCRIPTION
|
|
The <<bfd_default_arch_struct>> is an item of
|
|
<<bfd_arch_info_type>> which has been initialized to a fairly
|
|
generic state. A BFD starts life by pointing to this
|
|
structure, until the correct back end has determined the real
|
|
architecture of the file.
|
|
|
|
.extern const bfd_arch_info_type bfd_default_arch_struct;
|
|
*/
|
|
|
|
const bfd_arch_info_type bfd_default_arch_struct = {
|
|
32, 32, 8, bfd_arch_unknown, 0, "unknown", "unknown", 2, TRUE,
|
|
bfd_default_compatible,
|
|
bfd_default_scan,
|
|
0,
|
|
};
|
|
|
|
/*
|
|
FUNCTION
|
|
bfd_set_arch_info
|
|
|
|
SYNOPSIS
|
|
void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg);
|
|
|
|
DESCRIPTION
|
|
Set the architecture info of @var{abfd} to @var{arg}.
|
|
*/
|
|
|
|
void
|
|
bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg)
|
|
{
|
|
abfd->arch_info = arg;
|
|
}
|
|
|
|
/*
|
|
INTERNAL_FUNCTION
|
|
bfd_default_set_arch_mach
|
|
|
|
SYNOPSIS
|
|
bfd_boolean bfd_default_set_arch_mach
|
|
(bfd *abfd, enum bfd_architecture arch, unsigned long mach);
|
|
|
|
DESCRIPTION
|
|
Set the architecture and machine type in BFD @var{abfd}
|
|
to @var{arch} and @var{mach}. Find the correct
|
|
pointer to a structure and insert it into the <<arch_info>>
|
|
pointer.
|
|
*/
|
|
|
|
bfd_boolean
|
|
bfd_default_set_arch_mach (bfd *abfd,
|
|
enum bfd_architecture arch,
|
|
unsigned long mach)
|
|
{
|
|
abfd->arch_info = bfd_lookup_arch (arch, mach);
|
|
if (abfd->arch_info != NULL)
|
|
return TRUE;
|
|
|
|
abfd->arch_info = &bfd_default_arch_struct;
|
|
bfd_set_error (bfd_error_bad_value);
|
|
return FALSE;
|
|
}
|
|
|
|
/*
|
|
FUNCTION
|
|
bfd_get_arch
|
|
|
|
SYNOPSIS
|
|
enum bfd_architecture bfd_get_arch (bfd *abfd);
|
|
|
|
DESCRIPTION
|
|
Return the enumerated type which describes the BFD @var{abfd}'s
|
|
architecture.
|
|
*/
|
|
|
|
enum bfd_architecture
|
|
bfd_get_arch (bfd *abfd)
|
|
{
|
|
return abfd->arch_info->arch;
|
|
}
|
|
|
|
/*
|
|
FUNCTION
|
|
bfd_get_mach
|
|
|
|
SYNOPSIS
|
|
unsigned long bfd_get_mach (bfd *abfd);
|
|
|
|
DESCRIPTION
|
|
Return the long type which describes the BFD @var{abfd}'s
|
|
machine.
|
|
*/
|
|
|
|
unsigned long
|
|
bfd_get_mach (bfd *abfd)
|
|
{
|
|
return abfd->arch_info->mach;
|
|
}
|
|
|
|
/*
|
|
FUNCTION
|
|
bfd_arch_bits_per_byte
|
|
|
|
SYNOPSIS
|
|
unsigned int bfd_arch_bits_per_byte (bfd *abfd);
|
|
|
|
DESCRIPTION
|
|
Return the number of bits in one of the BFD @var{abfd}'s
|
|
architecture's bytes.
|
|
*/
|
|
|
|
unsigned int
|
|
bfd_arch_bits_per_byte (bfd *abfd)
|
|
{
|
|
return abfd->arch_info->bits_per_byte;
|
|
}
|
|
|
|
/*
|
|
FUNCTION
|
|
bfd_arch_bits_per_address
|
|
|
|
SYNOPSIS
|
|
unsigned int bfd_arch_bits_per_address (bfd *abfd);
|
|
|
|
DESCRIPTION
|
|
Return the number of bits in one of the BFD @var{abfd}'s
|
|
architecture's addresses.
|
|
*/
|
|
|
|
unsigned int
|
|
bfd_arch_bits_per_address (bfd *abfd)
|
|
{
|
|
return abfd->arch_info->bits_per_address;
|
|
}
|
|
|
|
/*
|
|
INTERNAL_FUNCTION
|
|
bfd_default_compatible
|
|
|
|
SYNOPSIS
|
|
const bfd_arch_info_type *bfd_default_compatible
|
|
(const bfd_arch_info_type *a, const bfd_arch_info_type *b);
|
|
|
|
DESCRIPTION
|
|
The default function for testing for compatibility.
|
|
*/
|
|
|
|
const bfd_arch_info_type *
|
|
bfd_default_compatible (const bfd_arch_info_type *a,
|
|
const bfd_arch_info_type *b)
|
|
{
|
|
if (a->arch != b->arch)
|
|
return NULL;
|
|
|
|
if (a->bits_per_word != b->bits_per_word)
|
|
return NULL;
|
|
|
|
if (a->mach > b->mach)
|
|
return a;
|
|
|
|
if (b->mach > a->mach)
|
|
return b;
|
|
|
|
return a;
|
|
}
|
|
|
|
/*
|
|
INTERNAL_FUNCTION
|
|
bfd_default_scan
|
|
|
|
SYNOPSIS
|
|
bfd_boolean bfd_default_scan
|
|
(const struct bfd_arch_info *info, const char *string);
|
|
|
|
DESCRIPTION
|
|
The default function for working out whether this is an
|
|
architecture hit and a machine hit.
|
|
*/
|
|
|
|
bfd_boolean
|
|
bfd_default_scan (const bfd_arch_info_type *info, const char *string)
|
|
{
|
|
const char *ptr_src;
|
|
const char *ptr_tst;
|
|
unsigned long number;
|
|
enum bfd_architecture arch;
|
|
const char *printable_name_colon;
|
|
|
|
/* Exact match of the architecture name (ARCH_NAME) and also the
|
|
default architecture? */
|
|
if (strcasecmp (string, info->arch_name) == 0
|
|
&& info->the_default)
|
|
return TRUE;
|
|
|
|
/* Exact match of the machine name (PRINTABLE_NAME)? */
|
|
if (strcasecmp (string, info->printable_name) == 0)
|
|
return TRUE;
|
|
|
|
/* Given that printable_name contains no colon, attempt to match:
|
|
ARCH_NAME [ ":" ] PRINTABLE_NAME? */
|
|
printable_name_colon = strchr (info->printable_name, ':');
|
|
if (printable_name_colon == NULL)
|
|
{
|
|
size_t strlen_arch_name = strlen (info->arch_name);
|
|
if (strncasecmp (string, info->arch_name, strlen_arch_name) == 0)
|
|
{
|
|
if (string[strlen_arch_name] == ':')
|
|
{
|
|
if (strcasecmp (string + strlen_arch_name + 1,
|
|
info->printable_name) == 0)
|
|
return TRUE;
|
|
}
|
|
else
|
|
{
|
|
if (strcasecmp (string + strlen_arch_name,
|
|
info->printable_name) == 0)
|
|
return TRUE;
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Given that PRINTABLE_NAME has the form: <arch> ":" <mach>;
|
|
Attempt to match: <arch> <mach>? */
|
|
if (printable_name_colon != NULL)
|
|
{
|
|
size_t colon_index = printable_name_colon - info->printable_name;
|
|
if (strncasecmp (string, info->printable_name, colon_index) == 0
|
|
&& strcasecmp (string + colon_index,
|
|
info->printable_name + colon_index + 1) == 0)
|
|
return TRUE;
|
|
}
|
|
|
|
/* Given that PRINTABLE_NAME has the form: <arch> ":" <mach>; Do not
|
|
attempt to match just <mach>, it could be ambiguous. This test
|
|
is left until later. */
|
|
|
|
/* NOTE: The below is retained for compatibility only. Please do
|
|
not add to this code. */
|
|
|
|
/* See how much of the supplied string matches with the
|
|
architecture, eg the string m68k:68020 would match the 68k entry
|
|
up to the :, then we get left with the machine number. */
|
|
|
|
for (ptr_src = string, ptr_tst = info->arch_name;
|
|
*ptr_src && *ptr_tst;
|
|
ptr_src++, ptr_tst++)
|
|
{
|
|
if (*ptr_src != *ptr_tst)
|
|
break;
|
|
}
|
|
|
|
/* Chewed up as much of the architecture as will match, skip any
|
|
colons. */
|
|
if (*ptr_src == ':')
|
|
ptr_src++;
|
|
|
|
if (*ptr_src == 0)
|
|
{
|
|
/* Nothing more, then only keep this one if it is the default
|
|
machine for this architecture. */
|
|
return info->the_default;
|
|
}
|
|
|
|
number = 0;
|
|
while (ISDIGIT (*ptr_src))
|
|
{
|
|
number = number * 10 + *ptr_src - '0';
|
|
ptr_src++;
|
|
}
|
|
|
|
/* NOTE: The below is retained for compatibility only.
|
|
PLEASE DO NOT ADD TO THIS CODE. */
|
|
|
|
switch (number)
|
|
{
|
|
/* FIXME: These are needed to parse IEEE objects. */
|
|
/* The following seven case's are here only for compatibility with
|
|
older binutils (at least IEEE objects from binutils 2.9.1 require
|
|
them). */
|
|
case bfd_mach_m68000:
|
|
case bfd_mach_m68010:
|
|
case bfd_mach_m68020:
|
|
case bfd_mach_m68030:
|
|
case bfd_mach_m68040:
|
|
case bfd_mach_m68060:
|
|
case bfd_mach_cpu32:
|
|
arch = bfd_arch_m68k;
|
|
break;
|
|
case 68000:
|
|
arch = bfd_arch_m68k;
|
|
number = bfd_mach_m68000;
|
|
break;
|
|
case 68010:
|
|
arch = bfd_arch_m68k;
|
|
number = bfd_mach_m68010;
|
|
break;
|
|
case 68020:
|
|
arch = bfd_arch_m68k;
|
|
number = bfd_mach_m68020;
|
|
break;
|
|
case 68030:
|
|
arch = bfd_arch_m68k;
|
|
number = bfd_mach_m68030;
|
|
break;
|
|
case 68040:
|
|
arch = bfd_arch_m68k;
|
|
number = bfd_mach_m68040;
|
|
break;
|
|
case 68060:
|
|
arch = bfd_arch_m68k;
|
|
number = bfd_mach_m68060;
|
|
break;
|
|
case 68332:
|
|
arch = bfd_arch_m68k;
|
|
number = bfd_mach_cpu32;
|
|
break;
|
|
case 5200:
|
|
arch = bfd_arch_m68k;
|
|
number = bfd_mach_mcf_isa_a_nodiv;
|
|
break;
|
|
case 5206:
|
|
arch = bfd_arch_m68k;
|
|
number = bfd_mach_mcf_isa_a_mac;
|
|
break;
|
|
case 5307:
|
|
arch = bfd_arch_m68k;
|
|
number = bfd_mach_mcf_isa_a_mac;
|
|
break;
|
|
case 5407:
|
|
arch = bfd_arch_m68k;
|
|
number = bfd_mach_mcf_isa_b_nousp_mac;
|
|
break;
|
|
case 5282:
|
|
arch = bfd_arch_m68k;
|
|
number = bfd_mach_mcf_isa_aplus_emac;
|
|
break;
|
|
|
|
case 32000:
|
|
arch = bfd_arch_we32k;
|
|
break;
|
|
|
|
case 3000:
|
|
arch = bfd_arch_mips;
|
|
number = bfd_mach_mips3000;
|
|
break;
|
|
|
|
case 4000:
|
|
arch = bfd_arch_mips;
|
|
number = bfd_mach_mips4000;
|
|
break;
|
|
|
|
case 6000:
|
|
arch = bfd_arch_rs6000;
|
|
break;
|
|
|
|
case 7410:
|
|
arch = bfd_arch_sh;
|
|
number = bfd_mach_sh_dsp;
|
|
break;
|
|
|
|
case 7708:
|
|
arch = bfd_arch_sh;
|
|
number = bfd_mach_sh3;
|
|
break;
|
|
|
|
case 7729:
|
|
arch = bfd_arch_sh;
|
|
number = bfd_mach_sh3_dsp;
|
|
break;
|
|
|
|
case 7750:
|
|
arch = bfd_arch_sh;
|
|
number = bfd_mach_sh4;
|
|
break;
|
|
|
|
default:
|
|
return FALSE;
|
|
}
|
|
|
|
if (arch != info->arch)
|
|
return FALSE;
|
|
|
|
if (number != info->mach)
|
|
return FALSE;
|
|
|
|
return TRUE;
|
|
}
|
|
|
|
/*
|
|
FUNCTION
|
|
bfd_get_arch_info
|
|
|
|
SYNOPSIS
|
|
const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd);
|
|
|
|
DESCRIPTION
|
|
Return the architecture info struct in @var{abfd}.
|
|
*/
|
|
|
|
const bfd_arch_info_type *
|
|
bfd_get_arch_info (bfd *abfd)
|
|
{
|
|
return abfd->arch_info;
|
|
}
|
|
|
|
/*
|
|
FUNCTION
|
|
bfd_lookup_arch
|
|
|
|
SYNOPSIS
|
|
const bfd_arch_info_type *bfd_lookup_arch
|
|
(enum bfd_architecture arch, unsigned long machine);
|
|
|
|
DESCRIPTION
|
|
Look for the architecture info structure which matches the
|
|
arguments @var{arch} and @var{machine}. A machine of 0 matches the
|
|
machine/architecture structure which marks itself as the
|
|
default.
|
|
*/
|
|
|
|
const bfd_arch_info_type *
|
|
bfd_lookup_arch (enum bfd_architecture arch, unsigned long machine)
|
|
{
|
|
const bfd_arch_info_type * const *app, *ap;
|
|
|
|
for (app = bfd_archures_list; *app != NULL; app++)
|
|
{
|
|
for (ap = *app; ap != NULL; ap = ap->next)
|
|
{
|
|
if (ap->arch == arch
|
|
&& (ap->mach == machine
|
|
|| (machine == 0 && ap->the_default)))
|
|
return ap;
|
|
}
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
/*
|
|
FUNCTION
|
|
bfd_printable_arch_mach
|
|
|
|
SYNOPSIS
|
|
const char *bfd_printable_arch_mach
|
|
(enum bfd_architecture arch, unsigned long machine);
|
|
|
|
DESCRIPTION
|
|
Return a printable string representing the architecture and
|
|
machine type.
|
|
|
|
This routine is depreciated.
|
|
*/
|
|
|
|
const char *
|
|
bfd_printable_arch_mach (enum bfd_architecture arch, unsigned long machine)
|
|
{
|
|
const bfd_arch_info_type *ap = bfd_lookup_arch (arch, machine);
|
|
|
|
if (ap)
|
|
return ap->printable_name;
|
|
return "UNKNOWN!";
|
|
}
|
|
|
|
/*
|
|
FUNCTION
|
|
bfd_octets_per_byte
|
|
|
|
SYNOPSIS
|
|
unsigned int bfd_octets_per_byte (bfd *abfd);
|
|
|
|
DESCRIPTION
|
|
Return the number of octets (8-bit quantities) per target byte
|
|
(minimum addressable unit). In most cases, this will be one, but some
|
|
DSP targets have 16, 32, or even 48 bits per byte.
|
|
*/
|
|
|
|
unsigned int
|
|
bfd_octets_per_byte (bfd *abfd)
|
|
{
|
|
return bfd_arch_mach_octets_per_byte (bfd_get_arch (abfd),
|
|
bfd_get_mach (abfd));
|
|
}
|
|
|
|
/*
|
|
FUNCTION
|
|
bfd_arch_mach_octets_per_byte
|
|
|
|
SYNOPSIS
|
|
unsigned int bfd_arch_mach_octets_per_byte
|
|
(enum bfd_architecture arch, unsigned long machine);
|
|
|
|
DESCRIPTION
|
|
See bfd_octets_per_byte.
|
|
|
|
This routine is provided for those cases where a bfd * is not
|
|
available
|
|
*/
|
|
|
|
unsigned int
|
|
bfd_arch_mach_octets_per_byte (enum bfd_architecture arch,
|
|
unsigned long mach)
|
|
{
|
|
const bfd_arch_info_type *ap = bfd_lookup_arch (arch, mach);
|
|
|
|
if (ap)
|
|
return ap->bits_per_byte / 8;
|
|
return 1;
|
|
}
|