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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
133 lines
3.2 KiB
ArmAsm
133 lines
3.2 KiB
ArmAsm
// Immediate dual 16b SHIFT test program.
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// Test r4 = ASHIFT/ASHIFT (r2 by 10);
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// Test r4 = ASHIFT/ASHIFT (r2 by 10) S;
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// Test r4 = LSHIFT/LSHIFT (r2 by 10);
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# mach: bfin
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.include "testutils.inc"
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start
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// arithmetic
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// left by largest positive magnitude of 15 (0xf)
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// 8001 -> 8000
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R7 = 0;
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ASTAT = R7;
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R0.L = 0x8001;
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R0.H = 0x0100;
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R6 = R0 << 15 (V);
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DBGA ( R6.L , 0x8000 );
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DBGA ( R6.H , 0x0000 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 );
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// arithmetic
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// left by largest positive magnitude of 15 (0xf) with saturation
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R7 = 0;
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ASTAT = R7;
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R0.L = 0x8001;
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R0.H = 0x0100;
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R6 = R0 << 15 (V , S);
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DBGA ( R6.L , 0x8000 );
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DBGA ( R6.H , 0x7fff );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 );
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// arithmetic
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// left by 1
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R7 = 0;
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ASTAT = R7;
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R0.L = 0x8001;
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R0.H = 0x0100;
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R6 = R0 << 1 (V);
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DBGA ( R6.L , 0x0002 );
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DBGA ( R6.H , 0x0200 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 );
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// arithmetic
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// left by 1 saturating
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R7 = 0;
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ASTAT = R7;
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R0.L = 0x8001;
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R0.H = 0x0100;
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R6 = R0 << 1 (V , S);
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DBGA ( R6.L , 0x8000 );
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DBGA ( R6.H , 0x0200 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 );
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// arithmetic
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// left by 15 saturating
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R7 = 0;
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ASTAT = R7;
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R0.L = 0xfff0;
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R0.H = 0x0000;
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R6 = R0 << 15 (V , S);
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DBGA ( R6.L , 0x8000 );
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DBGA ( R6.H , 0x0000 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 );
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// arithmetic
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// right by 15
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R7 = 0;
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ASTAT = R7;
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R0.L = 0x8000;
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R0.H = 0x0100;
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R6 = R0 >>> 15 (V);
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DBGA ( R6.L , 0xffff );
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DBGA ( R6.H , 0x0000 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 );
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// arithmetic
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// right by 15 (sat has no effect)
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R7 = 0;
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ASTAT = R7;
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R0.L = 0x8000;
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R0.H = 0x0100;
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R6 = R0 >>> 15 (V);
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DBGA ( R6.L , 0xffff );
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DBGA ( R6.H , 0x0000 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 );
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// logic
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// right by 15
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R7 = 0;
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ASTAT = R7;
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R0.L = 0x8000;
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R0.H = 0x0100;
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R6 = R0 >> 15 (V);
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DBGA ( R6.L , 0x0001 );
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DBGA ( R6.H , 0x0000 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 );
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pass
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