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345bd07cce
I would like to be able to use non-trivial types in gdbarch_tdep types. This is not possible at the moment (in theory), because of the one definition rule. To allow it, rename all gdbarch_tdep types to <arch>_gdbarch_tdep, and make them inherit from a gdbarch_tdep base class. The inheritance is necessary to be able to pass pointers to all these <arch>_gdbarch_tdep objects to gdbarch_alloc, which takes a pointer to gdbarch_tdep. These objects are never deleted through a base class pointer, so I didn't include a virtual destructor. In the future, if gdbarch objects deletable, I could imagine that the gdbarch_tdep objects could become owned by the gdbarch objects, and then it would become useful to have a virtual destructor (so that the gdbarch object can delete the owned gdbarch_tdep object). But that's not necessary right now. It turns out that RISC-V already has a gdbarch_tdep that is non-default-constructible, so that provides a good motivation for this change. Most changes are fairly straightforward, mostly needing to add some casts all over the place. There is however the xtensa architecture, doing its own little weird thing to define its gdbarch_tdep. I did my best to adapt it, but I can't test those changes. Change-Id: Ic001903f91ddd106bd6ca09a79dabe8df2d69f3b
268 lines
7.6 KiB
C
268 lines
7.6 KiB
C
/* Target-dependent code for SPARC.
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Copyright (C) 2003-2021 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef SPARC_TDEP_H
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#define SPARC_TDEP_H 1
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#include "gdbarch.h"
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#define SPARC_CORE_REGISTERS \
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"g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
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"o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \
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"l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
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"i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7"
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struct frame_info;
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struct gdbarch;
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struct regcache;
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struct regset;
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struct trad_frame_saved_reg;
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/* Register offsets for the general-purpose register set. */
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struct sparc_gregmap
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{
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int r_psr_offset;
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int r_pc_offset;
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int r_npc_offset;
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int r_y_offset;
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int r_wim_offset;
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int r_tbr_offset;
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int r_g1_offset;
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int r_l0_offset;
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int r_y_size;
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};
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struct sparc_fpregmap
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{
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int r_f0_offset;
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int r_fsr_offset;
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};
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/* SPARC architecture-specific information. */
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struct sparc_gdbarch_tdep : gdbarch_tdep
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{
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/* Register numbers for the PN and nPC registers. The definitions
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for (64-bit) UltraSPARC differ from the (32-bit) SPARC
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definitions. */
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int pc_regnum = 0;
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int npc_regnum = 0;
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/* Register names specific for architecture (sparc32 vs. sparc64) */
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const char * const *fpu_register_names = nullptr;
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size_t fpu_registers_num = 0;
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const char * const *cp0_register_names = nullptr;
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size_t cp0_registers_num = 0;
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/* Register sets. */
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const struct regset *gregset = nullptr;
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size_t sizeof_gregset = 0;
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const struct regset *fpregset = nullptr;
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size_t sizeof_fpregset = 0;
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/* Offset of saved PC in jmp_buf. */
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int jb_pc_offset = 0;
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/* Size of an Procedure Linkage Table (PLT) entry, 0 if we shouldn't
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treat the PLT special when doing prologue analysis. */
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size_t plt_entry_size = 0;
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/* Alternative location for trap return. Used for single-stepping. */
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CORE_ADDR (*step_trap) (struct frame_info *frame, unsigned long insn)
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= nullptr;
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/* ISA-specific data types. */
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struct type *sparc_psr_type = nullptr;
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struct type *sparc_fsr_type = nullptr;
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struct type *sparc64_ccr_type = nullptr;
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struct type *sparc64_pstate_type = nullptr;
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struct type *sparc64_fsr_type = nullptr;
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struct type *sparc64_fprs_type = nullptr;
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};
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/* Register numbers of various important registers. */
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enum sparc_regnum
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{
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SPARC_G0_REGNUM = 0, /* %g0 */
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SPARC_G1_REGNUM,
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SPARC_G2_REGNUM,
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SPARC_G3_REGNUM,
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SPARC_G4_REGNUM,
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SPARC_G5_REGNUM,
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SPARC_G6_REGNUM,
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SPARC_G7_REGNUM, /* %g7 */
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SPARC_O0_REGNUM, /* %o0 */
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SPARC_O1_REGNUM,
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SPARC_O2_REGNUM,
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SPARC_O3_REGNUM,
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SPARC_O4_REGNUM,
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SPARC_O5_REGNUM,
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SPARC_SP_REGNUM, /* %sp (%o6) */
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SPARC_O7_REGNUM, /* %o7 */
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SPARC_L0_REGNUM, /* %l0 */
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SPARC_L1_REGNUM,
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SPARC_L2_REGNUM,
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SPARC_L3_REGNUM,
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SPARC_L4_REGNUM,
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SPARC_L5_REGNUM,
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SPARC_L6_REGNUM,
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SPARC_L7_REGNUM, /* %l7 */
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SPARC_I0_REGNUM, /* %i0 */
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SPARC_I1_REGNUM,
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SPARC_I2_REGNUM,
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SPARC_I3_REGNUM,
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SPARC_I4_REGNUM,
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SPARC_I5_REGNUM,
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SPARC_FP_REGNUM, /* %fp (%i6) */
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SPARC_I7_REGNUM, /* %i7 */
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SPARC_F0_REGNUM, /* %f0 */
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SPARC_F1_REGNUM,
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SPARC_F2_REGNUM,
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SPARC_F3_REGNUM,
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SPARC_F4_REGNUM,
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SPARC_F5_REGNUM,
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SPARC_F6_REGNUM,
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SPARC_F7_REGNUM,
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SPARC_F31_REGNUM /* %f31 */
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= SPARC_F0_REGNUM + 31
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};
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enum sparc32_regnum
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{
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SPARC32_Y_REGNUM /* %y */
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= SPARC_F31_REGNUM + 1,
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SPARC32_PSR_REGNUM, /* %psr */
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SPARC32_WIM_REGNUM, /* %wim */
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SPARC32_TBR_REGNUM, /* %tbr */
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SPARC32_PC_REGNUM, /* %pc */
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SPARC32_NPC_REGNUM, /* %npc */
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SPARC32_FSR_REGNUM, /* %fsr */
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SPARC32_CSR_REGNUM, /* %csr */
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};
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/* Pseudo registers. */
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enum sparc32_pseudo_regnum
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{
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SPARC32_D0_REGNUM = 0, /* %d0 */
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SPARC32_D30_REGNUM /* %d30 */
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= SPARC32_D0_REGNUM + 15
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};
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struct sparc_frame_cache
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{
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/* Base address. */
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CORE_ADDR base;
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CORE_ADDR pc;
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/* Do we have a frame? */
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int frameless_p;
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/* The offset from the base register to the CFA. */
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int frame_offset;
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/* Mask of `local' and `in' registers saved in the register save area. */
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unsigned short int saved_regs_mask;
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/* Mask of `out' registers copied or renamed to their `in' sibling. */
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unsigned char copied_regs_mask;
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/* Do we have a Structure, Union or Quad-Precision return value? */
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int struct_return_p;
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/* Table of saved registers. */
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struct trad_frame_saved_reg *saved_regs;
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};
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/* Fetch the instruction at PC. */
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extern unsigned long sparc_fetch_instruction (CORE_ADDR pc);
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/* Fetch StackGhost Per-Process XOR cookie. */
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extern ULONGEST sparc_fetch_wcookie (struct gdbarch *gdbarch);
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/* Record the effect of a SAVE instruction on CACHE. */
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extern void sparc_record_save_insn (struct sparc_frame_cache *cache);
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/* Do a full analysis of the prologue at PC and update CACHE accordingly. */
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extern CORE_ADDR sparc_analyze_prologue (struct gdbarch *gdbarch,
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CORE_ADDR pc, CORE_ADDR current_pc,
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struct sparc_frame_cache *cache);
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extern struct sparc_frame_cache *
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sparc_frame_cache (struct frame_info *this_frame, void **this_cache);
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extern struct sparc_frame_cache *
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sparc32_frame_cache (struct frame_info *this_frame, void **this_cache);
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extern int
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sparc_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc);
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extern void sparc_supply_rwindow (struct regcache *regcache,
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CORE_ADDR sp, int regnum);
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extern void sparc_collect_rwindow (const struct regcache *regcache,
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CORE_ADDR sp, int regnum);
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/* Register offsets for SunOS 4. */
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extern const struct sparc_gregmap sparc32_sunos4_gregmap;
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extern const struct sparc_fpregmap sparc32_sunos4_fpregmap;
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extern const struct sparc_fpregmap sparc32_bsd_fpregmap;
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extern void sparc32_supply_gregset (const struct sparc_gregmap *gregmap,
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struct regcache *regcache,
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int regnum, const void *gregs);
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extern void sparc32_collect_gregset (const struct sparc_gregmap *gregmap,
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const struct regcache *regcache,
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int regnum, void *gregs);
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extern void sparc32_supply_fpregset (const struct sparc_fpregmap *fpregmap,
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struct regcache *regcache,
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int regnum, const void *fpregs);
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extern void sparc32_collect_fpregset (const struct sparc_fpregmap *fpregmap,
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const struct regcache *regcache,
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int regnum, void *fpregs);
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extern int sparc_is_annulled_branch_insn (CORE_ADDR pc);
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/* Functions and variables exported from sparc-sol2-tdep.c. */
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/* Register offsets for Solaris 2. */
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extern const struct sparc_gregmap sparc32_sol2_gregmap;
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extern const struct sparc_fpregmap sparc32_sol2_fpregmap;
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/* Functions and variables exported from sparc-netbsd-tdep.c. */
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/* Register offsets for NetBSD. */
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extern const struct sparc_gregmap sparc32nbsd_gregmap;
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/* Return the address of a system call's alternative return
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address. */
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extern CORE_ADDR sparcnbsd_step_trap (struct frame_info *frame,
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unsigned long insn);
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extern void sparc32nbsd_init_abi (struct gdbarch_info info,
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struct gdbarch *gdbarch);
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extern struct trad_frame_saved_reg *
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sparc32nbsd_sigcontext_saved_regs (struct frame_info *next_frame);
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#endif /* sparc-tdep.h */
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