mirror of
https://sourceware.org/git/binutils-gdb.git
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87975d2a60
* config/tc-crx.c (gettrap): Constify arg. (handle_LoadStor, get_cinv_parameters): Likewise. (getreg_image): Fix enum warning (md_assemble): Restore input line char. * config/tc-hppa.c (tc_gen_reloc): Fix enum warning. * config/tc-i960.c (mem_fmt): Rename var to fix shadow warning. * config/tc-sh.c (sh_fdpic): Only define when OBJ_ELF. (build_Mytes): Fix build failure for non-elf targets. * config/tc-tic4x.c (tic4x_eval): Restore terminator char. * config/tc-xtensa.c (xtensa_end_directive): Fix switch enum warning. * cgen.c (gas_cgen_md_apply_fix): Avoid set but unused warning. * ecoff.c (add_ecoff_symbol): Likewise. * itbl-ops.c (append_insns_as_macros): Likewise. * listing.c (debugging_pseudo): Likewise. * read.c (s_mri_common, stringer): Likewise. * config/obj-coff.c (coff_frob_section): Likewise. * config/tc-alpha.c (emit_ldgp, s_alpha_proc): Likewise. * config/tc-arm.c (my_get_expression): Likewise. * config/tc-hppa.c (process_exit, pa_type_args): Likewise. * config/tc-m32c.c (md_assemble): Likewise. * config/tc-microblaze.c (md_convert_frag): Likewise. * config/tc-mips.c (s_change_section): Likewise. * config/tc-mt.c (mt_fix_adjustable): Likewise. * config/tc-xtensa.c (xtensa_literal_pseudo): Likewise. * config/obj-aout.c (obj_aout_frob_symbol): Delete set but otherwise unused vars. * config/tc-alpha.c (load_expression): Likewise. (s_alpha_rdata, s_alpha_section, s_alpha_prologue): Likewise. * config/tc-arm.c (parse_neon_el_struct_list): Likewise. * config/tc-avr.c (extract_word): Likewise. * config/tc-cris.c (cris_get_expression): Likewise. * config/tc-d30v.c (build_insn, find_format): Likewise. * config/tc-dlx.c (machine_ip): Likewise. * config/tc-hppa.c (pa_get_absolute_expression): Likewise. * config/tc-i370.c (md_assemble): Likewise. * config/tc-i960.c (brtab_emit): Likewise. * config/tc-iq2000.c (s_iq2000_ent): Likewise. * config/tc-m32c.c (md_convert_frag): Likewise. * config/tc-m68hc11.c (fixup24, build_jump_insn): Likewise. (md_estimate_size_before_relax, md_apply_fix): Likewise. * config/tc-m68k.c (md_show_usage): Likewise. * config/tc-microblaze.c (microblaze_s_lcomm): Likewise. * config/tc-mips.c (s_mips_end): Likewise. * config/tc-mmix.c (mmix_byte, mmix_cons): Likewise. * config/tc-mn10300.c (md_assemble): Likewise. * config/tc-msp430.c (extract_word): Likewise. * config/tc-mt.c (md_assemble): Likewise. * config/tc-or32.c (machine_ip): Likewise. * config/tc-pj.c (md_apply_fix): Likewise. * config/tc-s390.c (md_gather_operands): Likewise. * config/tc-sh.c (sh_cons_align): Likewise. * config/tc-sparc.c (sparc_cons_align): Likewise. * config/tc-tic4x.c (tic4x_sect): Likewise. * config/tc-tic54x.c (tic54x_stringer): Likewise. * config/tc-vax.c (vip_op): Likewise. * config/tc-xstormy16.c (xstormy16_cons_fix_new): Likewise. * config/tc-xtensa.c (md_assemble): Likewise. (xtensa_fix_short_loop_frags, convert_frag_immed): Likewise. (xtensa_move_literals): Likewise.
603 lines
16 KiB
C
603 lines
16 KiB
C
/* tc-xstormy16.c -- Assembler for the Sanyo XSTORMY16.
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Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010
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Free Software Foundation.
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to
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the Free Software Foundation, 51 Franklin Street - Fifth Floor,
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Boston, MA 02110-1301, USA. */
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#include "as.h"
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#include "subsegs.h"
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#include "symcat.h"
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#include "opcodes/xstormy16-desc.h"
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#include "opcodes/xstormy16-opc.h"
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#include "cgen.h"
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/* Structure to hold all of the different components describing
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an individual instruction. */
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typedef struct
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{
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const CGEN_INSN * insn;
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const CGEN_INSN * orig_insn;
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CGEN_FIELDS fields;
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#if CGEN_INT_INSN_P
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CGEN_INSN_INT buffer [1];
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#define INSN_VALUE(buf) (*(buf))
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#else
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unsigned char buffer [CGEN_MAX_INSN_SIZE];
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#define INSN_VALUE(buf) (buf)
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#endif
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char * addr;
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fragS * frag;
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int num_fixups;
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fixS * fixups [GAS_CGEN_MAX_FIXUPS];
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int indices [MAX_OPERAND_INSTANCES];
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}
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xstormy16_insn;
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const char comment_chars[] = ";";
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const char line_comment_chars[] = "#";
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const char line_separator_chars[] = "|";
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const char EXP_CHARS[] = "eE";
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const char FLT_CHARS[] = "dD";
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#define O_fptr_symbol (O_max + 1)
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#define XSTORMY16_SHORTOPTS ""
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const char * md_shortopts = XSTORMY16_SHORTOPTS;
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struct option md_longopts[] =
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{
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{NULL, no_argument, NULL, 0}
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};
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size_t md_longopts_size = sizeof (md_longopts);
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int
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md_parse_option (int c ATTRIBUTE_UNUSED,
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char * arg ATTRIBUTE_UNUSED)
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{
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return 0;
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}
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void
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md_show_usage (FILE * stream)
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{
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fprintf (stream, _(" XSTORMY16 specific command line options:\n"));
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}
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/* The target specific pseudo-ops which we support. */
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const pseudo_typeS md_pseudo_table[] =
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{
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{ "word", cons, 4 },
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{ NULL, NULL, 0 }
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};
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void
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md_begin (void)
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{
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/* Initialize the `cgen' interface. */
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/* Set the machine number and endian. */
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gas_cgen_cpu_desc = xstormy16_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 0,
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CGEN_CPU_OPEN_ENDIAN,
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CGEN_ENDIAN_LITTLE,
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CGEN_CPU_OPEN_END);
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xstormy16_cgen_init_asm (gas_cgen_cpu_desc);
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/* This is a callback from cgen to gas to parse operands. */
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cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
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}
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static bfd_boolean skipping_fptr = FALSE;
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void
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md_assemble (char * str)
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{
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xstormy16_insn insn;
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char * errmsg;
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/* Make sure that if we had an erroneous input line which triggered
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the skipping_fptr boolean that it does not affect following lines. */
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skipping_fptr = FALSE;
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/* Initialize GAS's cgen interface for a new instruction. */
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gas_cgen_init_parse ();
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insn.insn = xstormy16_cgen_assemble_insn
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(gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);
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if (!insn.insn)
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{
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as_bad ("%s", errmsg);
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return;
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}
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/* Doesn't really matter what we pass for RELAX_P here. */
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gas_cgen_finish_insn (insn.insn, insn.buffer,
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CGEN_FIELDS_BITSIZE (& insn.fields), 0, NULL);
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}
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void
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md_operand (expressionS * e)
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{
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if (*input_line_pointer != '@')
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return;
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if (strncmp (input_line_pointer + 1, "fptr", 4) == 0)
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{
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input_line_pointer += 5;
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SKIP_WHITESPACE ();
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if (*input_line_pointer != '(')
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{
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as_bad (_("Expected '('"));
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goto err;
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}
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input_line_pointer++;
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expression (e);
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if (*input_line_pointer != ')')
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{
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as_bad (_("Missing ')'"));
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goto err;
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}
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input_line_pointer++;
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SKIP_WHITESPACE ();
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if (e->X_op != O_symbol)
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as_bad (_("Not a symbolic expression"));
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else if (* input_line_pointer == '-')
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/* We are computing the difference of two function pointers
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like this:
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.hword @fptr (foo) - @fptr (bar)
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In this situation we do not want to generate O_fptr_symbol
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operands because the result is an absolute value, not a
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function pointer.
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We need to make the check here, rather than when the fixup
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is generated as the function names (foo & bar in the above
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example) might be local symbols and we want the expression
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to be evaluated now. This kind of thing can happen when
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gcc is generating computed gotos. */
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skipping_fptr = TRUE;
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else if (skipping_fptr)
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skipping_fptr = FALSE;
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else
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e->X_op = O_fptr_symbol;
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}
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return;
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err:
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ignore_rest_of_line ();
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}
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/* Called while parsing data to create a fixup.
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Create BFD_RELOC_XSTORMY16_FPTR16 relocations. */
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void
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xstormy16_cons_fix_new (fragS *f,
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int where,
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int nbytes,
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expressionS *exp)
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{
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bfd_reloc_code_real_type code;
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if (exp->X_op == O_fptr_symbol)
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{
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switch (nbytes)
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{
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case 4:
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/* This can happen when gcc is generating debug output.
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For example it can create a stab with the address of
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a function:
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.stabs "foo:F(0,21)",36,0,0,@fptr(foo)
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Since this does not involve switching code pages, we
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just allow the reloc to be generated without any
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@fptr behaviour. */
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exp->X_op = O_symbol;
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code = BFD_RELOC_32;
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break;
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case 2:
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exp->X_op = O_symbol;
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code = BFD_RELOC_XSTORMY16_FPTR16;
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break;
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default:
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as_bad (_("unsupported fptr fixup size %d"), nbytes);
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return;
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}
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}
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else if (nbytes == 1)
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code = BFD_RELOC_8;
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else if (nbytes == 2)
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code = BFD_RELOC_16;
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else if (nbytes == 4)
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code = BFD_RELOC_32;
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else
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{
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as_bad (_("unsupported fixup size %d"), nbytes);
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return;
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}
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fix_new_exp (f, where, nbytes, exp, 0, code);
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}
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/* Called while parsing an instruction to create a fixup.
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Create BFD_RELOC_XSTORMY16_FPTR16 relocations. */
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fixS *
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xstormy16_cgen_record_fixup_exp (fragS * frag,
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int where,
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const CGEN_INSN * insn,
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int length,
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const CGEN_OPERAND * operand,
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int opinfo,
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expressionS * exp)
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{
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fixS *fixP;
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operatorT op = exp->X_op;
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if (op == O_fptr_symbol)
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exp->X_op = O_symbol;
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fixP = gas_cgen_record_fixup_exp (frag, where, insn, length,
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operand, opinfo, exp);
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if (op == O_fptr_symbol)
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{
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if (operand->type != XSTORMY16_OPERAND_IMM16)
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as_bad (_("unsupported fptr fixup"));
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else
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{
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fixP->fx_r_type = BFD_RELOC_XSTORMY16_FPTR16;
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fixP->fx_where += 2;
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}
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}
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return fixP;
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}
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valueT
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md_section_align (segT segment, valueT size)
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{
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int align = bfd_get_section_alignment (stdoutput, segment);
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return ((size + (1 << align) - 1) & (-1 << align));
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}
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symbolS *
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md_undefined_symbol (char * name ATTRIBUTE_UNUSED)
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{
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return 0;
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}
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/* Return an initial guess of the length by which a fragment must grow to
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hold a branch to reach its destination.
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Also updates fr_type/fr_subtype as necessary.
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Called just before doing relaxation.
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Any symbol that is now undefined will not become defined.
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The guess for fr_var is ACTUALLY the growth beyond fr_fix.
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Whatever we do to grow fr_fix or fr_var contributes to our returned value.
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Although it may not be explicit in the frag, pretend fr_var starts with a
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0 value. */
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int
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md_estimate_size_before_relax (fragS * fragP ATTRIBUTE_UNUSED,
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segT segment ATTRIBUTE_UNUSED)
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{
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/* No assembler relaxation is defined (or necessary) for this port. */
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abort ();
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}
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/* *fragP has been relaxed to its final size, and now needs to have
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the bytes inside it modified to conform to the new size.
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Called after relaxation is finished.
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fragP->fr_type == rs_machine_dependent.
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fragP->fr_subtype is the subtype of what the address relaxed to. */
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void
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md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
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segT sec ATTRIBUTE_UNUSED,
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fragS * fragP ATTRIBUTE_UNUSED)
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{
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/* No assembler relaxation is defined (or necessary) for this port. */
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abort ();
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}
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/* Functions concerning relocs. */
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/* The location from which a PC relative jump should be calculated,
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given a PC relative reloc. */
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long
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md_pcrel_from_section (fixS * fixP, segT sec)
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{
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if ((fixP->fx_addsy != (symbolS *) NULL
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&& (! S_IS_DEFINED (fixP->fx_addsy)
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|| S_GET_SEGMENT (fixP->fx_addsy) != sec))
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|| xstormy16_force_relocation (fixP))
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/* The symbol is undefined,
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or it is defined but not in this section,
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or the relocation will be relative to this symbol not the section symbol.
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Let the linker figure it out. */
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return 0;
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return fixP->fx_frag->fr_address + fixP->fx_where;
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}
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/* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
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Returns BFD_RELOC_NONE if no reloc type can be found.
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*FIXP may be modified if desired. */
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bfd_reloc_code_real_type
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md_cgen_lookup_reloc (const CGEN_INSN * insn ATTRIBUTE_UNUSED,
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const CGEN_OPERAND * operand,
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fixS * fixP)
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{
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switch (operand->type)
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{
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case XSTORMY16_OPERAND_IMM2:
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case XSTORMY16_OPERAND_IMM3:
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case XSTORMY16_OPERAND_IMM3B:
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case XSTORMY16_OPERAND_IMM4:
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case XSTORMY16_OPERAND_HMEM8:
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return BFD_RELOC_NONE;
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case XSTORMY16_OPERAND_IMM12:
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fixP->fx_where += 2;
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return BFD_RELOC_XSTORMY16_12;
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case XSTORMY16_OPERAND_IMM8:
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case XSTORMY16_OPERAND_LMEM8:
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return fixP->fx_pcrel ? BFD_RELOC_8_PCREL : BFD_RELOC_8;
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case XSTORMY16_OPERAND_IMM16:
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/* This might have been processed at parse time. */
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fixP->fx_where += 2;
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if (fixP->fx_cgen.opinfo && fixP->fx_cgen.opinfo != BFD_RELOC_NONE)
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return fixP->fx_cgen.opinfo;
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return fixP->fx_pcrel ? BFD_RELOC_16_PCREL : BFD_RELOC_16;
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case XSTORMY16_OPERAND_ABS24:
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return BFD_RELOC_XSTORMY16_24;
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case XSTORMY16_OPERAND_REL8_4:
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fixP->fx_addnumber -= 2;
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case XSTORMY16_OPERAND_REL8_2:
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fixP->fx_addnumber -= 2;
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fixP->fx_pcrel = 1;
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return BFD_RELOC_8_PCREL;
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case XSTORMY16_OPERAND_REL12:
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fixP->fx_where += 2;
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/* Fall through... */
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case XSTORMY16_OPERAND_REL12A:
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fixP->fx_addnumber -= 2;
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fixP->fx_pcrel = 1;
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return BFD_RELOC_XSTORMY16_REL_12;
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default : /* avoid -Wall warning */
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abort ();
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}
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}
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/* See whether we need to force a relocation into the output file.
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This is used to force out switch and PC relative relocations when
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relaxing. */
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int
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xstormy16_force_relocation (fixS * fix)
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{
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if (fix->fx_r_type == BFD_RELOC_XSTORMY16_FPTR16)
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return 1;
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return generic_force_reloc (fix);
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}
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/* Return true if a relocation against a symbol may be replaced with
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a relocation against section+offset. */
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bfd_boolean
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xstormy16_fix_adjustable (fixS * fixP)
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{
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/* We need the symbol name for the VTABLE entries. */
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if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
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|| fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
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return FALSE;
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if (fixP->fx_r_type == BFD_RELOC_XSTORMY16_FPTR16)
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return FALSE;
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return TRUE;
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}
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/* This is a copy of gas_cgen_md_apply_fix, with some enhancements to
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do various things that would not be valid for all ports. */
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void
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xstormy16_md_apply_fix (fixS * fixP,
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valueT * valueP,
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segT seg ATTRIBUTE_UNUSED)
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{
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char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
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valueT value = *valueP;
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/* Canonical name, since used a lot. */
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CGEN_CPU_DESC cd = gas_cgen_cpu_desc;
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/* md_cgen_lookup_reloc() will adjust this to compensate for where
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in the opcode the relocation happens, for pcrel relocations. We
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have no other way of keeping track of what this offset needs to
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be. */
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fixP->fx_addnumber = 0;
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|
||
/* This port has pc-relative relocs and DIFF_EXPR_OK defined, so
|
||
it must deal with turning a BFD_RELOC_{8,16,32,64} into a
|
||
BFD_RELOC_*_PCREL for the case of
|
||
|
||
.word something-. */
|
||
if (fixP->fx_pcrel)
|
||
switch (fixP->fx_r_type)
|
||
{
|
||
case BFD_RELOC_8:
|
||
fixP->fx_r_type = BFD_RELOC_8_PCREL;
|
||
break;
|
||
case BFD_RELOC_16:
|
||
fixP->fx_r_type = BFD_RELOC_16_PCREL;
|
||
break;
|
||
case BFD_RELOC_32:
|
||
fixP->fx_r_type = BFD_RELOC_32_PCREL;
|
||
break;
|
||
case BFD_RELOC_64:
|
||
fixP->fx_r_type = BFD_RELOC_64_PCREL;
|
||
break;
|
||
default:
|
||
break;
|
||
}
|
||
|
||
if (fixP->fx_addsy == (symbolS *) NULL)
|
||
fixP->fx_done = 1;
|
||
|
||
/* We don't actually support subtracting a symbol. */
|
||
if (fixP->fx_subsy != (symbolS *) NULL)
|
||
as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
|
||
|
||
if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
|
||
{
|
||
int opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
|
||
const CGEN_OPERAND *operand = cgen_operand_lookup_by_num (cd, opindex);
|
||
const char *errmsg;
|
||
bfd_reloc_code_real_type reloc_type;
|
||
CGEN_FIELDS *fields = alloca (CGEN_CPU_SIZEOF_FIELDS (cd));
|
||
const CGEN_INSN *insn = fixP->fx_cgen.insn;
|
||
|
||
/* If the reloc has been fully resolved finish the operand here. */
|
||
/* FIXME: This duplicates the capabilities of code in BFD. */
|
||
if (fixP->fx_done)
|
||
{
|
||
CGEN_CPU_SET_FIELDS_BITSIZE (cd) (fields, CGEN_INSN_BITSIZE (insn));
|
||
CGEN_CPU_SET_VMA_OPERAND (cd) (cd, opindex, fields, (bfd_vma) value);
|
||
|
||
#if CGEN_INT_INSN_P
|
||
{
|
||
CGEN_INSN_INT insn_value =
|
||
cgen_get_insn_value (cd, (unsigned char *) where,
|
||
CGEN_INSN_BITSIZE (insn));
|
||
|
||
/* ??? 0 is passed for `pc'. */
|
||
errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields,
|
||
&insn_value, (bfd_vma) 0);
|
||
cgen_put_insn_value (cd, (unsigned char *) where,
|
||
CGEN_INSN_BITSIZE (insn), insn_value);
|
||
}
|
||
#else
|
||
/* ??? 0 is passed for `pc'. */
|
||
errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields,
|
||
(unsigned char *) where,
|
||
(bfd_vma) 0);
|
||
#endif
|
||
if (errmsg)
|
||
as_bad_where (fixP->fx_file, fixP->fx_line, "%s", errmsg);
|
||
}
|
||
|
||
if (fixP->fx_done)
|
||
return;
|
||
|
||
/* The operand isn't fully resolved. Determine a BFD reloc value
|
||
based on the operand information and leave it to
|
||
bfd_install_relocation. Note that this doesn't work when
|
||
!partial_inplace. */
|
||
|
||
reloc_type = md_cgen_lookup_reloc (insn, operand, fixP);
|
||
if (reloc_type != BFD_RELOC_NONE)
|
||
fixP->fx_r_type = reloc_type;
|
||
else
|
||
{
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("unresolved expression that must be resolved"));
|
||
fixP->fx_done = 1;
|
||
return;
|
||
}
|
||
}
|
||
else if (fixP->fx_done)
|
||
{
|
||
/* We're finished with this fixup. Install it because
|
||
bfd_install_relocation won't be called to do it. */
|
||
switch (fixP->fx_r_type)
|
||
{
|
||
case BFD_RELOC_8:
|
||
md_number_to_chars (where, value, 1);
|
||
break;
|
||
case BFD_RELOC_16:
|
||
md_number_to_chars (where, value, 2);
|
||
break;
|
||
case BFD_RELOC_32:
|
||
md_number_to_chars (where, value, 4);
|
||
break;
|
||
case BFD_RELOC_64:
|
||
md_number_to_chars (where, value, 8);
|
||
break;
|
||
default:
|
||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||
_("internal error: can't install fix for reloc type %d (`%s')"),
|
||
fixP->fx_r_type, bfd_get_reloc_code_name (fixP->fx_r_type));
|
||
break;
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* bfd_install_relocation will be called to finish things up. */
|
||
}
|
||
|
||
/* This is a RELA port. Thus, it does not need to store a
|
||
value if it is going to make a reloc. What's more, when
|
||
assembling a line like
|
||
|
||
.byte global-0x7f00
|
||
|
||
we'll get a spurious error message if we try to stuff 0x7f00 into
|
||
the byte. */
|
||
if (! fixP->fx_done)
|
||
*valueP = 0;
|
||
|
||
/* Tuck `value' away for use by tc_gen_reloc.
|
||
See the comment describing fx_addnumber in write.h.
|
||
This field is misnamed (or misused :-). */
|
||
fixP->fx_addnumber += value;
|
||
}
|
||
|
||
|
||
/* Write a value out to the object file, using the appropriate endianness. */
|
||
|
||
void
|
||
md_number_to_chars (char * buf, valueT val, int n)
|
||
{
|
||
number_to_chars_littleendian (buf, val, n);
|
||
}
|
||
|
||
char *
|
||
md_atof (int type, char * litP, int * sizeP)
|
||
{
|
||
return ieee_md_atof (type, litP, sizeP, FALSE);
|
||
}
|