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The newer update-copyright.py fixes file encoding too, removing cr/lf on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
443 lines
14 KiB
C
443 lines
14 KiB
C
/* Xtensa configuration settings.
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Copyright (C) 2022-2023 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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#ifndef XTENSA_DYNCONFIG_H
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#define XTENSA_DYNCONFIG_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* Config versioning.
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*
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* When new config entries need to be passed through dynconfig
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* create new xtensa_config_v<N> structure and put them there.
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* Declare new function xtensa_get_config_v<N> (void).
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* Define corresponding X*HAL_* macros by accessing xtensa_get_config_v<N> ().
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* Define macro XTENSA_CONFIG_V<N>_ENTRY_LIST by listing
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* XTENSA_CONFIG_ENTRY for every entry in the new structure.
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* Add constant definition for the new xtensa_config_v<N> to the
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* XTENSA_CONFIG_INSTANCE_LIST.
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* Add XTENSA_CONFIG_V<N>_ENTRY_LIST to the XTENSA_CONFIG_ENTRY_LIST.
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*
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* On the user side (gcc/binutils/...) add definition for the function
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* xtensa_get_config_v<N> (void).
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*/
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struct xtensa_config_v1
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{
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int xchal_have_be;
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int xchal_have_density;
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int xchal_have_const16;
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int xchal_have_abs;
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int xchal_have_addx;
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int xchal_have_l32r;
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int xshal_use_absolute_literals;
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int xshal_have_text_section_literals;
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int xchal_have_mac16;
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int xchal_have_mul16;
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int xchal_have_mul32;
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int xchal_have_mul32_high;
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int xchal_have_div32;
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int xchal_have_nsa;
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int xchal_have_minmax;
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int xchal_have_sext;
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int xchal_have_loops;
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int xchal_have_threadptr;
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int xchal_have_release_sync;
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int xchal_have_s32c1i;
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int xchal_have_booleans;
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int xchal_have_fp;
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int xchal_have_fp_div;
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int xchal_have_fp_recip;
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int xchal_have_fp_sqrt;
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int xchal_have_fp_rsqrt;
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int xchal_have_fp_postinc;
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int xchal_have_dfp;
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int xchal_have_dfp_div;
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int xchal_have_dfp_recip;
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int xchal_have_dfp_sqrt;
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int xchal_have_dfp_rsqrt;
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int xchal_have_windowed;
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int xchal_num_aregs;
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int xchal_have_wide_branches;
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int xchal_have_predicted_branches;
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int xchal_icache_size;
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int xchal_dcache_size;
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int xchal_icache_linesize;
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int xchal_dcache_linesize;
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int xchal_icache_linewidth;
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int xchal_dcache_linewidth;
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int xchal_dcache_is_writeback;
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int xchal_have_mmu;
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int xchal_mmu_min_pte_page_size;
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int xchal_have_debug;
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int xchal_num_ibreak;
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int xchal_num_dbreak;
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int xchal_debuglevel;
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int xchal_max_instruction_size;
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int xchal_inst_fetch_width;
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int xshal_abi;
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int xthal_abi_windowed;
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int xthal_abi_call0;
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};
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struct xtensa_config_v2
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{
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int xchal_m_stage;
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int xtensa_march_latest;
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int xtensa_march_earliest;
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};
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typedef struct xtensa_isa_internal_struct xtensa_isa_internal;
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extern const void *xtensa_load_config (const char *name,
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const void *no_plugin_def,
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const void *no_name_def);
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extern const struct xtensa_config_v1 *xtensa_get_config_v1 (void);
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extern const struct xtensa_config_v2 *xtensa_get_config_v2 (void);
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#ifdef XTENSA_CONFIG_DEFINITION
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#ifndef XCHAL_HAVE_MUL32_HIGH
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#define XCHAL_HAVE_MUL32_HIGH 0
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#endif
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#ifndef XCHAL_HAVE_RELEASE_SYNC
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#define XCHAL_HAVE_RELEASE_SYNC 0
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#endif
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#ifndef XCHAL_HAVE_S32C1I
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#define XCHAL_HAVE_S32C1I 0
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#endif
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#ifndef XCHAL_HAVE_THREADPTR
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#define XCHAL_HAVE_THREADPTR 0
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#endif
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#ifndef XCHAL_HAVE_FP_POSTINC
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#define XCHAL_HAVE_FP_POSTINC 0
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#endif
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#ifndef XCHAL_HAVE_DFP
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#define XCHAL_HAVE_DFP 0
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#endif
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#ifndef XCHAL_HAVE_DFP_DIV
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#define XCHAL_HAVE_DFP_DIV 0
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#endif
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#ifndef XCHAL_HAVE_DFP_RECIP
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#define XCHAL_HAVE_DFP_RECIP 0
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#endif
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#ifndef XCHAL_HAVE_DFP_SQRT
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#define XCHAL_HAVE_DFP_SQRT 0
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#endif
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#ifndef XCHAL_HAVE_DFP_RSQRT
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#define XCHAL_HAVE_DFP_RSQRT 0
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#endif
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#ifndef XSHAL_HAVE_TEXT_SECTION_LITERALS
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#define XSHAL_HAVE_TEXT_SECTION_LITERALS 0
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#endif
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#ifndef XCHAL_MMU_MIN_PTE_PAGE_SIZE
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#define XCHAL_MMU_MIN_PTE_PAGE_SIZE 1
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#endif
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#ifndef XTHAL_ABI_WINDOWED
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#define XTHAL_ABI_WINDOWED 0
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#endif
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#ifndef XTHAL_ABI_CALL0
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#define XTHAL_ABI_CALL0 1
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#endif
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#ifndef XCHAL_M_STAGE
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#define XCHAL_M_STAGE 0
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#endif
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#ifndef XTENSA_MARCH_LATEST
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#define XTENSA_MARCH_LATEST 0
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#endif
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#ifndef XTENSA_MARCH_EARLIEST
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#define XTENSA_MARCH_EARLIEST 0
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#endif
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#define XTENSA_CONFIG_ENTRY(a) a
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#define XTENSA_CONFIG_V1_ENTRY_LIST \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_BE), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DENSITY), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_CONST16), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_ABS), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_ADDX), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_L32R), \
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XTENSA_CONFIG_ENTRY(XSHAL_USE_ABSOLUTE_LITERALS), \
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XTENSA_CONFIG_ENTRY(XSHAL_HAVE_TEXT_SECTION_LITERALS), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MAC16), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MUL16), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MUL32), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MUL32_HIGH), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DIV32), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_NSA), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MINMAX), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_SEXT), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_LOOPS), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_THREADPTR), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_RELEASE_SYNC), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_S32C1I), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_BOOLEANS), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_DIV), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_RECIP), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_SQRT), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_RSQRT), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_FP_POSTINC), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP_DIV), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP_RECIP), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP_SQRT), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DFP_RSQRT), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_WINDOWED), \
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XTENSA_CONFIG_ENTRY(XCHAL_NUM_AREGS), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_WIDE_BRANCHES), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_PREDICTED_BRANCHES), \
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XTENSA_CONFIG_ENTRY(XCHAL_ICACHE_SIZE), \
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XTENSA_CONFIG_ENTRY(XCHAL_DCACHE_SIZE), \
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XTENSA_CONFIG_ENTRY(XCHAL_ICACHE_LINESIZE), \
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XTENSA_CONFIG_ENTRY(XCHAL_DCACHE_LINESIZE), \
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XTENSA_CONFIG_ENTRY(XCHAL_ICACHE_LINEWIDTH), \
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XTENSA_CONFIG_ENTRY(XCHAL_DCACHE_LINEWIDTH), \
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XTENSA_CONFIG_ENTRY(XCHAL_DCACHE_IS_WRITEBACK), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_MMU), \
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XTENSA_CONFIG_ENTRY(XCHAL_MMU_MIN_PTE_PAGE_SIZE), \
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XTENSA_CONFIG_ENTRY(XCHAL_HAVE_DEBUG), \
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XTENSA_CONFIG_ENTRY(XCHAL_NUM_IBREAK), \
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XTENSA_CONFIG_ENTRY(XCHAL_NUM_DBREAK), \
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XTENSA_CONFIG_ENTRY(XCHAL_DEBUGLEVEL), \
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XTENSA_CONFIG_ENTRY(XCHAL_MAX_INSTRUCTION_SIZE), \
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XTENSA_CONFIG_ENTRY(XCHAL_INST_FETCH_WIDTH), \
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XTENSA_CONFIG_ENTRY(XSHAL_ABI), \
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XTENSA_CONFIG_ENTRY(XTHAL_ABI_WINDOWED), \
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XTENSA_CONFIG_ENTRY(XTHAL_ABI_CALL0)
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#define XTENSA_CONFIG_V2_ENTRY_LIST \
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XTENSA_CONFIG_ENTRY(XCHAL_M_STAGE), \
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XTENSA_CONFIG_ENTRY(XTENSA_MARCH_LATEST), \
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XTENSA_CONFIG_ENTRY(XTENSA_MARCH_EARLIEST)
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#define XTENSA_CONFIG_INSTANCE_LIST \
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const struct xtensa_config_v1 xtensa_config_v1 = { \
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XTENSA_CONFIG_V1_ENTRY_LIST, \
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}; \
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const struct xtensa_config_v2 xtensa_config_v2 = { \
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XTENSA_CONFIG_V2_ENTRY_LIST, \
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}
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#define XTENSA_CONFIG_ENTRY_LIST \
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XTENSA_CONFIG_V1_ENTRY_LIST, \
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XTENSA_CONFIG_V2_ENTRY_LIST
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#else /* XTENSA_CONFIG_DEFINITION */
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#undef XCHAL_HAVE_BE
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#define XCHAL_HAVE_BE (xtensa_get_config_v1 ()->xchal_have_be)
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#undef XCHAL_HAVE_DENSITY
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#define XCHAL_HAVE_DENSITY (xtensa_get_config_v1 ()->xchal_have_density)
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#undef XCHAL_HAVE_CONST16
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#define XCHAL_HAVE_CONST16 (xtensa_get_config_v1 ()->xchal_have_const16)
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#undef XCHAL_HAVE_ABS
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#define XCHAL_HAVE_ABS (xtensa_get_config_v1 ()->xchal_have_abs)
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#undef XCHAL_HAVE_ADDX
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#define XCHAL_HAVE_ADDX (xtensa_get_config_v1 ()->xchal_have_addx)
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#undef XCHAL_HAVE_L32R
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#define XCHAL_HAVE_L32R (xtensa_get_config_v1 ()->xchal_have_l32r)
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#undef XSHAL_USE_ABSOLUTE_LITERALS
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#define XSHAL_USE_ABSOLUTE_LITERALS (xtensa_get_config_v1 ()->xshal_use_absolute_literals)
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#undef XSHAL_HAVE_TEXT_SECTION_LITERALS
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#define XSHAL_HAVE_TEXT_SECTION_LITERALS (xtensa_get_config_v1 ()->xshal_have_text_section_literals)
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#undef XCHAL_HAVE_MAC16
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#define XCHAL_HAVE_MAC16 (xtensa_get_config_v1 ()->xchal_have_mac16)
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#undef XCHAL_HAVE_MUL16
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#define XCHAL_HAVE_MUL16 (xtensa_get_config_v1 ()->xchal_have_mul16)
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#undef XCHAL_HAVE_MUL32
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#define XCHAL_HAVE_MUL32 (xtensa_get_config_v1 ()->xchal_have_mul32)
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#undef XCHAL_HAVE_MUL32_HIGH
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#define XCHAL_HAVE_MUL32_HIGH (xtensa_get_config_v1 ()->xchal_have_mul32_high)
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#undef XCHAL_HAVE_DIV32
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#define XCHAL_HAVE_DIV32 (xtensa_get_config_v1 ()->xchal_have_div32)
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#undef XCHAL_HAVE_NSA
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#define XCHAL_HAVE_NSA (xtensa_get_config_v1 ()->xchal_have_nsa)
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#undef XCHAL_HAVE_MINMAX
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#define XCHAL_HAVE_MINMAX (xtensa_get_config_v1 ()->xchal_have_minmax)
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#undef XCHAL_HAVE_SEXT
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#define XCHAL_HAVE_SEXT (xtensa_get_config_v1 ()->xchal_have_sext)
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#undef XCHAL_HAVE_LOOPS
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#define XCHAL_HAVE_LOOPS (xtensa_get_config_v1 ()->xchal_have_loops)
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#undef XCHAL_HAVE_THREADPTR
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#define XCHAL_HAVE_THREADPTR (xtensa_get_config_v1 ()->xchal_have_threadptr)
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#undef XCHAL_HAVE_RELEASE_SYNC
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#define XCHAL_HAVE_RELEASE_SYNC (xtensa_get_config_v1 ()->xchal_have_release_sync)
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#undef XCHAL_HAVE_S32C1I
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#define XCHAL_HAVE_S32C1I (xtensa_get_config_v1 ()->xchal_have_s32c1i)
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#undef XCHAL_HAVE_BOOLEANS
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#define XCHAL_HAVE_BOOLEANS (xtensa_get_config_v1 ()->xchal_have_booleans)
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#undef XCHAL_HAVE_FP
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#define XCHAL_HAVE_FP (xtensa_get_config_v1 ()->xchal_have_fp)
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#undef XCHAL_HAVE_FP_DIV
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#define XCHAL_HAVE_FP_DIV (xtensa_get_config_v1 ()->xchal_have_fp_div)
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#undef XCHAL_HAVE_FP_RECIP
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#define XCHAL_HAVE_FP_RECIP (xtensa_get_config_v1 ()->xchal_have_fp_recip)
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#undef XCHAL_HAVE_FP_SQRT
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#define XCHAL_HAVE_FP_SQRT (xtensa_get_config_v1 ()->xchal_have_fp_sqrt)
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#undef XCHAL_HAVE_FP_RSQRT
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#define XCHAL_HAVE_FP_RSQRT (xtensa_get_config_v1 ()->xchal_have_fp_rsqrt)
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#undef XCHAL_HAVE_FP_POSTINC
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#define XCHAL_HAVE_FP_POSTINC (xtensa_get_config_v1 ()->xchal_have_fp_postinc)
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#undef XCHAL_HAVE_DFP
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#define XCHAL_HAVE_DFP (xtensa_get_config_v1 ()->xchal_have_dfp)
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#undef XCHAL_HAVE_DFP_DIV
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#define XCHAL_HAVE_DFP_DIV (xtensa_get_config_v1 ()->xchal_have_dfp_div)
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#undef XCHAL_HAVE_DFP_RECIP
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#define XCHAL_HAVE_DFP_RECIP (xtensa_get_config_v1 ()->xchal_have_dfp_recip)
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#undef XCHAL_HAVE_DFP_SQRT
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#define XCHAL_HAVE_DFP_SQRT (xtensa_get_config_v1 ()->xchal_have_dfp_sqrt)
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#undef XCHAL_HAVE_DFP_RSQRT
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#define XCHAL_HAVE_DFP_RSQRT (xtensa_get_config_v1 ()->xchal_have_dfp_rsqrt)
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#undef XCHAL_HAVE_WINDOWED
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#define XCHAL_HAVE_WINDOWED (xtensa_get_config_v1 ()->xchal_have_windowed)
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#undef XCHAL_NUM_AREGS
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#define XCHAL_NUM_AREGS (xtensa_get_config_v1 ()->xchal_num_aregs)
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#undef XCHAL_HAVE_WIDE_BRANCHES
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#define XCHAL_HAVE_WIDE_BRANCHES (xtensa_get_config_v1 ()->xchal_have_wide_branches)
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#undef XCHAL_HAVE_PREDICTED_BRANCHES
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#define XCHAL_HAVE_PREDICTED_BRANCHES (xtensa_get_config_v1 ()->xchal_have_predicted_branches)
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#undef XCHAL_ICACHE_SIZE
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#define XCHAL_ICACHE_SIZE (xtensa_get_config_v1 ()->xchal_icache_size)
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#undef XCHAL_DCACHE_SIZE
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#define XCHAL_DCACHE_SIZE (xtensa_get_config_v1 ()->xchal_dcache_size)
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#undef XCHAL_ICACHE_LINESIZE
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#define XCHAL_ICACHE_LINESIZE (xtensa_get_config_v1 ()->xchal_icache_linesize)
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#undef XCHAL_DCACHE_LINESIZE
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#define XCHAL_DCACHE_LINESIZE (xtensa_get_config_v1 ()->xchal_dcache_linesize)
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#undef XCHAL_ICACHE_LINEWIDTH
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#define XCHAL_ICACHE_LINEWIDTH (xtensa_get_config_v1 ()->xchal_icache_linewidth)
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#undef XCHAL_DCACHE_LINEWIDTH
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#define XCHAL_DCACHE_LINEWIDTH (xtensa_get_config_v1 ()->xchal_dcache_linewidth)
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#undef XCHAL_DCACHE_IS_WRITEBACK
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#define XCHAL_DCACHE_IS_WRITEBACK (xtensa_get_config_v1 ()->xchal_dcache_is_writeback)
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#undef XCHAL_HAVE_MMU
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#define XCHAL_HAVE_MMU (xtensa_get_config_v1 ()->xchal_have_mmu)
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#undef XCHAL_MMU_MIN_PTE_PAGE_SIZE
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#define XCHAL_MMU_MIN_PTE_PAGE_SIZE (xtensa_get_config_v1 ()->xchal_mmu_min_pte_page_size)
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#undef XCHAL_HAVE_DEBUG
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#define XCHAL_HAVE_DEBUG (xtensa_get_config_v1 ()->xchal_have_debug)
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#undef XCHAL_NUM_IBREAK
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#define XCHAL_NUM_IBREAK (xtensa_get_config_v1 ()->xchal_num_ibreak)
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#undef XCHAL_NUM_DBREAK
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#define XCHAL_NUM_DBREAK (xtensa_get_config_v1 ()->xchal_num_dbreak)
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#undef XCHAL_DEBUGLEVEL
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#define XCHAL_DEBUGLEVEL (xtensa_get_config_v1 ()->xchal_debuglevel)
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#undef XCHAL_MAX_INSTRUCTION_SIZE
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#define XCHAL_MAX_INSTRUCTION_SIZE (xtensa_get_config_v1 ()->xchal_max_instruction_size)
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#undef XCHAL_INST_FETCH_WIDTH
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#define XCHAL_INST_FETCH_WIDTH (xtensa_get_config_v1 ()->xchal_inst_fetch_width)
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#undef XSHAL_ABI
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#undef XTHAL_ABI_WINDOWED
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#undef XTHAL_ABI_CALL0
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#define XSHAL_ABI (xtensa_get_config_v1 ()->xshal_abi)
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#define XTHAL_ABI_WINDOWED (xtensa_get_config_v1 ()->xthal_abi_windowed)
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#define XTHAL_ABI_CALL0 (xtensa_get_config_v1 ()->xthal_abi_call0)
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#undef XCHAL_M_STAGE
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#define XCHAL_M_STAGE (xtensa_get_config_v2 ()->xchal_m_stage)
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#undef XTENSA_MARCH_LATEST
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#define XTENSA_MARCH_LATEST (xtensa_get_config_v2 ()->xtensa_march_latest)
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#undef XTENSA_MARCH_EARLIEST
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#define XTENSA_MARCH_EARLIEST (xtensa_get_config_v2 ()->xtensa_march_earliest)
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#endif /* XTENSA_CONFIG_DEFINITION */
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#ifdef __cplusplus
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}
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#endif
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#endif /* !XTENSA_DYNCONFIG_H */
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