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639e30d297
* gas/arm/blx-bad.s: New. * gas/arm/blx-bad.d: New. opcodes/ * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
57 lines
1.5 KiB
Plaintext
57 lines
1.5 KiB
Plaintext
2011-01-05 Nathan Sidwell <nathan@codesourcery.com>
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* arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
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2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (REG_VEX_38F3): New.
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(PREFIX_0FBC): Likewise.
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(PREFIX_VEX_38F2): Likewise.
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(PREFIX_VEX_38F3_REG_1): Likewise.
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(PREFIX_VEX_38F3_REG_2): Likewise.
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(PREFIX_VEX_38F3_REG_3): Likewise.
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(PREFIX_VEX_38F7): Likewise.
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(VEX_LEN_38F2_P_0): Likewise.
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(VEX_LEN_38F3_R_1_P_0): Likewise.
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(VEX_LEN_38F3_R_2_P_0): Likewise.
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(VEX_LEN_38F3_R_3_P_0): Likewise.
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(VEX_LEN_38F7_P_0): Likewise.
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(dis386_twobyte): Use PREFIX_0FBC.
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(reg_table): Add REG_VEX_38F3.
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(prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2,
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PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2,
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PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7.
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(vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and
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PREFIX_VEX_38F7.
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(vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0,
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VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and
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VEX_LEN_38F7_P_0.
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* i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS.
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(cpu_flags): Add CpuBMI.
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* i386-opc.h (CpuBMI): New.
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(i386_cpu_flags): Add cpubmi.
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* i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt.
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* i386-init.h: Regenerated.
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* i386-tbl.h: Likewise.
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2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (VexGdq): New.
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(OP_VEX): Handle dq_mode.
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2011-01-01 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (process_copyright): Update copyright to 2011.
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For older changes see ChangeLog-2010
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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