mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-15 04:31:49 +08:00
06c441ccef
2022-02-01 Ali Lown <ali.lown@imgtec.com> Andrew Bennett <andrew.bennett@imgtec.com> Dragan Mladjenovic <dragan.mladjenovic@rt-rk.com> Faraz Shahbazker <fshahbazker@wavecomp.com> sim/common/ChangeLog: * sim-bits.h (EXTEND9, EXTEND18 ,EXTEND19, EXTEND21, EXTEND26): New macros. sim/mips/ChangeLog: * Makefile.in (IGEN_INCLUDE): Add mips3264r6.igen. * configure: Regenerate. * configure.ac: Support mipsisa32r6 and mipsisa64r6. (sim_engine_run): Pick simulator model from processor specified in e_flags. * cp1.c (value_fpr): Handle fmt_dc32. (fp_unary, fp_binary): Zero initialize locals. (update_fcsr, fp_classify, fp_rint, fp_r6_cmp, inner_fmac, fp_fmac, fp_min, fp_max, fp_mina, fp_maxa, fp_fmadd, fp_fmsub): New functions. (sim_fpu_class_mips_mapping): New. * cp1.h (fcsr_ABS2008_mask, fcsr_ABS2008_shift): New define. * interp.c (MIPSR6_P): New. (load_word): Allow unaligned memory access for MIPSR6. * micromips.igen (sc, scd): Adapt to new do_sc* helper signature. * mips.igen: Add *r6 models. (signal_if_cti, forbiddenslot32): New helpers. (delayslot32): Use signal_if_cti. (do_sc, do_scd); Add store_ll_bit parameter. (sc, scd): Adapt to previous change. (nal, beq, bal): New definitions for *r6. (sll): Split nop and ssnop cases into ... (nop, ssnop): New definitions. (loadstore_ea): Use the 32-bit compatibility adressing. (cache): Split logic into ... (do_cache): New helper. (check_fpu): Select IEEE 754-2008 mode for R6. (not_word_value, unpredictable, check_mt_hilo, check_mf_hilo, check_multi_hilo, check_div_hilo, check_u64, do_dmfc1b, add, li, addu, and, andi, bgez, bgtz, blez, bltz, bne, break, dadd, daddiu, daddu, dror, dror32, drorv, dsll, dsll32, dsllv, dsra, dsra32, dsrav, dsrl, dsrl32, dsub, dsubu, j, jal, jalr, jalr.hb, lb, lbu, ld, lh, lhu, lui, lw, lwu, nor, or, ori, ror, rorv, sb, sd, sh, sll, sllv, slt, slti, sltiu, sltu, sra, srav, srl, srlv, sub, subu, sw, sync, syscall, teq, tge, tgeu, tlt, tltu, tne, xor, xori, check_fmt_p, do_load_double, do_store_double, abs.FMT, add.FMT, ceil.l.FMT, ceil.w.FMT, cfc1, ctc1, cvt.d.FMT, cvt.l.FMT, cvt.w.FMT, div.FMT, dfmc1, dmtc1, floor.l.FMT, floor.w.FMT, ldc1, lwc1, mfc1, mov.FMT, mtc1, mul.FMT, recip.FMT, round.l.FMT, round.w.FMT, rsqrt.FMT, sdc1, sqrt.FMT, sub.FMT, swc1, trunc.l.FMT, trunc.w.FMT, bc0f, bc0fl, bc0t, bc0tl, dmfc0, dmtc0, eret, mfc0, mtc0, cop, tlbp, tlbr, tlbwi, tlbwr): Enable on *r6 models. * mips3264r2.igen (dext, dextm, dextu, di, dins, dinsm, dinsu, dsbh, dshd, ei, ext, mfhc1, mthc1, ins, seb, seh, synci, rdhwr, wsbh): Likewise. * mips3264r6.igen: New file. * sim-main.h (FP_formats): Add fmt_dc32. (FORBIDDEN_SLOT): New macros. (simFORBIDDENSLOT, FP_R6CMP_*, FP_R6CLASS_*): New defines. (fp_r6_cmp, fp_classify, fp_rint, fp_min, fp_max, fp_mina, fp_maxa, fp_fmadd, fp_fmsub): New declarations. (R6Compare, Classify, RoundToIntegralExact, Min, Max, MinA, MaxA, FusedMultiplyAdd, FusedMultiplySub): New macros. Wrapping previous declarations. sim/testsuite/mips/ChangeLog: * basic.exp: Add r6-*.s tests. (run_r6_removed_test): New function. (run_endian_tests): New function. * hilo-hazard-3.s: Skip for mips*r6. * r2-fpu.s: New test. * r6-64.s: New test. * r6-branch.s: New test. * r6-forbidden.s: New test. * r6-fpu.s: New test. * r6-llsc-dp.s: New test. * r6-llsc-wp.s: New test. * r6-removed.csv: New test. * r6-removed.s: New test. * r6.s: New test. * utils-r6.inc: New inc.
417 lines
13 KiB
Plaintext
417 lines
13 KiB
Plaintext
dnl Process this file with autoconf to produce a configure script.
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AC_INIT(Makefile.in)
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AC_CONFIG_MACRO_DIRS([../m4 ../.. ../../config])
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# DEPRECATED
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#
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# Instead of defining a `subtarget' macro, code should be checking
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# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture
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# in question.
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#
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case "${target}" in
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mips64vr*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;;
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mips*tx39*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
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mips*-sde-elf*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
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mips*-mti-elf*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
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mipsisa32*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
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mipsisa64*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
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*) SIM_SUBTARGET="";;
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esac
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AC_SUBST(SIM_SUBTARGET)
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#
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# Select the bitsize of the target
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#
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case "${target}" in
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mips*-sde-elf*) mips_bitsize=64 ; mips_msb=63 ;;
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mips*-mti-elf*) mips_bitsize=64 ; mips_msb=63 ;;
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mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
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mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
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mipsisa32*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
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mipsisa64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
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mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
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*) mips_bitsize=64 ; mips_msb=63 ;;
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esac
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SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb)
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#
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# Select the floating hardware support of the target
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#
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mips_fpu=HARDWARE_FLOATING_POINT
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mips_fpu_bitsize=
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case "${target}" in
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mips*tx39*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
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mips*-sde-elf*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
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mips*-mti-elf*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
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mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
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mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
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mipsisa32*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
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mipsisa64*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
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mips*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
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*) mips_fpu=HARD_FLOATING_POINT ;;
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esac
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SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize)
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#
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# Select the IGEN architecture
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#
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sim_gen=IGEN
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sim_igen_machine="-M mipsIV"
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sim_m16_machine="-M mips16,mipsIII"
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sim_igen_filter="32,64,f"
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sim_m16_filter="16"
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sim_mach_default="mips8000"
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case "${target}" in
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mips*tx39*) sim_gen=IGEN
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sim_igen_filter="32,f"
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sim_igen_machine="-M r3900"
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;;
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mips64vr43*-*-*) sim_gen=IGEN
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sim_igen_machine="-M mipsIV"
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sim_mach_default="mips8000"
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;;
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mips64vr5*-*-*) sim_gen=IGEN
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sim_igen_machine="-M vr5000"
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sim_mach_default="mips5000"
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;;
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mips64vr41*) sim_gen=M16
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sim_igen_machine="-M vr4100"
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sim_m16_machine="-M vr4100"
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sim_igen_filter="32,64,f"
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sim_m16_filter="16"
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sim_mach_default="mips4100"
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;;
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mips64vr-*-* | mips64vrel-*-*)
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sim_gen=MULTI
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sim_multi_configs="\
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vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\
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vr4120:mipsIII,mips16,vr4120:32,64:mips4120\
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vr5000:mipsIV:32,64,f:mips4300,mips5000\
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vr5400:mipsIV,vr5400:32,64,f:mips5400\
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vr5500:mipsIV,vr5500:32,64,f:mips5500"
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sim_multi_default=mips5000
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;;
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mips*-sde-elf* | mips*-mti-elf*)
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sim_gen=MULTI
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sim_multi_configs="\
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micromips:micromips64,micromipsdsp:32,64,f:mips_micromips\
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mipsisa64r2:mips64r2,mips16,mips16e,mdmx,dsp,dsp2,mips3d,smartmips:32,64,f:mipsisa32r2,mipsisa64r2,mipsisa32r5,mipsisa64r5\
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mipsisa64r6:mips64r6:32,64,f:mipsisa32r6,mipsisa64r6"
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sim_multi_default=mipsisa64r2
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;;
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mips64*-*-*) sim_igen_filter="32,64,f"
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sim_gen=IGEN
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;;
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mips16*-*-*) sim_gen=M16
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sim_igen_filter="32,64,f"
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sim_m16_filter="16"
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;;
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mipsisa32r2*-*-*) sim_gen=MULTI
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sim_multi_configs="\
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micromips:micromips32,micromipsdsp:32,f:mips_micromips\
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mips32r2:mips32r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,f:mipsisa32r2"
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sim_multi_default=mipsisa32r2
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;;
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mipsisa32r6*-*-*) sim_gen=IGEN
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sim_igen_machine="-M mips32r6"
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sim_igen_filter="32,f"
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sim_mach_default="mipsisa32r6"
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;;
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mipsisa32*-*-*) sim_gen=M16
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sim_igen_machine="-M mips32,mips16,mips16e,smartmips"
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sim_m16_machine="-M mips16,mips16e,mips32"
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sim_igen_filter="32,f"
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sim_mach_default="mipsisa32"
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;;
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mipsisa64r2*-*-*) sim_gen=M16
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sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
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sim_m16_machine="-M mips16,mips16e,mips64r2"
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sim_igen_filter="32,64,f"
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sim_mach_default="mipsisa64r2"
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;;
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mipsisa64r6*-*-*) sim_gen=IGEN
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sim_igen_machine="-M mips64r6"
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sim_igen_filter="32,64,f"
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sim_mach_default="mipsisa64r6"
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;;
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mipsisa64sb1*-*-*) sim_gen=IGEN
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sim_igen_machine="-M mips64,mips3d,sb1"
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sim_igen_filter="32,64,f"
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sim_mach_default="mips_sb1"
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;;
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mipsisa64*-*-*) sim_gen=M16
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sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
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sim_m16_machine="-M mips16,mips16e,mips64"
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sim_igen_filter="32,64,f"
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sim_mach_default="mipsisa64"
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;;
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mips*lsi*) sim_gen=M16
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sim_igen_machine="-M mipsIII,mips16"
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sim_m16_machine="-M mips16,mipsIII"
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sim_igen_filter="32,f"
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sim_m16_filter="16"
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sim_mach_default="mips4000"
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;;
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mips*-*-*) sim_gen=IGEN
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sim_igen_filter="32,f"
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;;
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esac
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# The MULTI generator can combine several simulation engines into one.
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# executable. A configuration which uses the MULTI should set two
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# variables: ${sim_multi_configs} and ${sim_multi_default}.
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#
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# ${sim_multi_configs} is the list of engines to build. Each
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# space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS,
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# where:
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#
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# - NAME is a C-compatible prefix for the engine,
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# - MACHINE is a -M argument,
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# - FILTER is a -F argument, and
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# - BFDMACHS is a comma-separated list of bfd machines that the
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# simulator can run.
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#
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# Each entry will have a separate simulation engine whose prefix is
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# m32<NAME>. If the machine list includes "mips16", there will also
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# be a mips16 engine, prefix m16<NAME>. The mips16 engine will be
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# generated using the same machine list as the 32-bit version,
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# but the filter will be "16" instead of FILTER.
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#
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# The simulator compares the bfd mach against BFDMACHS to decide
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# which engine to use. Entries in BFDMACHS should be bfd_mach
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# values with "bfd_mach_" removed. ${sim_multi_default} says
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# which entry should be the default.
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if test ${sim_gen} = MULTI; then
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# Simple sanity check.
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if test -z "${sim_multi_configs}" || test -z "${sim_multi_default}"; then
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AC_MSG_ERROR(Error in configure.ac: MULTI simulator not set up correctly)
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fi
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# Start in a known state.
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rm -f multi-include.h multi-run.c
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sim_multi_flags=
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sim_multi_src=
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sim_multi_obj=
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sim_multi_igen_configs=
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sim_seen_default=no
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cat << __EOF__ > multi-run.c
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/* Main entry point for MULTI simulators.
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Copyright (C) 2003-2022 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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--
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This file was generated by sim/mips/configure. */
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#include "sim-main.h"
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#include "multi-include.h"
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#include "elf-bfd.h"
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#include "elfxx-mips.h"
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#include "elf/mips.h"
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#define SD sd
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#define CPU cpu
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void
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sim_engine_run (SIM_DESC sd,
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int next_cpu_nr,
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int nr_cpus,
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int signal) /* ignore */
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{
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int mach;
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if (STATE_ARCHITECTURE (sd) == NULL)
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mach = bfd_mach_${sim_multi_default};
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else if (elf_elfheader (STATE_PROG_BFD (sd))->e_flags
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& EF_MIPS_ARCH_ASE_MICROMIPS)
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mach = bfd_mach_mips_micromips;
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else
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{
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mach = _bfd_elf_mips_mach (elf_elfheader (STATE_PROG_BFD (sd))->e_flags);
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if (!mach)
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mach = STATE_ARCHITECTURE (SD)->mach;
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}
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switch (mach)
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{
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__EOF__
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for fc in ${sim_multi_configs}; do
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# Split up the entry. ${c} contains the first three elements.
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# Note: outer sqaure brackets are m4 quotes.
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c=`echo ${fc} | sed ['s/:[^:]*$//']`
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bfdmachs=`echo ${fc} | sed 's/.*://'`
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name=`echo ${c} | sed 's/:.*//'`
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machine=`echo ${c} | sed 's/.*:\(.*\):.*/\1/'`
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filter=`echo ${c} | sed 's/.*://'`
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# Build the following lists:
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#
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# sim_multi_flags: all -M and -F flags used by the simulator
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# sim_multi_src: all makefile-generated source files
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# sim_multi_obj: the objects for ${sim_multi_src}
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# sim_multi_igen_configs: igen configuration strings.
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#
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# Each entry in ${sim_multi_igen_configs} is a prefix (m32
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# or m16) followed by the NAME, MACHINE and FILTER part of
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# the ${sim_multi_configs} entry.
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sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}"
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# Check whether special handling is needed.
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case ${c} in
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*:*mips16*:*)
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# Run igen twice, once for normal mode and once for mips16.
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ws="m32 m16"
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# The top-level function for the mips16 simulator is
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# in a file m16${name}_run.c, generated by the
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# tmp-run-multi Makefile rule.
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sim_multi_src="${sim_multi_src} m16${name}_run.c"
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sim_multi_obj="${sim_multi_obj} m16${name}_run.o"
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sim_multi_flags="${sim_multi_flags} -F 16"
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;;
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*:*micromips32*:*)
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# Run igen thrice, once for micromips32, once for micromips16,
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# and once for m32.
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ws="micromips_m32 micromips16 micromips32"
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# The top-level function for the micromips simulator is
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# in a file micromips${name}_run.c, generated by the
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# tmp-run-multi Makefile rule.
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sim_multi_src="${sim_multi_src} micromips${name}_run.c"
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sim_multi_obj="${sim_multi_obj} micromips${name}_run.o"
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sim_multi_flags="${sim_multi_flags} -F 16,32"
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;;
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*:*micromips64*:*)
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# Run igen thrice, once for micromips64, once for micromips16,
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# and once for m64.
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ws="micromips_m64 micromips16 micromips64"
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# The top-level function for the micromips simulator is
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# in a file micromips${name}_run.c, generated by the
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# tmp-run-multi Makefile rule.
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sim_multi_src="${sim_multi_src} micromips${name}_run.c"
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sim_multi_obj="${sim_multi_obj} micromips${name}_run.o"
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sim_multi_flags="${sim_multi_flags} -F 16,32,64"
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;;
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*)
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ws=m32
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;;
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esac
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# Now add the list of igen-generated files to ${sim_multi_src}
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# and ${sim_multi_obj}.
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for w in ${ws}; do
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for base in engine icache idecode model semantics support; do
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sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c"
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sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h"
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sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o"
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done
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sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}"
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done
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# Add an include for the engine.h file. This file declares the
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# top-level foo_engine_run() function.
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echo "#include \"${w}${name}_engine.h\"" >> multi-include.h
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# Add case statements for this engine to sim_engine_run().
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for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
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echo " case bfd_mach_${mach}:" >> multi-run.c
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if test ${mach} = ${sim_multi_default}; then
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echo " default:" >> multi-run.c
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sim_seen_default=yes
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fi
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done
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echo " ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \
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|
>> multi-run.c
|
|
echo " break;" >> multi-run.c
|
|
done
|
|
|
|
# Check whether we added a 'default:' label.
|
|
if test ${sim_seen_default} = no; then
|
|
AC_MSG_ERROR(Error in configure.ac: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default})
|
|
fi
|
|
|
|
cat << __EOF__ >> multi-run.c
|
|
}
|
|
}
|
|
|
|
int
|
|
mips_mach_multi (SIM_DESC sd)
|
|
{
|
|
if (STATE_ARCHITECTURE (sd) == NULL)
|
|
return bfd_mach_${sim_multi_default};
|
|
|
|
switch (STATE_ARCHITECTURE (SD)->mach)
|
|
{
|
|
__EOF__
|
|
|
|
# Add case statements for this engine to mips_mach_multi().
|
|
for fc in ${sim_multi_configs}; do
|
|
|
|
# Split up the entry. ${c} contains the first three elements.
|
|
# Note: outer sqaure brackets are m4 quotes.
|
|
c=`echo ${fc} | sed ['s/:[^:]*$//']`
|
|
bfdmachs=`echo ${fc} | sed 's/.*://'`
|
|
|
|
for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
|
|
echo " case bfd_mach_${mach}:" >> multi-run.c
|
|
done
|
|
done
|
|
|
|
cat << __EOF__ >> multi-run.c
|
|
return (STATE_ARCHITECTURE (SD)->mach);
|
|
default:
|
|
return bfd_mach_${sim_multi_default};
|
|
}
|
|
}
|
|
__EOF__
|
|
|
|
SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI"
|
|
else
|
|
# For clean-extra
|
|
sim_multi_src=doesnt-exist.c
|
|
|
|
if test x"${sim_mach_default}" = x""; then
|
|
AC_MSG_ERROR(Error in configure.ac: \${sim_mach_default} not defined)
|
|
fi
|
|
SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}"
|
|
fi
|
|
sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
|
|
sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}"
|
|
sim_micromips16_flags=" -F ${sim_micromips16_filter} ${sim_micromips16_machine} ${sim_igen_smp}"
|
|
sim_micromips_flags=" -F ${sim_micromips_filter} ${sim_micromips_machine} ${sim_igen_smp}"
|
|
AC_SUBST(sim_igen_flags)
|
|
AC_SUBST(sim_m16_flags)
|
|
AC_SUBST(sim_micromips_flags)
|
|
AC_SUBST(sim_micromips16_flags)
|
|
AC_SUBST(sim_gen)
|
|
AC_SUBST(sim_multi_flags)
|
|
AC_SUBST(sim_multi_igen_configs)
|
|
AC_SUBST(sim_multi_src)
|
|
AC_SUBST(sim_multi_obj)
|
|
|
|
SIM_AC_OUTPUT
|