binutils-gdb/cpu
Jose E. Marchesi b801c1a41f bpf: add xBPF ISA
This patch adds support for xBPF, another ISA targetting the BPF
virtual architecture. For now, the primary difference between eBPF
and xBPF is that xBPF supports indirect calls through the
'call %reg' form of the call instruction.

bfd/
	* archures.c (bfd_mach_xbpf): Define.
	* bfd-in2.h: Regenerate.
	* cpu-bpf.c (bfd_xbpf_arch) New.
	(bfd_bpf_arch) Update next in list field to point to xbpf arch.

cpu/
	* bpf.cpu (arch bpf): Add xbpf mach and isas.
	(define-xbpf-isa) New pmacro.
	(all-isas) Add xbpfle,xbpfbe.
	(endian-isas): New pmacro.
	(mach xbpf): New.
	(model xbpf-def): Likewise.
	(h-gpr): Add xbpf mach.
	(f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
	(f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
	(define-alu-insn-un): Use new endian-isas pmacro.
	(define-alu-insn-bin, define-alu-insn-mov): Likewise.
	(define-endian-insn, define-lddw): Likewise.
	(dlind, dxli, dxsi, dsti): Likewise.
	(define-cond-jump-insn, define-call-insn): Likewise.
	(define-atomic-insns): Likewise.

gas/
	* config/tc-bpf.c: Add option -mxbpf to select xbpf isa.
	* testsuite/gas/bpf/indcall-1.d: New file.
	* testsuite/gas/bpf/indcall-1.s: Likewise.
	* testsuite/gas/bpf/indcall-bad-1.l: Likewise.
	* testsuite/gas/bpf/indcall-bad-1.s: Likewise.
	* testsuite/gas/bpf/bpf.exp: Run new tests.

opcodes/
	* bpf-desc.c: Regenerate.
	* bpf-desc.h: Likewise.
	* bpf-opc.c: Likewise.
	* bpf-opc.h: Likewise.
	* disassemble.c (disassemble_init_for_target): Set bits for xBPF
	ISA when appropriate.

(cherry picked from commit 4449c81a85)
2020-08-26 15:46:09 +02:00
..
bpf.cpu bpf: add xBPF ISA 2020-08-26 15:46:09 +02:00
bpf.opc cpu,gas,opcodes: remove no longer needed workaround from the BPF port 2020-06-04 16:17:42 +02:00
ChangeLog bpf: add xBPF ISA 2020-08-26 15:46:09 +02:00
cris.cpu
epiphany.cpu Remove more shifts for sign/zero extension 2019-12-11 21:14:19 +10:30
epiphany.opc
fr30.cpu ubsan: fr30: left shift of negative value 2020-01-13 12:12:05 +10:30
fr30.opc
frv.cpu ubsan: frv: left shift of negative value 2020-02-01 23:23:18 +10:30
frv.opc
ip2k.cpu
ip2k.opc
iq10.cpu
iq2000.cpu ubsan: iq2000: left shift of negative value 2019-12-23 18:04:12 +10:30
iq2000.opc
iq2000m.cpu
lm32.cpu Remove more shifts for sign/zero extension 2019-12-11 21:14:19 +10:30
lm32.opc
m32c.cpu ubsan: m32c: left shift of negative value 2020-02-03 15:59:08 +10:30
m32c.opc
m32r.cpu ubsan: m32r: left shift of negative value 2020-01-04 19:20:33 +10:30
m32r.opc
mep-avc2.cpu
mep-avc.cpu
mep-c5.cpu
mep-core.cpu
mep-default.cpu
mep-ext-cop.cpu
mep-fmax.cpu
mep-h1.cpu
mep-ivc2.cpu
mep-rhcop.cpu
mep-sample-ucidsp.cpu
mep.cpu
mep.opc opcodes: discriminate endianness and insn-endianness in CGEN ports 2020-06-04 16:17:42 +02:00
mt.cpu
mt.opc
or1k.cpu or1k: Remove 64-bit support, it's not used and it breaks 32-bit hosts 2020-05-19 20:40:27 +09:00
or1k.opc cpu/or1k: Add support for orfp64a32 spec 2019-06-13 06:16:18 +09:00
or1kcommon.cpu or1k: Remove 64-bit support, it's not used and it breaks 32-bit hosts 2020-05-19 20:40:27 +09:00
or1korbis.cpu ubsan: or1k: left shift of negative value 2019-12-20 17:57:58 +10:30
or1korfpx.cpu or1k: Remove 64-bit support, it's not used and it breaks 32-bit hosts 2020-05-19 20:40:27 +09:00
sh64-compact.cpu
sh64-media.cpu
sh.cpu
sh.opc
simplify.inc
xc16x.cpu
xc16x.opc
xstormy16.cpu ubsan: xstormy16: left shift of negative value 2019-12-16 17:35:13 +10:30
xstormy16.opc