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gdb/ChangeLog: Update year range in copyright notice of all files.
160 lines
5.0 KiB
C
160 lines
5.0 KiB
C
/* Native-dependent code for AMD64.
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Copyright (C) 2003-2016 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "gdbarch.h"
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#include "regcache.h"
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#include "i386-tdep.h"
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#include "amd64-tdep.h"
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#include "amd64-nat.h"
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/* The following bits of code help with implementing debugging 32-bit
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code natively on AMD64. The idea is to define two mappings between
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the register number as used by GDB and the register set used by the
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host to represent the general-purpose registers; one for 32-bit
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code and one for 64-bit code. The mappings are specified by the
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follwing variables and consist of an array of offsets within the
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register set indexed by register number, and the number of
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registers supported by the mapping. We don't need mappings for the
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floating-point and SSE registers, since the difference between
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64-bit and 32-bit variants are negligable. The difference in the
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number of SSE registers is already handled by the target code. */
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/* General-purpose register mapping for native 32-bit code. */
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int *amd64_native_gregset32_reg_offset;
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int amd64_native_gregset32_num_regs = I386_NUM_GREGS;
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/* General-purpose register mapping for native 64-bit code. */
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int *amd64_native_gregset64_reg_offset;
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int amd64_native_gregset64_num_regs = AMD64_NUM_GREGS;
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/* Return the offset of REGNUM within the appropriate native
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general-purpose register set. */
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static int
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amd64_native_gregset_reg_offset (struct gdbarch *gdbarch, int regnum)
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{
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int *reg_offset = amd64_native_gregset64_reg_offset;
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int num_regs = amd64_native_gregset64_num_regs;
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gdb_assert (regnum >= 0);
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if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
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{
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reg_offset = amd64_native_gregset32_reg_offset;
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num_regs = amd64_native_gregset32_num_regs;
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}
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if (num_regs > gdbarch_num_regs (gdbarch))
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num_regs = gdbarch_num_regs (gdbarch);
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if (regnum < num_regs && regnum < gdbarch_num_regs (gdbarch))
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return reg_offset[regnum];
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return -1;
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}
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/* Return whether the native general-purpose register set supplies
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register REGNUM. */
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int
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amd64_native_gregset_supplies_p (struct gdbarch *gdbarch, int regnum)
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{
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return (amd64_native_gregset_reg_offset (gdbarch, regnum) != -1);
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}
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/* Supply register REGNUM, whose contents are stored in GREGS, to
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REGCACHE. If REGNUM is -1, supply all appropriate registers. */
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void
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amd64_supply_native_gregset (struct regcache *regcache,
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const void *gregs, int regnum)
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{
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const char *regs = (const char *) gregs;
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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int num_regs = amd64_native_gregset64_num_regs;
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int i;
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if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
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num_regs = amd64_native_gregset32_num_regs;
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if (num_regs > gdbarch_num_regs (gdbarch))
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num_regs = gdbarch_num_regs (gdbarch);
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for (i = 0; i < num_regs; i++)
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{
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if (regnum == -1 || regnum == i)
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{
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int offset = amd64_native_gregset_reg_offset (gdbarch, i);
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if (offset != -1)
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regcache_raw_supply (regcache, i, regs + offset);
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}
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}
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}
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/* Collect register REGNUM from REGCACHE and store its contents in
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GREGS. If REGNUM is -1, collect and store all appropriate
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registers. */
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void
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amd64_collect_native_gregset (const struct regcache *regcache,
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void *gregs, int regnum)
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{
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char *regs = (char *) gregs;
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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int num_regs = amd64_native_gregset64_num_regs;
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int i;
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if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
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{
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num_regs = amd64_native_gregset32_num_regs;
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/* Make sure %eax, %ebx, %ecx, %edx, %esi, %edi, %ebp, %esp and
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%eip get zero-extended to 64 bits. */
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for (i = 0; i <= I386_EIP_REGNUM; i++)
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{
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if (regnum == -1 || regnum == i)
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memset (regs + amd64_native_gregset_reg_offset (gdbarch, i), 0, 8);
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}
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/* Ditto for %cs, %ss, %ds, %es, %fs, and %gs. */
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for (i = I386_CS_REGNUM; i <= I386_GS_REGNUM; i++)
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{
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if (regnum == -1 || regnum == i)
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memset (regs + amd64_native_gregset_reg_offset (gdbarch, i), 0, 8);
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}
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}
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if (num_regs > gdbarch_num_regs (gdbarch))
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num_regs = gdbarch_num_regs (gdbarch);
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for (i = 0; i < num_regs; i++)
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{
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if (regnum == -1 || regnum == i)
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{
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int offset = amd64_native_gregset_reg_offset (gdbarch, i);
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if (offset != -1)
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regcache_raw_collect (regcache, i, regs + offset);
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}
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}
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}
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