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b4e87f2c1e
We currently use a padding NOP after a Thumb to Arm interworking veneer (BX pc). The NOP is never executed but may result in a performance penalty on some cores. For this reason this patch changes the NOPs after Thumb to Arm veneers into B .-2 and adds a note to this in the source code for future reference. bfd/ChangeLog: * elf32-arm.c (elf32_thumb2_plt_entry, elf32_arm_plt_thumb_stub, elf32_arm_stub_long_branch_v4t_thumb_thumb, elf32_arm_stub_long_branch_v4t_thumb_arm, elf32_arm_stub_short_branch_v4t_thumb_arm, elf32_arm_stub_long_branch_v4t_thumb_arm_pic, elf32_arm_stub_long_branch_v4t_thumb_thumb_pic, elf32_arm_stub_long_branch_v4t_thumb_tls_pic): Change nop to branch to previous instruction. ld/ChangeLog: * testsuite/ld-arm/cortex-a8-fix-b-plt.d: Update Testcase. * testsuite/ld-arm/cortex-a8-fix-b-rel-arm.d: Likewise. * testsuite/ld-arm/cortex-a8-fix-bcc-plt.d: Likewise. * testsuite/ld-arm/farcall-cond-thumb-arm.d: Likewise. * testsuite/ld-arm/farcall-mixed-app.d: Likewise. * testsuite/ld-arm/farcall-mixed-app2.d: Likewise. * testsuite/ld-arm/farcall-mixed-lib-v4t.d: Likewise. * testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d: Likewise. * testsuite/ld-arm/farcall-thumb-arm-short.d: Likewise. * testsuite/ld-arm/farcall-thumb-arm.d: Likewise. * testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d: Likewise. * testsuite/ld-arm/farcall-thumb-thumb.d: Likewise. * testsuite/ld-arm/fix-arm1176-on.d: Likewise. * testsuite/ld-arm/ifunc-10.dd: Likewise. * testsuite/ld-arm/ifunc-2.dd: Likewise. * testsuite/ld-arm/ifunc-4.dd: Likewise. * testsuite/ld-arm/ifunc-6.dd: Likewise. * testsuite/ld-arm/ifunc-8.dd: Likewise. * testsuite/ld-arm/jump-reloc-veneers-long.d: Likewise. * testsuite/ld-arm/mixed-app.d: Likewise. * testsuite/ld-arm/thumb2-b-interwork.d: Likewise. * testsuite/ld-arm/tls-longplt.d: Likewise. * testsuite/ld-arm/tls-thumb1.d: Likewise.
100 lines
2.6 KiB
Makefile
100 lines
2.6 KiB
Makefile
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tmpdir/farcall-mixed-app2: file format elf32-(little|big)arm
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architecture: arm.*, flags 0x00000112:
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EXEC_P, HAS_SYMS, D_PAGED
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start address 0x.*
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Disassembly of section .plt:
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.* <.*>:
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.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
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.*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*>
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.*: e08fe00e add lr, pc, lr
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.*: e5bef008 ldr pc, \[lr, #8\]!
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.*: .*
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.* <lib_func2@plt>:
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.*: 4778 bx pc
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.*: e7fd b.n .+ <.+>
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.*: e28fc6.* add ip, pc, #.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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.* <lib_func1@plt>:
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.*: e28fc6.* add ip, pc, #.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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Disassembly of section .text:
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.* <_start>:
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.*: e1a0c00d mov ip, sp
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.*: e92dd800 push {fp, ip, lr, pc}
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.*: eb000008 bl .* <__app_func_veneer>
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.*: ebfffff6 bl .* <lib_func1@plt>
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.*: ebfffff2 bl .* <lib_func2@plt\+0x4>
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.*: e89d6800 ldm sp, {fp, sp, lr}
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.*: e12fff1e bx lr
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.*: e1a00000 nop ; \(mov r0, r0\)
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.* <app_tfunc_close>:
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.*: b500 push {lr}
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.*: f7ff efde blx 81e0 <lib_func2@plt\+0x4>
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.*: bd00 pop {pc}
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.*: 4770 bx lr
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.*: 46c0 nop ; \(mov r8, r8\)
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#...
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.* <__app_func_veneer>:
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.*: e51ff004 ldr pc, \[pc, #-4\] ; 8234 <__app_func_veneer\+0x4>
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.*: 02100000 .word 0x02100000
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Disassembly of section .mid_thumb:
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.* <mid_tfunc>:
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#...
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.*: f400 9000 b.w .* <lib_func2@plt>
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.*: f000 b800 b.w .* <__lib_func2_from_thumb>
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.* <__lib_func2_from_thumb>:
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.*: 4778 bx pc
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.*: e7fd b.n .+ <.+>
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.*: e51ff004 ldr pc, \[pc, #-4\] ; 10081e8 <__lib_func2_from_thumb\+0x8>
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.*: 000081e0 .word 0x000081e0
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.*: 00000000 .word 0x00000000
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Disassembly of section .far_arm:
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.* <app_func>:
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.*: e1a0c00d mov ip, sp
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.*: e92dd800 push {fp, ip, lr, pc}
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.*: eb000006 bl .* <__lib_func1_veneer>
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.*: eb000007 bl .* <__lib_func2_veneer>
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.*: e89d6800 ldm sp, {fp, sp, lr}
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.*: e12fff1e bx lr
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.*: e1a00000 nop ; \(mov r0, r0\)
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.*: e1a00000 nop ; \(mov r0, r0\)
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.* <app_func2>:
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.*: e12fff1e bx lr
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#...
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.* <__lib_func1_veneer>:
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.*: e51ff004 ldr pc, \[pc, #-4\] ; .* <__lib_func1_veneer\+0x4>
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.*: 000081ec .word 0x000081ec
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.* <__lib_func2_veneer>:
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.*: e51ff004 ldr pc, \[pc, #-4\] ; .* <__lib_func2_veneer\+0x4>
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.*: 000081e0 .word 0x000081e0
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Disassembly of section .far_thumb:
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.* <app_tfunc>:
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.*: b500 push {lr}
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.*: f000 e806 blx .* <__lib_func2_from_thumb>
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.*: bd00 pop {pc}
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.*: 4770 bx lr
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.*: 46c0 nop ; \(mov r8, r8\)
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#...
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.* <__lib_func2_from_thumb>:
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.*: e51ff004 ldr pc, \[pc, #-4\] ; 2200014 <__lib_func2_from_thumb\+0x4>
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.*: 000081e0 .word 0x000081e0
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